Timer support for F256 added
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1c4fb6b2b2
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bdd2cb4929
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@ -78,7 +78,7 @@ else
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LDFLAGS=$(LDFLAGS_FOR_UNIT) --list-file toolbox.map
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endif
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SRCS = toolbox.c log.c boot.c memory.c proc.c ring_buffer.c simpleio.c sys_general.c utilities.c $(SRCS_FOR_UNIT) # $(C_SRCS_DEBUGGER)
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SRCS = toolbox.c log.c boot.c memory.c proc.c ring_buffer.c simpleio.c sys_general.c timers.c utilities.c $(SRCS_FOR_UNIT) # $(C_SRCS_DEBUGGER)
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OBJS = $(patsubst %.s,%.o,$(patsubst %.c,%.o,$(SRCS)))
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OBJS4RM = $(subst /,\\,$(OBJS))
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LIBS = dev/devices.a snd/sound.a fatfs/fatfs.a
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@ -262,6 +262,6 @@ SYSTEMCALL void rtc_get_time(p_time time) {
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* the number of jiffies since the last reset
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*/
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long rtc_get_jiffies() {
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return 0; // timers_jiffies();
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return timers_jiffies();
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}
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@ -1,11 +1,11 @@
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/**
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* @file timers_c256.h
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* @file timers_f256.h
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*
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* Define timer registers on the C256
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* Define timer registers on the F256
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*/
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#ifndef __C256_TIMERS_H
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#define __C256_TIMERS_H
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#ifndef __F256_TIMERS_H
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#define __F256_TIMERS_H
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//
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// TIMER_CTRL_* flags
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@ -24,7 +24,7 @@
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#define TIMER_CMP_RELOAD 0x02 // Set to reload the charge value on reaching 0
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//
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// Timer 0 -- Based on system clock (14318180Hz)
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// Timer 0 -- Based on system clock (6MHz)
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//
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#define TIMER_CTRL_0 ((volatile __attribute__((far)) uint8_t *)0xf01650)
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49
src/timers.c
49
src/timers.c
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@ -2,26 +2,13 @@
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#include "timers.h"
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#include "gabe_reg.h"
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#include "timers_reg.h"
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long jiffy_count;
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/*
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* Interrupt handler for the Channel A SOF interrupt... just counts jiffies
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*
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* NOTE: in time, this should be handled by the RTC or another timer.
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*/
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void sof_a_handler() {
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jiffy_count++;
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}
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#include "sys_general.h"
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/*
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* Initialize the timers and their interrupts
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*/
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void timers_init() {
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jiffy_count = 0;
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// int_register(INT_SOF_A, sof_a_handler);
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// int_enable(INT_SOF_A);
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#if MODEL == MODEL_FOENIX_A2560U || MODEL == MODEL_FOENIX_A2560U_PLUS
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*TIMER_TCR0 = 0; // Reset timers 0, 1, and 2
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*TIMER_TCR1 = 0; // Reset timers 3, and 4 (if 4 is available)
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@ -34,12 +21,42 @@ void timers_init() {
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// Set timer 3 to count up and auto clear
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*TIMER_TCR1 = TCR_ENABLE_3 | TCR_CNTUP_3;
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#elif MODEL == MODEL_FOENIX_F256 || MODEL == MODEL_FOENIX_F256K || MODEL == MODEL_FOENIX_F256K2
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// Timers off
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*TIMER_CTRL_0 = 0;
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*TIMER_CTRL_1 = 0;
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// Enable counting up on timer #1 and preclear
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*TIMER_CHG_L_1 = 0;
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*TIMER_CHG_M_1 = 0;
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*TIMER_CHG_H_1 = 0;
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*TIMER_CMP_L_1 = 0xff;
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*TIMER_CMP_M_1 = 0xff;
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*TIMER_CMP_H_1 = 0xff;
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*TIMER_CTRL_1 = TIMER_CTRL_EN | TIMER_CTRL_CNT_UP | TIMER_CTRL_SCLR;
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// Set timer 3 to count up and auto clear
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*TIMER_CMPC_1 = TIMER_CMP_RECLR;
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*TIMER_CTRL_1 = TIMER_CTRL_EN | TIMER_CTRL_CNT_UP;
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#endif
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}
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/*
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* Return the number of jiffies (1/60 of a second) since last reset time
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*/
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SYSTEMCALL long timers_jiffies() {
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// return jiffy_count;
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#if MODEL == MODEL_FOENIX_A2560U || MODEL == MODEL_FOENIX_A2560U_PLUS
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return *TIMER_VALUE_3;
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#elif MODEL == MODEL_FOENIX_F256 || MODEL == MODEL_FOENIX_F256K || MODEL == MODEL_FOENIX_F256K2
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uint32_t result = (uint32_t)(*TIMER_CHG_L_1) | ((uint32_t)(*TIMER_CHG_M_1) << 8) | ((uint32_t)(*TIMER_CHG_H_1) << 16);
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return result;
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#endif
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}
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@ -176,15 +176,15 @@ void initialize() {
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INFO("Console installed.");
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}
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// /* Initialize the timers the MCP uses */
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// timers_init();
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// INFO("Timers initialized");
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/* Initialize the timers the MCP uses */
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timers_init();
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INFO("Timers initialized");
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/* Initialize the real time clock */
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rtc_init();
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INFO("Real time clock initialized");
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// target_jiffies = sys_time_jiffies() + 300; /* 5 seconds minimum */
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// target_jiffies = timers_jiffies() + 300; /* 5 seconds minimum */
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// DEBUG1("target_jiffies assigned: %d", target_jiffies);
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/* Enable all interrupts */
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@ -264,7 +264,6 @@ void initialize() {
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t_file_info dir;
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uint8_t buffer[512];
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void dump(uint8_t * buffer, int count) {
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char char_buffer[17];
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@ -465,6 +464,9 @@ int main(int argc, char * argv[]) {
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kbd_init();
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test_sysinfo();
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test_kbd();
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long jiffies = timers_jiffies();
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printf("Jiffies: %ld\n", jiffies);
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// Attempt to start up the user code
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// log(LOG_INFO, "Looking for user startup code:");
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