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Fixed JSL issue with IEC sleep functions

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This commit is contained in:
Peter Weingartner 2024-08-04 19:48:35 -04:00
parent 01b2765ab0
commit 5cf53976c5
4 changed files with 47 additions and 15 deletions
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33
src/C256/iecll.s
View file

@ -17,6 +17,7 @@
.public iecll_listen .public iecll_listen
.public iecll_listen_sa .public iecll_listen_sa
.public iecll_unlisten .public iecll_unlisten
.public iecll_reset
#include "F256/iec_f256.h" #include "F256/iec_f256.h"
@ -86,6 +87,9 @@ read_DATA: read_bit IEC_DATA_i
assert_DATA: assert_bit IEC_DATA_o assert_DATA: assert_bit IEC_DATA_o
release_DATA: release_bit IEC_DATA_o release_DATA: release_bit IEC_DATA_o
assert_RST: assert_bit IEC_RST_o
release_RST: release_bit IEC_RST_o
;; ;;
;; Routines to wait various amounts of time ;; Routines to wait various amounts of time
;; ;;
@ -99,20 +103,20 @@ _loop$ dex
sleep_100us: phx sleep_100us: phx
ldx #5 ldx #5
_loop$ jsl sleep_20us _loop$ jsr sleep_20us
dex dex
bne _loop$ bne _loop$
plx plx
rts rts
sleep_300us: jsl sleep_100us sleep_300us: jsr sleep_100us
jsl sleep_100us jsr sleep_100us
jsl sleep_100us jsr sleep_100us
rts rts
sleep_1ms: jsl sleep_300us sleep_1ms: jsr sleep_300us
jsl sleep_300us jsr sleep_300us
jsl sleep_300us jsr sleep_300us
jmp sleep_100us jmp sleep_100us
;; ;;
@ -315,6 +319,7 @@ zero$ jsr assert_DATA
bra clock$ bra clock$
one$ jsr release_DATA one$ jsr release_DATA
bra clock$
clock$ clock$
; Toggle the clock ; Toggle the clock
@ -660,3 +665,17 @@ queue$ sta queue
plp plp
rtl rtl
;
; Trigger the reset line on the IEC port
;
iecll_reset: php
sei
sep #0x30
jsr assert_RST
jsr sleep_1ms
jsr release_RST
plp
rtl

5
src/include/features.h
View file

@ -41,10 +41,13 @@
#define HAS_EXTERNAL_SIDS 1 #define HAS_EXTERNAL_SIDS 1
#define HAS_OPL3 1 #define HAS_OPL3 1
#define HAS_PATA 1 #define HAS_PATA 1
#elif MODEL == MODEL_FOENIX_F256KE #elif MODEL == MODEL_FOENIX_F256KE || MODEL == MODEL_FOENIX_F256K
#define HAS_EXTERNAL_SIDS 1 #define HAS_EXTERNAL_SIDS 1
#define HAS_OPL3 1 #define HAS_OPL3 1
#define HAS_IEC 1 #define HAS_IEC 1
#elif MODEL == MODEL_FOENIX_F256
#define HAS_OPL3 1
#define HAS_IEC 1
#endif #endif

6
src/include/iecll.h
View file

@ -88,4 +88,10 @@ extern short iecll_eoi();
*/ */
extern void iecll_out(uint8_t byte); extern void iecll_out(uint8_t byte);
/**
* @brief Assert and release the reset line on the IEC bus
*
*/
extern void iecll_reset();
#endif #endif

18
src/toolbox.c
View file

@ -51,6 +51,7 @@
#include "dev/fdc.h" #include "dev/fdc.h"
#include "dev/fsys.h" #include "dev/fsys.h"
#include "dev/iec.h" #include "dev/iec.h"
#include "iecll.h"
#include "dev/ps2.h" #include "dev/ps2.h"
#include "dev/rtc.h" #include "dev/rtc.h"
#include "dev/sdc.h" #include "dev/sdc.h"
@ -176,9 +177,9 @@ void initialize() {
INFO("Console installed."); INFO("Console installed.");
} }
#if HAS_IEC // #if HAS_IDE
iec_init(); // iec_init();
#endif // #endif
/* Initialize the timers the MCP uses */ /* Initialize the timers the MCP uses */
timers_init(); timers_init();
@ -485,13 +486,16 @@ int main(int argc, char * argv[]) {
kbd_init(); kbd_init();
test_sysinfo(); test_sysinfo();
// test_psg();
// test_kbd(); printf("Initializing IEC\n");
long jiffies = timers_jiffies(); result = iec_init();
printf("Jiffies: %ld\n", jiffies); if (result != 0) {
printf("Error initializing IEC.\n");
}
printf("Attempting to get status for IEC drive #8: "); printf("Attempting to get status for IEC drive #8: ");
short n = iec_status(8, message, 256); short n = iec_status(8, message, 256);
printf("\"%s\"\n", message); printf("\"%s\"\n", message);
// Attempt to start up the user code // Attempt to start up the user code