fix compiler-generated dependencies file usage in Makefile
was unintentionally dropping part of the file extension so the deps files weren't actually being used. oops.
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3
Makefile
3
Makefile
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@ -96,7 +96,6 @@ BUILD_DIR = build
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OBJ_DIR = $(BUILD_DIR)/obj
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OBJ_FILES = $(addprefix $(OBJ_DIR)/, $(addsuffix .o, $(SRC_FILES)))
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DEPS_DIR = $(OBJ_DIR)
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DEPENDS = $(OBJ_FILES:.o=.d)
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CFLAGS = --code-model=large --data-model=large --list-file=$@.lst $(INCLUDES) $(CFLAGS_FOR_UNIT)
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@ -132,7 +131,7 @@ $(BUILD_DIR)/$(TARGET).bin: $(BUILD_DIR)/$(TARGET_ROM).s37
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$(OBJ_DIR)/%.c.o: %.c
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@mkdir -p $(dir $@)
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$(CC) -MMD -MP -MF$(DEPS_DIR)/$*.d $(CFLAGS) -o $@ $<
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$(CC) -MMD -MP -MF$(patsubst %.o,%.d,$@) $(CFLAGS) -o $@ $<
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$(OBJ_DIR)/%.s.o: %.s
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@mkdir -p $(dir $@)
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