Use a MOVE rather than CLR because CLR is a read-modify-write operation that is not yet supported by the bus/memory logic yet.

This commit is contained in:
Vincent Barrilliot 2021-12-07 00:47:22 +01:00
parent 21f28424eb
commit 723240a95e

View file

@ -127,7 +127,11 @@ coldboot: lea ___STACK,sp
move.l #___BSSSIZE,d0
beq.s callmain
clrloop: clr.l (a0)+
clrloop: ; We don't use clr.l because it's a read-modify-write operation
; that is not yet supported by the FPGA's bus logic for now.
; So we use a move instead.
; clr.l (a0)+
move.l #0,(a0)+
subq.l #4,d0
bne.s clrloop