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vinz6751 2023-12-31 15:34:57 +01:00
parent 6913c88521 f548c2eac6
commit 1e21626187
129 changed files with 6895 additions and 10061 deletions
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3
.gitignore vendored
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@ -74,3 +74,6 @@ src/bin/archive/foenixmcp_u_ram_20211206_02.bin
src/bin/archive/foenixmcp_u_ram_20211206_01.bin
src/bin/archive/foenixmcp_u_flash_20211206_02.bin
src/bin/archive/foenixmcp_u_flash_20211206_01.bin
# Calypsi list files
*.lst

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C256Mgr.zip
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C256Mgr/__pycache__/foenix.cpython-37.pyc
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C256Mgr/__pycache__/intelhex.cpython-37.pyc
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C256Mgr/__pycache__/srec.cpython-37.pyc
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C256Mgr/__pycache__/wdc.cpython-37.pyc
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C256Mgr/c256mgr.py
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import intelhex
import wdc
import foenix
import srec
import configparser
import re
import sys
import argparse
import os
from serial.tools import list_ports
FLASH_SIZE = 524288 # Required size of flash file: 512 KB
CHUNK_SIZE = 4096 # Size of block of binary data to transfer
label_file = ""
to_send = ""
port = ""
start_address = ""
count = ""
label = ""
def confirm(question):
return input(question).lower().strip()[:1] == "y"
def revision(port):
"""Get the version code for the debug port."""
c256 = foenix.FoenixDebugPort()
try:
c256.open(port)
c256.enter_debug()
try:
data = c256.get_revision()
return "%X" % data
finally:
c256.exit_debug()
finally:
c256.close()
def upload_binary(port, filename, address):
"""Upload a binary file into the C256 memory."""
with open(filename, "rb") as f:
c256 = foenix.FoenixDebugPort()
try:
c256.open(port)
c256.enter_debug()
try:
current_addr = int(address, 16)
block = f.read(CHUNK_SIZE)
while block:
c256.write_block(current_addr, block)
current_addr += len(block)
block = f.read(CHUNK_SIZE)
finally:
c256.exit_debug()
finally:
c256.close()
def program_flash(port, filename, hex_address):
"""Program the flash memory using the contents of the C256's RAM."""
base_address = int(hex_address, 16)
address = base_address
print("About to upload image to address 0x{:X}".format(address), flush=True)
#if os.path.getsize(filename) == FLASH_SIZE:
if confirm("Are you sure you want to reprogram the flash memory? (y/n): "):
with open(filename, "rb") as f:
c256 = foenix.FoenixDebugPort()
try:
c256.open(port)
c256.enter_debug()
try:
block = f.read(CHUNK_SIZE)
while block:
c256.write_block(address, block)
address += len(block)
block = f.read(CHUNK_SIZE)
print("Binary file uploaded...", flush=True)
c256.erase_flash()
print("Flash memory erased...", flush=True)
c256.program_flash(base_address)
print("Flash memory programmed...")
finally:
c256.exit_debug()
finally:
c256.close()
# else:
# print("The provided flash file is not the right size.")
def dereference(port, file, label):
"""Get the address contained in the pointer with the label in the label file."""
c256 = foenix.FoenixDebugPort()
try:
address = lookup(file, label)
c256.open(port)
c256.enter_debug()
try:
data = c256.read_block(int(address, 16), 3)
deref = data[2] << 16 | data[1] << 8 | data[0]
return "%X" % deref
finally:
c256.exit_debug()
finally:
c256.close()
def lookup(file, label):
"""Return the hex address linked to the passed label in the label file."""
with open(file) as f:
for line in f:
match = re.match('^(\S+)\s*\=\s*\$(\S+)', line)
if match:
if match.group(1) == label:
return match.group(2)
sys.stderr.write("Could not find a definition for that label.\n")
sys.exit(2)
def display(base_address, data):
"""Write a block of data to the console in a nice, hexadecimal format."""
text_buff = ""
for i in range(0, len(data)):
if (i % 16) == 0:
if text_buff != "":
sys.stdout.write(" {}\n".format(text_buff))
text_buff = ""
sys.stdout.write("{:06X}: ".format(base_address + i))
elif (i % 8) == 0:
sys.stdout.write(" ")
sys.stdout.write("{:02X}".format(data[i]))
b = bytearray(1)
b[0] = data[i]
if (b[0] & 0x80 == 0):
c = b.decode('ascii')
if c.isprintable():
text_buff = text_buff + c
else:
text_buff = text_buff + "."
else:
text_buff = text_buff + "."
sys.stdout.write(' {}\n'.format(text_buff))
def send_wdc(port, filename):
"""Send the data in the hex file 'filename' to the C256 on the given serial port."""
infile = wdc.WdcBinFile()
c256 = foenix.FoenixDebugPort()
try:
c256.open(port)
infile.open(filename)
try:
infile.set_handler(lambda address, data: c256.write_block(address, data))
c256.enter_debug()
try:
# Process the lines in the hex file
infile.read_blocks()
finally:
c256.exit_debug()
finally:
infile.close()
finally:
c256.close()
def send_srec(port, filename):
"""Send the data in the SREC hex file 'filename' to the C256 on the given serial port."""
infile = srec.SRECFile()
c256 = foenix.FoenixDebugPort()
try:
c256.open(port)
infile.open(filename)
try:
infile.set_handler(lambda address, data: c256.write_block(address, bytes.fromhex(data)))
c256.enter_debug()
try:
# Process the lines in the hex file
infile.read_lines()
finally:
c256.exit_debug()
finally:
infile.close()
finally:
c256.close()
def send(port, filename):
"""Send the data in the hex file 'filename' to the C256 on the given serial port."""
infile = intelhex.HexFile()
c256 = foenix.FoenixDebugPort()
try:
c256.open(port)
infile.open(filename)
try:
infile.set_handler(lambda address, data: c256.write_block(address, bytes.fromhex(data)))
c256.enter_debug()
try:
# Process the lines in the hex file
infile.read_lines()
finally:
c256.exit_debug()
finally:
infile.close()
finally:
c256.close()
def get(port, address, length):
"""Read a block of data from the C256."""
c256 = foenix.FoenixDebugPort()
try:
c256.open(port)
c256.enter_debug()
try:
data = c256.read_block(int(address, 16), int(length, 16))
display(int(address, 16), data)
finally:
c256.exit_debug()
finally:
c256.close()
def list_serial_ports():
serial_ports = list_ports.comports()
if len(serial_ports) == 0:
print("No serial ports found")
for serial_port in serial_ports:
print(f"{serial_port.device}")
print(f" Description: {serial_port.description}")
print(f" Manufacturer: {serial_port.manufacturer}")
print(f" Product: {serial_port.product}")
print()
config = configparser.ConfigParser()
config.read('c256.ini')
parser = argparse.ArgumentParser(description='Manage the C256 Foenix through its debug port.')
parser.add_argument("--port", dest="port", default=config['DEFAULT'].get('port', 'COM3'),
help="Specify the serial port to use to access the C256 debug port.")
parser.add_argument("--list-ports", dest="list_ports", action="store_true",
help="List available serial ports.")
parser.add_argument("--label-file", dest="label_file", default=config['DEFAULT'].get('labels', 'basic8'),
help="Specify the label file to use for dereference and lookup")
parser.add_argument("--count", dest="count", default="10", help="the number of bytes to read")
parser.add_argument("--dump", metavar="ADDRESS", dest="dump_address",
help="Read memory from the C256's memory and display it.")
parser.add_argument("--deref", metavar="LABEL", dest="deref_name",
help="Lookup the address stored at LABEL and display the memory there.")
parser.add_argument("--lookup", metavar="LABEL", dest="lookup_name",
help="Display the memory starting at the address indicated by the label.")
parser.add_argument("--revision", action="store_true", dest="revision",
help="Display the revision code of the debug interface.")
parser.add_argument("--flash", metavar="BINARY FILE", dest="flash_file",
help="Attempt to reprogram the flash using the binary file provided.")
parser.add_argument("--binary", metavar="BINARY FILE", dest="binary_file",
help="Upload a binary file to the C256's RAM.")
parser.add_argument("--address", metavar="ADDRESS", dest="address",
default=config['DEFAULT'].get('flash_address', '380000'),
help="Provide the starting address of the memory block to use in flashing memory.")
parser.add_argument("--upload", metavar="HEX FILE", dest="hex_file",
help="Attempt to reprogram the flash using the binary file provided.")
parser.add_argument("--upload-wdc", metavar="BINARY FILE", dest="wdc_file",
help="Upload a WDCTools binary hex file. (WDCLN.EXE -HZ)")
parser.add_argument("--upload-srec", metavar="SREC FILE", dest="srec_file",
help="Upload a Motorola SREC hex file.")
options = parser.parse_args()
try:
if options.port != "":
if options.hex_file:
send(options.port, options.hex_file)
elif options.wdc_file:
send_wdc(options.port, options.wdc_file)
elif options.srec_file:
send_srec(options.port, options.srec_file)
elif options.deref_name and options.label_file:
address = dereference(options.port, options.label_file, options.deref_name)
get(options.port, address, options.count)
elif options.lookup_name and options.label_file:
address = lookup(options.label_file, options.lookup_name)
get(options.port, address, options.count)
elif options.dump_address:
get(options.port, options.dump_address, options.count)
elif options.revision:
rev = revision(options.port)
print(rev)
elif options.address and options.binary_file:
upload_binary(options.port, options.binary_file, options.address)
elif options.address and options.flash_file:
program_flash(options.port, options.flash_file, options.address)
elif options.list_ports:
list_serial_ports()
else:
parser.print_help()
else:
parser.print_help()
finally:
print

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C256Mgr/foenix.py
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import serial
class FoenixDebugPort:
"""Provide the conneciton to a C256 Foenix debug port."""
connection = 0
status0 = 0
status1 = 0
def open(self, port):
"""Open a connection to the C256 Foenix."""
self.connection = serial.Serial(port=port,
baudrate=6000000,
bytesize=serial.EIGHTBITS,
parity=serial.PARITY_NONE,
stopbits=serial.STOPBITS_ONE,
timeout=60,
write_timeout=60)
try:
self.connection.open()
except:
self.connection.close()
self.connection.open()
def is_open(self):
return self.connection.is_open()
def close(self):
"""Close the connection to the C256 Foenix."""
self.connection.close()
def enter_debug(self):
"""Send the command to make the C256 Foenix enter its debug mode."""
self.transfer(0x80, 0, 0, 0)
def exit_debug(self):
"""Send the command to make the C256 Foenix leave its debug mode.
This will make the C256 reset.
"""
self.transfer(0x81, 0, 0, 0)
def erase_flash(self):
"""Send the command to have the C256 Foenix erase its flash memory."""
self.transfer(0x11, 0, 0, 0)
def get_revision(self):
"""Gets the revision code for the debug interface.
RevB2's revision code is 0, RevC4A is 1."""
self.transfer(0xFE, 0, 0, 0)
return self.status1
def program_flash(self, address):
"""Send the command to have the C256 Foenix reprogram its flash memory.
Data to be written should already be in the C256's RAM at address."""
self.transfer(0x10, address, 0, 0)
def write_block(self, address, data):
"""Write a block of data to the specified starting address in the C256's memory."""
self.transfer(0x01, address, data, 0)
def read_block(self, address, length):
"""Read a block of data of the specified length from the specified starting address of the C256's memory."""
return self.transfer(0x00, address, 0, length)
def readbyte(self):
b = self.connection.read(1)
return b[0]
def transfer(self, command, address, data, read_length):
"""Send a command to the C256 Foenix"""
self.status0 = 0
self.status1 = 0
lrc = 0
length = 0
if data == 0:
length = read_length
else:
length = len(data)
# if command == 0x80:
# print('Switching to debug mode')
# elif command == 0x81:
# print('Resetting')
# else:
# print('Writing data of length {:X} to {:X}'.format(length, address))
command_bytes = command.to_bytes(1, 'big')
address_bytes = address.to_bytes(3, 'big')
length_bytes = length.to_bytes(2, 'big')
header = bytearray(7)
header[0] = 0x55
header[1] = command_bytes[0]
header[2] = address_bytes[0]
header[3] = address_bytes[1]
header[4] = address_bytes[2]
header[5] = length_bytes[0]
header[6] = length_bytes[1]
for i in range(0, 6):
lrc = lrc ^ header[i]
if data:
for i in range(0, length):
lrc = lrc ^ data[i]
lrc_bytes = lrc.to_bytes(1, 'big')
if data:
packet = header + data + lrc_bytes
written = self.connection.write(packet)
if written != len(packet):
raise Exception("Could not write packet correctly.")
else:
packet = header + lrc_bytes
written = self.connection.write(packet)
if written != len(packet):
raise Exception("Could not write packet correctly.")
# print('Sent [{}]'.format(packet.hex()))
c = 0
while c != 0xAA:
c = self.readbyte()
# print('Got 0xAA')
read_bytes = 0
if c == 0xAA:
self.status0 = self.readbyte()
self.status1 = self.readbyte()
if read_length > 0:
read_bytes = self.connection.read(read_length)
read_lrc = self.readbyte()
# print("Status: {:X}, {:X}".format(self.status0, self.status1))
return read_bytes

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C256Mgr/intelhex.py
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import re
class HexFile:
"""Read information from an Intel Hex file."""
file = 0
base_address = 0
handler = 0
def __init__(self):
self.file = 0
self.base_address = 0
self.handler = 0
def open(self, filename):
self.file = open(filename, 'r')
def set_handler(self, proc):
self.handler = proc
def close(self):
self.file.close()
def read_lines(self):
line = self.file.readline()
while line:
self.parse_line(line)
line = self.file.readline()
def parse_line(self, line):
m = re.match("^:([0-9a-fA-F]{2})([0-9a-fA-F]{4})([0-9a-fA-F]{2})([0-9a-fA-F]*)([0-9a-fA-F]{2})", line)
size = int(m.group(1), 16)
address = int(m.group(2), 16)
code = int(m.group(3), 16)
data = m.group(4)
crc = int(m.group(5), 16)
if code == 0:
if self.handler:
# print('Sending record to {:X}'.format(self.base_address + address))
self.handler(self.base_address + address, data)
elif code == 2:
# Set the base address based on a segment
self.base_address = int(data, 16) << 4 # shity 80x86 real mode addressing : take the address an do *16 to get the final address
# print('Setting base address to {:X}'.format(self.base_address))
elif code == 4:
# Set the base address given on address[31..16]
self.base_address = int(data, 16) << 16
# print('Setting base address to {:X}'.format(self.base_address))

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C256Mgr/srec.py
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import re
def tailpad(data):
datalen = len(data)
pad = datalen % 4
if pad > 0:
return data.ljust(datalen + pad, '0')
else:
return data
class SRECFile:
"""Read information from a Motorola SREC file."""
file = 0
handler = 0
def __init__(self):
self.file = 0
self.handler = 0
def open(self, filename):
self.file = open(filename, 'r')
def set_handler(self, proc):
self.handler = proc
def close(self):
self.file.close()
def read_lines(self):
line = self.file.readline()
while line:
self.parse_line(line)
line = self.file.readline()
def parse_line(self, line):
# Format of line will vary based on the type, so let's get the type first
m = re.match("^S([0-9a-fA-F])([0-9a-fA-F]+)", line)
code = int(m.group(1), 16)
hex_digits = m.group(2)
# Codes...
# 0 = Comment/header
# 1 = Data with 16-bit address
# 2 = Data with 24-bit address
# 3 = Data with 32-bit address
# 4 = Reserved
# 5 = 16-bit record count
# 6 = 24-bit record count
# 7 = 32-bit start address
# 8 = 24-bit start address
# 9 = 16-bit start address
#
# This code will ignore all records by 1, 2, and 3
if code == 1:
# Unpack a record with a 16-bit address
m2 = re.match("^([0-9a-fA-F]{2})([0-9a-fA-F]{4})([0-9a-fA-F]*)([0-9a-fA-F]{2})", hex_digits)
count = int(m2.group(1), 16)
address = int(m2.group(2), 16)
data = m2.group(3)
crc = int(m2.group(4), 16)
self.handler(address, tailpad(data))
elif code == 2:
# Unpack a record with a 24-bit address
m2 = re.match("^([0-9a-fA-F]{2})([0-9a-fA-F]{6})([0-9a-fA-F]*)([0-9a-fA-F]{2})", hex_digits)
count = int(m2.group(1), 16)
address = int(m2.group(2), 16)
data = m2.group(3)
crc = int(m2.group(4), 16)
self.handler(address, tailpad(data))
elif code == 3:
# Unpack a record with a 32-bit address
m2 = re.match("^([0-9a-fA-F]{2})([0-9a-fA-F]{8})([0-9a-fA-F]*)([0-9a-fA-F]{2})", hex_digits)
count = int(m2.group(1), 16)
address = int(m2.group(2), 16)
data = m2.group(3)
crc = int(m2.group(4), 16)
self.handler(address, tailpad(data))

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C256Mgr/wdc.py
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from pathlib import Path
##
# See: http://www.westerndesigncenter.com/wdc/datasheets/Assembler_Linker.pdf
# page 37
#
# Initial byte 'Z' as signature.
#
# Then for each block:
# 3 byte address
# 3 byte length
# length bytes of data
#
# The final block has an address and length of 0.
#
class WdcBinFile:
"""Reads information from WDCTools BIN formated file"""
data = 0
handler = 0
def __init__(self):
pass
def open(self, filename):
self.data = Path(filename).read_bytes()
def close(self):
self.data = []
def set_handler(self, proc):
self.handler = proc
def read_blocks(self):
offset = 1
while offset < len(self.data):
(addr, block, offset) = self.__read_block(self.data, offset)
if addr > 0:
self.handler(addr, block)
def __read_block(self, data, offset):
addr = int.from_bytes(data[offset:offset+3], byteorder='little', signed=False)
size = int.from_bytes(data[offset+3:offset+6], byteorder='little', signed=False)
if addr == 0:
return (0, [], offset+6)
block = data[offset+6:offset+6+size]
return (addr, block, offset+6+size)

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Doxyfile
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FoenixMgr.zip Normal file
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c256.ini
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[DEFAULT]
port=COM5
labels=sample.lbl
flash_address=010000

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dump.bat
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@echo off
REM Print the contents of memory
REM usage: dump {start address} [{byte count}]
if [%2%]==[] (
python C256Mgr\c256mgr.py --dump %1
) ELSE (
python C256Mgr\c256mgr.py --dump %1 --count %2
)

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flash.bat
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@echo off
REM Reprogram the flash memory on the C256 Foenix
if [%2%]==[] (
python C256Mgr\c256mgr.py --flash %1
) ELSE (
python C256Mgr\c256mgr.py --flash %1 --address %2
)

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flash.sh
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#!/bin/sh
# This script will help you flash the Foenix from linux. Tested for A2560U only.
python3 C256Mgr/c256mgr.py --flash src/foenixmcp.bin --address 0x00000

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foenixmgr.ini Normal file
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[DEFAULT]
port=COM3
labels=sample.lbl
flash_address=380000
chunk_size=1024
cpu=65816

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lookup.bat
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@echo off
REM Print the contents of memory at the labeled address
REM usage: lookup {label}
if [%2%]==[] (
python C256Mgr\c256mgr.py --lookup %1
) ELSE (
python C256Mgr\c256mgr.py --lookup %1 --count %2
)

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revision.bat
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@echo off
REM Get the revision code of the C256 Foenix's debug interface
python C256Mgr\c256mgr.py --revision

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run256.bat
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@echo off
python C256Mgr\c256mgr.py --upload %1

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runsrec.bat
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@echo off
python C256Mgr\c256mgr.py --upload-srec %1

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src/C256/gentables.py Normal file
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#
# Generate the assembly files for both the system call library and the kernel jump tabls
#
sys_call_names = []
# Read in the list of system calls ("sys_")
with open("syscalls.txt", "r") as call_names:
for line in call_names:
# Remove comments
index = line.find("#")
if index == 0:
line = ""
elif index > 0:
line = line[index - 1:]
line = line.strip()
# Skip blank lines
if len(line) > 0:
sys_call_names.append(line)
# Create the system call table, which is used to call into the kernel jump table
with open("syscalls.s", "w") as f:
for call_name in sys_call_names:
f.write("\t.public sys_{}\n".format(call_name))
f.write("\n")
for call_name in sys_call_names:
f.write("\t.extern sjt_{}\n".format(call_name))
f.write("\n\t.section farcode\n\n");
for call_name in sys_call_names:
f.write("sys_{:26}\tjmp long:sjt_{}\n".format(call_name + ": ", call_name))
# Create the kernel jump table
with open("jumptable.s", "w") as f:
for call_name in sys_call_names:
f.write("\t.public sjt_{}\n".format(call_name))
f.write("\n")
for call_name in sys_call_names:
f.write("\t.extern {}\n".format(call_name))
f.write("\n\t.section jumptable\n\n");
for call_name in sys_call_names:
f.write("sjt_{:26}\tjmp long:{}\n".format(call_name + ": ", call_name))

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src/C256/io_stubs.c Normal file
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#include <stddef.h>
#include <stdio.h>
#include <stdlib.h>
#include "syscalls.h"
/****************************************************************************
* Name: _Stub_open
*
* Description:
* Open a file.
* The oflag argument are POSIX style mode flags, e.g O_RDONLY which
* are defined in fcntl.h.
* This function is variadic as it optionally can take a mode_t that
* are permissions, e.g 0666. If the file system does not handle
* permissions you can ignore that this function is variadic.
* The return file descriptor shall be a positive number, larger
* than 2 (as 0-2 are used for stdin, stdout and stderr).
* The actual number does not matter and they need not to be
* consequtive, multiple numeric series with gaps between can be used.
*
* Return the obtained file descriptor or EOF (-1) on failure and set
* errno according to the error.
*
****************************************************************************/
int _Stub_open(const char *path, int oflag, ...) {
return -1;
}
/****************************************************************************
* Name: _Stub_close
*
* Description:
* Close a file
*
* Return 0 if operation was OK, EOF otherwise and set errno according to
* the error.
* Note: This will only be invoked for streams opened by _Stub_open(),
* there is no need to check for the standard descriptor 0-2.
*
****************************************************************************/
int _Stub_close(int fd) {
return 0;
}
/****************************************************************************
* Name: _Stub_access
*
* Description:
* Determine if a file can be accessed.
*
****************************************************************************/
int _Stub_access(const char *path, int mode) {
return 0;
}
/****************************************************************************
* Name: _Stub_lseek
*
* Description:
* Change position in a file
*
* Returns the new position in the file in bytes from the beginning of the
* file, or -1 on failure.
*
****************************************************************************/
long _Stub_lseek(int fd, long offset, int whence) {
return 0;
}
/****************************************************************************
* Name: _Stub_fgetpos
*
* Description:
* Change position in a file
*
* Returns 0 on success, non-zero otherwise. In case of an error also set
* errno according to error.
*
****************************************************************************/
int _Stub_fgetpos(int fd, fpos_t *pos) {
return 0;
}
/****************************************************************************
* Name: _Stub_fsetpos
*
* Description:
* Change position in a file
*
* Returns 0 on success, non-zero otherwise. In case of an error also set
* errno according to error.
*
****************************************************************************/
int _Stub_fsetpos(int fd, const fpos_t *pos) {
return 0;
}
/****************************************************************************
* Name: _Stub_read
*
* Description:
* Read from a file
*
* Returns the number of characters read. Return -1 on failure and set
* errno according to the error.
*
****************************************************************************/
size_t _Stub_read(int fd, void *buf, size_t count) {
return 0;
}
/****************************************************************************
* Name: _Stub_write
*
* Description:
* Write to a file
*
* Returns the number of characters actually written. Return -1 on failure and
* set errno according to the error.
*
****************************************************************************/
size_t _Stub_write(int fd, const void *buf, size_t count) {
short channel = 0;
switch (fd) {
case 0:
channel = 0;
break;
case 1:
channel = 0;
break;
case 2:
channel = 1;
break;
default:
channel = 0;
break;
}
for (int i = 0; i < count; i++) {
sys_txt_put(channel, ((const char *)buf)[i]);
}
return count;
}
/****************************************************************************
* Name: _Stub_rename
*
* Description:
* Rename a file or directory
*
* Return 0 on success, -1 otherwise and set errno according to the
* error.
*
****************************************************************************/
int _Stub_rename(const char *oldpath, const char *newpath) {
return 0;
}
/****************************************************************************
* Name: _Stub_remove
*
* Description:
* Remove a file or directory
*
* Return 0 on success, -1 otherwise and set errno according to the
* error.
*
****************************************************************************/
int _Stub_remove(const char *path) {
return 0;
}
/****************************************************************************
* Name: _Stub_exit
*
* Description:
* Terminate the program with an exit code, exit clean-ups are done
* before this function is (finally) called.
*
****************************************************************************/
void _Stub_exit(int exitCode) {
while (1) ;
}
/****************************************************************************
* Name: _Stub_environ
*
* Description:
* Get the environment. On UNIX this is typically a global variable
* 'environ', but in order to make it more flexible and avoid having
* such global variable (which is not part of the C standard) it is
* obtained using the stub interface.
*
* Note:
* This stub function is not implemented by the semi-hosted debug stub
* interface.
*
****************************************************************************/
char** _Stub_environ(void) {
return 0;
}

163
src/C256/jumptable.s Normal file
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@ -0,0 +1,163 @@
.public sjt_int_enable_all
.public sjt_int_disable_all
.public sjt_int_disable
.public sjt_int_enable
.public sjt_int_register
.public sjt_int_pending
.public sjt_get_info
.public sjt_int_clear
.public sjt_chan_read_b
.public sjt_chan_read
.public sjt_chan_readline
.public sjt_chan_write_b
.public sjt_chan_write
.public sjt_chan_status
.public sjt_chan_flush
.public sjt_chan_seek
.public sjt_chan_ioctrl
.public sjt_chan_open
.public sjt_chan_close
.public sjt_chan_swap
.public sjt_chan_device
.public sjt_bdev_register
.public sjt_bdev_read
.public sjt_bdev_write
.public sjt_bdev_status
.public sjt_bdev_flush
.public sjt_bdev_ioctrl
.public sjt_mem_get_ramtop
.public sjt_mem_reserve
.public sjt_time_jiffies
.public sjt_rtc_set_time
.public sjt_rtc_get_time
.public sjt_kbd_scancode
.public sjt_err_message
.public sjt_kbd_layout
.public sjt_var_set
.public sjt_var_get
.public sjt_txt_get_capabilities
.public sjt_txt_set_mode
.public sjt_txt_setsizes
.public sjt_txt_set_xy
.public sjt_txt_get_xy
.public sjt_txt_get_region
.public sjt_txt_set_region
.public sjt_txt_set_color
.public sjt_txt_get_color
.public sjt_txt_set_cursor_visible
.public sjt_txt_set_font
.public sjt_txt_get_sizes
.public sjt_txt_set_border
.public sjt_txt_set_border_color
.public sjt_txt_put
.public sjt_txt_print
.extern int_enable_all
.extern int_disable_all
.extern int_disable
.extern int_enable
.extern int_register
.extern int_pending
.extern get_info
.extern int_clear
.extern chan_read_b
.extern chan_read
.extern chan_readline
.extern chan_write_b
.extern chan_write
.extern chan_status
.extern chan_flush
.extern chan_seek
.extern chan_ioctrl
.extern chan_open
.extern chan_close
.extern chan_swap
.extern chan_device
.extern bdev_register
.extern bdev_read
.extern bdev_write
.extern bdev_status
.extern bdev_flush
.extern bdev_ioctrl
.extern mem_get_ramtop
.extern mem_reserve
.extern time_jiffies
.extern rtc_set_time
.extern rtc_get_time
.extern kbd_scancode
.extern err_message
.extern kbd_layout
.extern var_set
.extern var_get
.extern txt_get_capabilities
.extern txt_set_mode
.extern txt_setsizes
.extern txt_set_xy
.extern txt_get_xy
.extern txt_get_region
.extern txt_set_region
.extern txt_set_color
.extern txt_get_color
.extern txt_set_cursor_visible
.extern txt_set_font
.extern txt_get_sizes
.extern txt_set_border
.extern txt_set_border_color
.extern txt_put
.extern txt_print
.section jumptable
sjt_int_enable_all: jmp long:int_enable_all
sjt_int_disable_all: jmp long:int_disable_all
sjt_int_disable: jmp long:int_disable
sjt_int_enable: jmp long:int_enable
sjt_int_register: jmp long:int_register
sjt_int_pending: jmp long:int_pending
sjt_get_info: jmp long:get_info
sjt_int_clear: jmp long:int_clear
sjt_chan_read_b: jmp long:chan_read_b
sjt_chan_read: jmp long:chan_read
sjt_chan_readline: jmp long:chan_readline
sjt_chan_write_b: jmp long:chan_write_b
sjt_chan_write: jmp long:chan_write
sjt_chan_status: jmp long:chan_status
sjt_chan_flush: jmp long:chan_flush
sjt_chan_seek: jmp long:chan_seek
sjt_chan_ioctrl: jmp long:chan_ioctrl
sjt_chan_open: jmp long:chan_open
sjt_chan_close: jmp long:chan_close
sjt_chan_swap: jmp long:chan_swap
sjt_chan_device: jmp long:chan_device
sjt_bdev_register: jmp long:bdev_register
sjt_bdev_read: jmp long:bdev_read
sjt_bdev_write: jmp long:bdev_write
sjt_bdev_status: jmp long:bdev_status
sjt_bdev_flush: jmp long:bdev_flush
sjt_bdev_ioctrl: jmp long:bdev_ioctrl
sjt_mem_get_ramtop: jmp long:mem_get_ramtop
sjt_mem_reserve: jmp long:mem_reserve
sjt_time_jiffies: jmp long:time_jiffies
sjt_rtc_set_time: jmp long:rtc_set_time
sjt_rtc_get_time: jmp long:rtc_get_time
sjt_kbd_scancode: jmp long:kbd_scancode
sjt_err_message: jmp long:err_message
sjt_kbd_layout: jmp long:kbd_layout
sjt_var_set: jmp long:var_set
sjt_var_get: jmp long:var_get
sjt_txt_get_capabilities: jmp long:txt_get_capabilities
sjt_txt_set_mode: jmp long:txt_set_mode
sjt_txt_setsizes: jmp long:txt_setsizes
sjt_txt_set_xy: jmp long:txt_set_xy
sjt_txt_get_xy: jmp long:txt_get_xy
sjt_txt_get_region: jmp long:txt_get_region
sjt_txt_set_region: jmp long:txt_set_region
sjt_txt_set_color: jmp long:txt_set_color
sjt_txt_get_color: jmp long:txt_get_color
sjt_txt_set_cursor_visible: jmp long:txt_set_cursor_visible
sjt_txt_set_font: jmp long:txt_set_font
sjt_txt_get_sizes: jmp long:txt_get_sizes
sjt_txt_set_border: jmp long:txt_set_border
sjt_txt_set_border_color: jmp long:txt_set_border_color
sjt_txt_put: jmp long:txt_put
sjt_txt_print: jmp long:txt_print

24
src/C256/ld_lc_c256_fmx.scm Normal file
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@ -0,0 +1,24 @@
(define memories
'((memory flash (address (#x390000 . #x3fffff))
(type rom))
(memory DirectPage (address (#x000000 . #x0000ff))
(section (registers ztiny)))
(memory LoRAM (address (#x004000 . #x008fff))
(section stack data zdata data heap))
(memory NearRAM1 (address (#x010000 . #x017fff))
(section znear near))
(memory NearRAM2 (address (#x018000 . #x01ffff))
(section cnear))
(memory FarRAM1 (address (#x020000 . #x02ffff))
(section far huge))
(memory FarRAM2 (address (#x030000 . #x03ffff))
(section zfar zhuge ))
(memory LoCODE (address (#x00a000 . #x00efff))
(section code cdata jumptable))
(memory Vector (address (#x00ffe0 . #x00ffff))
(section (reset #xfffc)))
(block stack (size #x1000))
(block heap (size #x1000))
(base-address _DirectPageStart DirectPage 0)
(base-address _NearBaseAddress NearRAM1 0)
))

163
src/C256/syscalls.s Normal file
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@ -0,0 +1,163 @@
.public sys_int_enable_all
.public sys_int_disable_all
.public sys_int_disable
.public sys_int_enable
.public sys_int_register
.public sys_int_pending
.public sys_get_info
.public sys_int_clear
.public sys_chan_read_b
.public sys_chan_read
.public sys_chan_readline
.public sys_chan_write_b
.public sys_chan_write
.public sys_chan_status
.public sys_chan_flush
.public sys_chan_seek
.public sys_chan_ioctrl
.public sys_chan_open
.public sys_chan_close
.public sys_chan_swap
.public sys_chan_device
.public sys_bdev_register
.public sys_bdev_read
.public sys_bdev_write
.public sys_bdev_status
.public sys_bdev_flush
.public sys_bdev_ioctrl
.public sys_mem_get_ramtop
.public sys_mem_reserve
.public sys_time_jiffies
.public sys_rtc_set_time
.public sys_rtc_get_time
.public sys_kbd_scancode
.public sys_err_message
.public sys_kbd_layout
.public sys_var_set
.public sys_var_get
.public sys_txt_get_capabilities
.public sys_txt_set_mode
.public sys_txt_setsizes
.public sys_txt_set_xy
.public sys_txt_get_xy
.public sys_txt_get_region
.public sys_txt_set_region
.public sys_txt_set_color
.public sys_txt_get_color
.public sys_txt_set_cursor_visible
.public sys_txt_set_font
.public sys_txt_get_sizes
.public sys_txt_set_border
.public sys_txt_set_border_color
.public sys_txt_put
.public sys_txt_print
.extern sjt_int_enable_all
.extern sjt_int_disable_all
.extern sjt_int_disable
.extern sjt_int_enable
.extern sjt_int_register
.extern sjt_int_pending
.extern sjt_get_info
.extern sjt_int_clear
.extern sjt_chan_read_b
.extern sjt_chan_read
.extern sjt_chan_readline
.extern sjt_chan_write_b
.extern sjt_chan_write
.extern sjt_chan_status
.extern sjt_chan_flush
.extern sjt_chan_seek
.extern sjt_chan_ioctrl
.extern sjt_chan_open
.extern sjt_chan_close
.extern sjt_chan_swap
.extern sjt_chan_device
.extern sjt_bdev_register
.extern sjt_bdev_read
.extern sjt_bdev_write
.extern sjt_bdev_status
.extern sjt_bdev_flush
.extern sjt_bdev_ioctrl
.extern sjt_mem_get_ramtop
.extern sjt_mem_reserve
.extern sjt_time_jiffies
.extern sjt_rtc_set_time
.extern sjt_rtc_get_time
.extern sjt_kbd_scancode
.extern sjt_err_message
.extern sjt_kbd_layout
.extern sjt_var_set
.extern sjt_var_get
.extern sjt_txt_get_capabilities
.extern sjt_txt_set_mode
.extern sjt_txt_setsizes
.extern sjt_txt_set_xy
.extern sjt_txt_get_xy
.extern sjt_txt_get_region
.extern sjt_txt_set_region
.extern sjt_txt_set_color
.extern sjt_txt_get_color
.extern sjt_txt_set_cursor_visible
.extern sjt_txt_set_font
.extern sjt_txt_get_sizes
.extern sjt_txt_set_border
.extern sjt_txt_set_border_color
.extern sjt_txt_put
.extern sjt_txt_print
.section farcode
sys_int_enable_all: jmp long:sjt_int_enable_all
sys_int_disable_all: jmp long:sjt_int_disable_all
sys_int_disable: jmp long:sjt_int_disable
sys_int_enable: jmp long:sjt_int_enable
sys_int_register: jmp long:sjt_int_register
sys_int_pending: jmp long:sjt_int_pending
sys_get_info: jmp long:sjt_get_info
sys_int_clear: jmp long:sjt_int_clear
sys_chan_read_b: jmp long:sjt_chan_read_b
sys_chan_read: jmp long:sjt_chan_read
sys_chan_readline: jmp long:sjt_chan_readline
sys_chan_write_b: jmp long:sjt_chan_write_b
sys_chan_write: jmp long:sjt_chan_write
sys_chan_status: jmp long:sjt_chan_status
sys_chan_flush: jmp long:sjt_chan_flush
sys_chan_seek: jmp long:sjt_chan_seek
sys_chan_ioctrl: jmp long:sjt_chan_ioctrl
sys_chan_open: jmp long:sjt_chan_open
sys_chan_close: jmp long:sjt_chan_close
sys_chan_swap: jmp long:sjt_chan_swap
sys_chan_device: jmp long:sjt_chan_device
sys_bdev_register: jmp long:sjt_bdev_register
sys_bdev_read: jmp long:sjt_bdev_read
sys_bdev_write: jmp long:sjt_bdev_write
sys_bdev_status: jmp long:sjt_bdev_status
sys_bdev_flush: jmp long:sjt_bdev_flush
sys_bdev_ioctrl: jmp long:sjt_bdev_ioctrl
sys_mem_get_ramtop: jmp long:sjt_mem_get_ramtop
sys_mem_reserve: jmp long:sjt_mem_reserve
sys_time_jiffies: jmp long:sjt_time_jiffies
sys_rtc_set_time: jmp long:sjt_rtc_set_time
sys_rtc_get_time: jmp long:sjt_rtc_get_time
sys_kbd_scancode: jmp long:sjt_kbd_scancode
sys_err_message: jmp long:sjt_err_message
sys_kbd_layout: jmp long:sjt_kbd_layout
sys_var_set: jmp long:sjt_var_set
sys_var_get: jmp long:sjt_var_get
sys_txt_get_capabilities: jmp long:sjt_txt_get_capabilities
sys_txt_set_mode: jmp long:sjt_txt_set_mode
sys_txt_setsizes: jmp long:sjt_txt_setsizes
sys_txt_set_xy: jmp long:sjt_txt_set_xy
sys_txt_get_xy: jmp long:sjt_txt_get_xy
sys_txt_get_region: jmp long:sjt_txt_get_region
sys_txt_set_region: jmp long:sjt_txt_set_region
sys_txt_set_color: jmp long:sjt_txt_set_color
sys_txt_get_color: jmp long:sjt_txt_get_color
sys_txt_set_cursor_visible: jmp long:sjt_txt_set_cursor_visible
sys_txt_set_font: jmp long:sjt_txt_set_font
sys_txt_get_sizes: jmp long:sjt_txt_get_sizes
sys_txt_set_border: jmp long:sjt_txt_set_border
sys_txt_set_border_color: jmp long:sjt_txt_set_border_color
sys_txt_put: jmp long:sjt_txt_put
sys_txt_print: jmp long:sjt_txt_print

79
src/C256/syscalls.txt Normal file
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@ -0,0 +1,79 @@
# A list of system calls to be used to autogenerate the various jump tables and sys calls stubs\
# proc_exit
int_enable_all
int_disable_all
int_disable
int_enable
int_register
int_pending
get_info
int_clear
chan_read_b
chan_read
chan_readline
chan_write_b
chan_write
chan_status
chan_flush
chan_seek
chan_ioctrl
chan_open
chan_close
chan_swap
chan_device
bdev_register
bdev_read
bdev_write
bdev_status
bdev_flush
bdev_ioctrl
# fsys_open
# fsys_close
# fsys_opendir
# fsys_closedir
# fsys_readdir
# fsys_findfirst
# fsys_findnext
# fsys_get_label
# fsys_set_label
# fsys_mkdir
# fsys_delete
# fsys_rename
# fsys_set_cwd
# fsys_get_cwd
# fsys_load
# fsys_register_loader
# fsys_stat
mem_get_ramtop
mem_reserve
time_jiffies
rtc_set_time
rtc_get_time
kbd_scancode
err_message
kbd_layout
# proc_run
var_set
var_get
txt_get_capabilities
txt_set_mode
txt_setsizes
txt_set_xy
txt_get_xy
txt_get_region
txt_set_region
txt_set_color
txt_get_color
txt_set_cursor_visible
txt_set_font
txt_get_sizes
txt_set_border
txt_set_border_color
txt_put
txt_print

40
src/C256/syscalls_c256.c Normal file
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@ -0,0 +1,40 @@
#include "syscalls.h"
#include "interrupt.h"
#include "sys_general.h"
#include "timers.h"
#include "dev/channel.h"
#include "dev/block.h"
#include "dev/ps2.h"
#include "dev/rtc.h"
/**
* @brief Translation file to map system calls into the irregularly named implementations.
*
*/
/*
* Get the number of jiffies since the system last booted.
*
* Returns:
* the number of jiffies since the last reset
*/
long time_jiffies() {
return timers_jiffies();
}
/*
* Fill out a s_sys_info structure with the information about the current system
*
* Inputs:
* info = pointer to a s_sys_info structure to fill out
*/
void get_info(p_sys_info info) {
sys_get_information(info);
}
/*
* Return the next scan code from the keyboard... 0 if nothing pending
*/
unsigned short kbd_scancode() {
return kbd_get_scancode();
}

326
src/Makefile
View file

@ -1,11 +1,32 @@
#
# User may over-ride the UNIT and MEMORY parameters to specify target machine
# and where the MCP will run (ram or flash)
#
UNIT := a2560x
MEMORY := flash
UNIT := C256U_PLUS
MEMORY := ram
# The script expects the following environment variables to be set:
# VBCC: path to VBCC distribution
# Define OS-dependent tools ---------------------------------------------------
ifeq ("$(PAD_FLASH_SIZE)","")
# When compiling an image for flash, size to which the image must be padded
PAD_FLASH_SIZE = 524288
endif
ifeq ($(OS),Windows_NT)
RM = del /F/Q
PAD_CMD = fsutil file seteof $@ $(PAD_FLASH_SIZE)
SEP= \$ # Leave this as is, it's a trick
PYTHON3=python
else
RM = rm -f
PAD_CMD = truncate -s $(PAD_FLASH_SIZE) $@
SEP = /
PYTHON3=python3
endif
# The below doesn't seem true !
# CPU_WDC65816 0x16 /* CPU code for the Western Design Center 65816 */
# CPU_M68000 0x20 /* CPU code for the Motorola 68000 */
# CPU_M68010 0x21 /* CPU code for the Motorola 68010 */
@ -23,66 +44,71 @@ MEMORY := flash
# MODEL_FOENIX_A2560U 9
# MODEL_FOENIX_A2560K 11
# Determine target CPU and MODEL based on the UNIT
# The comments are on a separate line to avoid inserting white space in the commande line where these variables are used
# Unit-specific properties ----------------------------------------------------
ifeq ($(UNIT),a2560k)
# M68040V
export CPU_NUMBER = 6
# VASM CPU flag
export VASM_CPU = -m68040
# VBCC CPU flag
export VBCC_CPU = 68040
# A2560K
export MODEL_NUMBER = 11
export cpu = m68040
MODEL_NUMBER = 11
CPU = m68040
MODEL_FAMILY = GENX32
else ifeq ($(UNIT),genx)
# M68040V
export CPU_NUMBER = 6
# VASM CPU flag
export VASM_CPU = -m68040
# VBCC CPU flag
export VBCC_CPU = 68040
# GenX
export MODEL_NUMBER = 4
export cpu = m68040
MODEL_NUMBER = 4
CPU = m68040
MODEL_FAMILY = GENX32
else ifeq ($(UNIT),a2560x)
# M68040V
export CPU_NUMBER = 6
# VASM CPU flag
export VASM_CPU = -m68040
# VBCC CPU flag
export VBCC_CPU = 68040
# A2560X
export MODEL_NUMBER = 8
export cpu = m68040
MODEL_NUMBER = 8
CPU = m68040
MODEL_FAMILY = GENX32
else ifeq ($(UNIT),a2560u)
# M680SEC00
export CPU_NUMBER = 0
# VASM CPU flag
export VASM_CPU = -m68000
# VBCC CPU flag
export VBCC_CPU = 68000
export MODEL_NUMBER = 9
export cpu = m68k
MODEL_NUMBER = 9
CPU = m68k
else ifeq ($(UNIT),a2560u_plus)
MODEL_NUMBER = 6
CPU = m68k
else ifeq ($(UNIT),C256U)
CPU = w65816
MODEL_NUMBER = 1
SRCS_FOR_UNIT =
LDFLAGS_FOR_UNIT = C256/ld_lc_c256_u.scm clib-lc-ld.a
else ifeq ($(UNIT),C256U_PLUS)
MODEL_NUMBER = 5
CPU = w65816
SRCS_FOR_UNIT = C256/jumptable.s C256/syscalls.s C256/syscalls_c256.c C256/io_stubs.c
LDFLAGS_FOR_UNIT = C256/ld_lc_c256_fmx.scm clib-lc-ld.a --rtattr printf=medium
else ifeq ($(UNIT),C256_FMX)
CPU = w65816
MODEL_NUMBER = 0
SRCS_FOR_UNIT =
LDFLAGS_FOR_UNIT = C256/ld_lc_c256_fmx.scm clib-lc-ld.a
endif
# Determine the correct configuration file (barring OS)
ifeq ($(MEMORY),ram)
export CFG_FILE = $(VBCC)/config/$(UNIT)_ram
else
export CFG_FILE = $(VBCC)/config/$(UNIT)_flash
# Log settings ----------------------------------------------------------------
# FATAL 0 Log a critical or fatal event
# ERROR 1 Log an error
# INFO 2 Log miscellaneous information
# DEBUG 3 Log a debugging message
# TRACE 4 Log tracing information (like entry into a subroutine)
# VERBOSE 5 Log a truly verbose message... the sort you almost never want to bother with
# Log message above DEFAULT_LOG_LEVEL level will not even be compiled,
# ie they will have NO chance of being output even if log_level is high enough.
DEFAULT_LOG_LEVEL=1
# Common defines and includes -------------------------------------------------
DEFINES = -DCPU=$(CPU_NUMBER) -DMODEL=$(MODEL_NUMBER) # -DKBD_POLLED
ifeq ("$(CPU)","w65816")
CPU_NUMBER = 255
else ifeq ("$(CPU)","m68040") # M68040V or 68040
CPU_NUMBER = 6
else ifeq ("$(CPU)","m68k") # M68000 or 68SEC000
CPU_NUMBER = 0
endif
export AS = vasmm68k_mot
export ASFLAGS = $(VASM_CPU) -quiet -Fvobj -nowarn=62 -DMODEL=$(MODEL_NUMBER)
export CC = vc
DEFINES = -DCPU=$(CPU_NUMBER) -DMODEL=$(MODEL_NUMBER) # -D__NOINLINE__ # -DKBD_POLLED
# Maximum working logging level to compile
#define LOG_FATAL 0 /* Log a critical or fatal event */
#define LOG_ERROR 1 /* Log an error */
@ -91,11 +117,14 @@ DEFINES = -DCPU=$(CPU_NUMBER) -DMODEL=$(MODEL_NUMBER) # -D__NOINLINE__ # -DKBD_P
#define LOG_TRACE 4 /* Log tracing information (like entry into a subroutine) */
#define LOG_VERBOSE 5 /* Log a truly verbose message... the sort you almost never want to bother with */
DEFAULT_LOG_LEVEL=0
#define LOG_CHANNEL_UART0 -1
#define LOG_CHANNEL_CHANNEL_A 0
#define LOG_CHANNEL_CHANNEL_B 1
#define LOG_CHANNEL_CHANNEL_A_LOW_LEVEL 10
LOG_CHANNEL=0
#define LOG_CHANNEL_CHANNEL_A_LOW_LEVEL 2 // low-level routines (doesn't use MCP's console stuff)
#define LOG_CHANNEL_COM1 10
#define LOG_CHANNEL_COM2 11
LOG_CHANNEL=11
ifeq ("$(DEFAULT_LOG_LEVEL)","")
else
DEFINES := $(DEFINES) -DDEFAULT_LOG_LEVEL=$(DEFAULT_LOG_LEVEL)
@ -105,89 +134,172 @@ else
DEFINES := $(DEFINES) -DLOG_CHANNEL=$(LOG_CHANNEL)
endif
export DEFINES:=$(DEFINES)
# When compiling an image for flash, size to which the image must be padded
PAD_FLASH_SIZE=524288
INCLUDES = -I. -I$(CURDIR)/include -I$(CURDIR)
ifeq ($(OS),Windows_NT)
export CFLAGS = -cpu=$(VBCC_CPU) +$(CFG_FILE) -I. -I$(CURDIR)/include -I$(CURDIR)
export RM = cmd /C del /Q /F
PAD_CMD = fsutil file setEOF $@ $(PAD_FLASH_SIZE)
else
export CFLAGS = -cpu=$(VBCC_CPU) +$(CFG_FILE)_linux -I. -I$(CURDIR)/include -I$(CURDIR)
export RM = rm -f
PAD_CMD = truncate -s $(PAD_FLASH_SIZE) $@
INCLUDES := $(subst /,$(SEP),$(INCLUDES))
endif
cpu_assembly_src := $(wildcard $(cpu)/*.s)
cpu_c_src := $(wildcard $(cpu)/*.c)
cpu_assembly_obj := $(subst .s,.o,$(cpu_assembly_src))
cpu_c_obj := $(subst .c,.o,$(cpu_c_src))
dev_base_sources = dev/block.c dev/channel.c dev/console.c dev/fsys.c dev/pata.c dev/ps2.c dev/rtc.c dev/sdc.c dev/txt_screen.c dev/uart.c
# Toolchain selection ---------------------------------------------------------
ifeq ($(CPU),w65816)
TOOLCHAIN = calypsi
else
TOOLCHAIN = vbcc
endif
# Toolchain specific settings -------------------------------------------------
ifeq ($(TOOLCHAIN),calypsi)
CC = cc65816
AS = as65816
LD = ln65816
AR = nlib
# Determine the correct configuration file (barring OS)
ifeq ($(MEMORY),ram)
LD_OUTPUT_TYPE = s37
else
LD_OUTPUT_TYPE = # TODO
endif
CFLAGS = -l --target Foenix --code-model large --data-model large
LDFLAGS=--target foenix --output-format $(LD_OUTPUT_TYPE) --list-file foenixmcp.map
else
CC = vc
AS = vasmm68k_mot
# VBCC
ifeq ("$(CPU)","m68k")
VASM_CPU = -m68000
VBCC_CPU = 68000
else ifeq ("$(CPU)","m68040")
VASM_CPU = -m68040
VBCC_CPU = 68040
endif
# Determine the correct configuration file (barring OS)
ifeq ($(MEMORY),ram)
CFG_FILE = $(VBCC)/config/$(UNIT)_ram
else
CFG_FILE = $(VBCC)/config/$(UNIT)_flash
endif
ifneq ($(OS),Windows_NT)
CFG_FILE := $(CFG_FILE)_linux
else
CFG_FILE := $(subst /,$(SEP),$(CFG_FILE))
endif
ASFLAGS = -Fvobj -nowarn=62 $(VASM_CPU) -quiet
ifneq ($(MODEL_FAMILY),GENX32)
# Inline functions cause problems (at least on the X)
CFLAGS_EXTRA=-D__NOINLINE__
else
endif
CFLAGS =-c -S -cpu=$(VBCC_CPU) +$(CFG_FILE) $(CFLAGS_EXTRA)
LDFLAGS = +$(CFG_FILE)
endif
# Flags (are automatically used by make) --------------------------------------
ASFLAGS := $(ASFLAGS) $(DEFINES) $(INCLUDES)
CFLAGS := $(CFLAGS) $(DEFINES) $(INCLUDES)
LDFLAGS := $(LDFLAGS) $(LDFLAGS_FOR_UNIT)
# New make file (Calypsi / 1_makefile per folder). This needs adaptation (removal?)
SRCS = foenixmcp.c log.c memory.c ring_buffer.c simpleio.c sys_general.c variables.c utilities.c $(SRCS_FOR_UNIT)
OBJS = $(patsubst %.s,%.o,$(patsubst %.c,%.o,$(SRCS)))
OBJS_TO_CLEAN = $(subst /,\\,$(OBJS))
LIBS = dev/devices.a snd/sound.a fatfs/fatfs.a
# Splashscreen
SPLASHSCREEN = rsrc/bitmaps/splash_$(UNIT).o
# CPU-specific files
cpu_s_src := $(wildcard $(CPU)/*.s)
cpu_c_src := $(wildcard $(CPU)/*.c)
cpu_obj := $(subst .c,.o,$(cpu_c_src)) $(subst .s,.o,$(cpu_s_src))
# Device drivers (common to all Foenix)
dev_c_src = block.c channel.c console.c fsys.c pata.c ps2.c rtc.c sdc.c txt_screen.c uart.c
dev_s_src =
ifeq ($(UNIT),a2560k)
dev_c_src := $(dev_base_sources) dev/fdc.c dev/kbd_mo.c dev/lpt.c dev/midi.c dev/txt_a2560k_a.o dev/txt_a2560k_b.o m68040/fdc_m68040.o
dev_c_src := $(dev_c_src) fdc.c kbd_mo.c lpt.c midi.c txt_a2560k_a.c txt_a2560k_b.c superio.c
else ifeq ($(UNIT),genx)
dev_c_src := $(dev_base_sources) dev/fdc.c dev/lpt.c dev/midi.c dev/txt_a2560k_a.o dev/txt_a2560k_b.o m68040/fdc_m68040.o
dev_c_src := $(dev_c_src) fdc.c lpt.c midi.c txt_a2560k_a.c txt_a2560k_b.c superio.c
else ifeq ($(UNIT),a2560x)
dev_c_src := $(dev_base_sources) dev/fdc.c dev/lpt.c dev/midi.c dev/txt_a2560k_a.o dev/txt_a2560k_b.o m68040/fdc_m68040.o
dev_c_src := $(dev_c_src) fdc.c lpt.c midi.c txt_a2560k_a.c txt_a2560k_b.c superio.c
else ifeq ($(UNIT),a2560u)
dev_c_src := $(dev_base_sources) dev/txt_a2560u.o
else
dev_c_src := $(dev_base_sources)
dev_c_src := $(dev_c_src) txt_a2560u.o
endif
dev_c_obj := $(subst .c,.o,$(dev_c_src))
dev_obj := $(addprefix dev/, $(subst .c,.o,$(dev_c_src))) $(addprefix dev/, $(subst .s,.o,$(dev_s_src)))
snd_c_src := $(wildcard snd/*.c)
snd_c_obj := $(subst .c,.o,$(snd_c_src))
# Sound drivers
snd_c_src = codec.c psg.c sid.c yamaha.c
ifeq ($(UNIT),C256_FMX)
snd_c_src = $(snd_c_src) codec_c256.c
endif
snd_obj := $(addprefix snd/, $(subst .c,.o,$(snd_c_src)))
# File system
fat_c_src := $(wildcard fatfs/*.c)
fat_c_obj := $(subst .c,.o,$(fat_c_src))
fatfs_obj := $(subst .c,.o,$(fat_c_src))
# Command Line Interface
cli_c_src := $(wildcard cli/*.c)
cli_c_obj := $(subst .c,.o,$(cli_c_src))
cli_obj := $(subst .c,.o,$(cli_c_src))
# Base MCP files
c_src := $(wildcard *.c)
c_obj := $(subst .c,.o,$(c_src))
.PHONY: all $(cpu) dev fatfs snd cli
.PHONY: all clean $(CPU) dev fatfs snd cli
# Target selection ------------------------------------------------------------
ifeq ($(MEMORY),ram)
all: foenixmcp.s68 $(cpu) dev snd cli
# ifeq ($(CPU),"w65816")
#all:foenixmcp.s37
# else
all: foenixmcp.s68 $(CPU) dev snd cli
# endif
else
all: foenixmcp.bin $(cpu) dev snd cli
all: foenixmcp.bin $(CPU) dev snd cli
endif
$(cpu):
$(MAKE) --directory=$@
# Per-folder libraries (used by Calypsi)
foenixmcp.s37: $(OBJS) $(LIBS)
$(LD) $(LDFLAGS) -o $@ $(subst /,$(SEP),$^)
dev:
$(MAKE) --directory=dev
fatfs:
$(MAKE) --directory=fatfs
DEPS = $(cpu_obj) $(c_obj) $(dev_obj) $(fatfs_obj) $(snd_obj) $(cli_obj) $(SPLASHSCREEN)
snd:
$(MAKE) --directory=snd
# We don't want to link:
# - the startup file (because the linker script does it)
# - the splashscreen because it's #included from somewhere (boot.c)
# So we remove them from the string of files to link.
STARTUP_OBJ=$(CPU)/startup_$(CPU).o
FILES_TO_LINK= $(subst $(STARTUP_OBJ),,$(DEPS))
FILE_TO_LINK:=$(subst /,$(SEP),$(FILES_TO_LINK))
cli:
$(MAKE) --directory=cli
foenixmcp.s68: $(DEPS)
$(CC) $(LDFLAGS) -o $@ $(FILES_TO_LINK)
foenixmcp.s68: $(c_obj) $(cpu) dev fatfs snd cli
$(CC) $(CFLAGS) $(DEFINES) -o foenixmcp.s68 $(c_obj) $(cpu_c_obj) $(dev_c_obj) $(fat_c_obj) $(snd_c_obj) $(cli_c_obj)
foenixmcp.bin: $(c_obj) $(cpu) dev fatfs snd cli
$(CC) $(CFLAGS) $(DEFINES) -o foenixmcp.bin $(c_obj) $(cpu_c_obj) $(dev_c_obj) $(fat_c_obj) $(snd_c_obj) $(cli_c_obj)
foenixmcp.bin: $(DEPS)
$(CC) $(LDFLAGS) -o $@ $(FILES_TO_LINK)
# TODO Test that the file is <= PAD_FLASH_SIZE bytes otherwise'll be slashing the OS !
$(PAD_CMD)
%.o: %.c $(DEPS)
$(CC) -S -c -o $@ $< $(CFLAGS) $(DEFINES)
.PHONEY: clean
# Rule for generating include file containing RLE-compressed version of BMP splashscreen
# You need python3 installed obviously, and install some extra packages you can install with:
# pip3 install Image
# pip3 install pillow
rsrc/bitmaps/splash_%.c: rsrc/bitmaps/splash_%.bmp
$(PYTHON3) rsrc/bitmaps/bmp2c.py -i $^ -o $@
# Clean up after a build
clean:
$(RM) *.s68 *.o *.asm
$(MAKE) --directory=$(cpu) clean
$(RM) $(subst /,$(SEP),$(OBJS_TO_CLEAN)) $(subst /,$(SEP),$(DEPS)) foenixmcp.s37 *.lst *.map
$(MAKE) --directory=$(CPU) clean
$(MAKE) --directory=cli clean
$(MAKE) --directory=dev clean
$(MAKE) --directory=fatfs clean
$(MAKE) --directory=snd clean
$(MAKE) --directory=cli clean

76
src/Makefile.PeterC256 Normal file
View file

@ -0,0 +1,76 @@
UNIT := C256U_PLUS
MEMORY := RAM
# Define OS-dependent variables
ifeq ($(OS),Windows_NT)
RM = del /F/Q
else
RM = rm -f
endif
# Define model-specific variables, including tools, source files, compiler flags, etc.
ifeq ($(UNIT),C256U)
CPU=w65816
SRCS_FOR_UNIT=
CFLAGS_FOR_UNIT=-DMODEL=1 -DCPU=255 --target Foenix --code-model large --data-model large
LDFLAGS_FOR_UNIT=C256/ld_lc_c256_u.scm clib-lc-ld.a
else ifeq ($(UNIT),C256U_PLUS)
CPU=w65816
SRCS_FOR_UNIT=C256/jumptable.s C256/syscalls.s C256/syscalls_c256.c C256/io_stubs.c
CFLAGS_FOR_UNIT=-DMODEL=5 -DCPU=255 --target Foenix --code-model large --data-model large
LDFLAGS_FOR_UNIT=C256/ld_lc_c256_fmx.scm clib-lc-ld.a --rtattr printf=medium
else ifeq ($(UNIT),C256_FMX)
CPU=w65816
SRCS_FOR_UNIT=
CFLAGS_FOR_UNIT=-DMODEL=0 -DCPU=255 --target Foenix --code-model large --data-model large
LDFLAGS_FOR_UNIT=C256/ld_lc_c256_fmx.scm clib-lc-ld.a
endif
ifeq ($(CPU),w65816)
CC=cc65816
AS=as65816
LD=ln65816
AR=nlib
endif
INCLUDES=-I. -I./include
CFLAGS=$(INCLUDES) $(CFLAGS_FOR_UNIT) -l
ASFLAGS=$(INCLUDES)
LDFLAGS=--target foenix --output-format s37 $(LDFLAGS_FOR_UNIT) --list-file foenixmcp.map
SRCS = foenixmcp.c log.c memory.c ring_buffer.c simpleio.c sys_general.c variables.c utilities.c $(SRCS_FOR_UNIT)
OBJS = $(patsubst %.s,%.o,$(patsubst %.c,%.o,$(SRCS)))
OBJS4RM = $(subst /,\\,$(OBJS))
LIBS = dev/devices.a snd/sound.a fatfs/fatfs.a
.PHONY: clean
foenixmcp.s37: $(OBJS) $(LIBS)
$(LD) $(LDFLAGS) -o $@ $^
dev/devices.a:
$(MAKE) --directory=dev
snd/sound.a:
$(MAKE) --directory=snd
fatfs/fatfs.a:
$(MAKE) --directory=fatfs
# Build the object files from C
%.o: %.c
$(CC) $(CFLAGS) -o $@ $^
# Build the object files from assembly
%.o: %.s
$(AS) $(ASFLAGS) -o $@ $^
# Clean up after a build
clean:
$(RM) $(OBJS4RM) foenixmcp.s37 *.lst *.map
$(MAKE) --directory=dev clean
$(MAKE) --directory=snd clean
$(MAKE) --directory=fatfs clean

176
src/Makefile_old Normal file
View file

@ -0,0 +1,176 @@
#
# User may over-ride the UNIT and MEMORY parameters to specify target machine
# and where the MCP will run (ram or flash)
#
UNIT := a2560x
MEMORY := flash
# CPU_WDC65816 0x16 /* CPU code for the Western Design Center 65816 */
# CPU_M68000 0x20 /* CPU code for the Motorola 68000 */
# CPU_M68010 0x21 /* CPU code for the Motorola 68010 */
# CPU_M68020 0x22 /* CPU code for the Motorola 68020 */
# CPU_M68030 0x23 /* CPU code for the Motorola 68030 */
# CPU_M68040 0x24 /* CPU code for the Motorola 68040 */
# CPU_I486DX 0x34 /* CPU code for the Intel 486DX */
# MODEL_FOENIX_FMX 0
# MODEL_FOENIX_C256U 1
# MODEL_FOENIX_GENX 4
# MODEL_FOENIX_C256U_PLUS 5
# MODEL_FOENIX_A2560U_PLUS 6
# MODEL_FOENIX_A2560X 8
# MODEL_FOENIX_A2560U 9
# MODEL_FOENIX_A2560K 11
# Determine target CPU and MODEL based on the UNIT
# The comments are on a separate line to avoid inserting white space in the commande line where these variables are used
ifeq ($(UNIT),a2560k)
# M68040V
export CPU_NUMBER = 6
# VASM CPU flag
export VASM_CPU = -m68040
# VBCC CPU flag
export VBCC_CPU = 68040
# A2560K
export MODEL_NUMBER = 11
export cpu = m68040
else ifeq ($(UNIT),genx)
# M68040V
export CPU_NUMBER = 6
# VASM CPU flag
export VASM_CPU = -m68040
# VBCC CPU flag
export VBCC_CPU = 68040
# GenX
export MODEL_NUMBER = 4
export cpu = m68040
else ifeq ($(UNIT),a2560x)
# M68040V
export CPU_NUMBER = 6
# VASM CPU flag
export VASM_CPU = -m68040
# VBCC CPU flag
export VBCC_CPU = 68040
# A2560X
export MODEL_NUMBER = 8
export cpu = m68040
else ifeq ($(UNIT),a2560u)
# M680SEC00
export CPU_NUMBER = 0
# VASM CPU flag
export VASM_CPU = -m68000
# VBCC CPU flag
export VBCC_CPU = 68000
export MODEL_NUMBER = 9
export cpu = m68k
endif
# Determine the correct configuration file (barring OS)
ifeq ($(MEMORY),ram)
export CFG_FILE = $(VBCC)/config/$(UNIT)_ram
else
export CFG_FILE = $(VBCC)/config/$(UNIT)_flash
endif
export AS = vasmm68k_mot
export ASFLAGS = $(VASM_CPU) -quiet -Fvobj -nowarn=62 -DMODEL=$(MODEL_NUMBER)
export CC = vc
DEFINES = -DCPU=$(CPU_NUMBER) -DMODEL=$(MODEL_NUMBER) # -DKBD_POLLED
# Logging level
ifeq ("$(DEFAULT_LOG_LEVEL)","")
else
DEFINES := $(DEFINES) -DDEFAULT_LOG_LEVEL=$(DEFAULT_LOG_LEVEL)
endif
export DEFINES:=$(DEFINES)
# When compiling an image for flash, size to which the image must be padded
PAD_FLASH_SIZE=524288
ifeq ($(OS),Windows_NT)
export CFLAGS = -cpu=$(VBCC_CPU) +$(CFG_FILE) -I. -I$(CURDIR)/include -I$(CURDIR)
export RM = cmd /C del /Q /F
PAD_CMD = fsutil seteof $@ $(PAD_FLASH_SIZE)
else
export CFLAGS = -cpu=$(VBCC_CPU) +$(CFG_FILE)_linux -I. -I$(CURDIR)/include -I$(CURDIR)
export RM = rm -f
PAD_CMD = truncate -s $(PAD_FLASH_SIZE) $@
endif
cpu_assembly_src := $(wildcard $(cpu)/*.s)
cpu_c_src := $(wildcard $(cpu)/*.c)
cpu_assembly_obj := $(subst .s,.o,$(cpu_assembly_src))
cpu_c_obj := $(subst .c,.o,$(cpu_c_src))
dev_base_sources = dev/block.c dev/channel.c dev/console.c dev/fsys.c dev/pata.c dev/ps2.c dev/rtc.c dev/sdc.c dev/txt_screen.c dev/uart.c
ifeq ($(UNIT),a2560k)
dev_c_src := $(dev_base_sources) dev/fdc.c dev/kbd_mo.c dev/lpt.c dev/midi.c dev/txt_a2560k_a.o dev/txt_a2560k_b.o m68040/fdc_m68040.o
else ifeq ($(UNIT),genx)
dev_c_src := $(dev_base_sources) dev/fdc.c dev/lpt.c dev/midi.c dev/txt_a2560k_a.o dev/txt_a2560k_b.o m68040/fdc_m68040.o
else ifeq ($(UNIT),a2560x)
dev_c_src := $(dev_base_sources) dev/fdc.c dev/lpt.c dev/midi.c dev/txt_a2560k_a.o dev/txt_a2560k_b.o m68040/fdc_m68040.o
else ifeq ($(UNIT),a2560u)
dev_c_src := $(dev_base_sources) dev/txt_a2560u.o
else
dev_c_src := $(dev_base_sources)
endif
dev_c_obj := $(subst .c,.o,$(dev_c_src))
snd_c_src := $(wildcard snd/*.c)
snd_c_obj := $(subst .c,.o,$(snd_c_src))
fat_c_src := $(wildcard fatfs/*.c)
fat_c_obj := $(subst .c,.o,$(fat_c_src))
cli_c_src := $(wildcard cli/*.c)
cli_c_obj := $(subst .c,.o,$(cli_c_src))
c_src := $(wildcard *.c)
c_obj := $(subst .c,.o,$(c_src))
.PHONY: all $(cpu) dev fatfs snd cli
ifeq ($(MEMORY),ram)
all: foenixmcp.s68 $(cpu) dev snd cli
else
all: foenixmcp.bin $(cpu) dev snd cli
endif
$(cpu):
$(MAKE) --directory=$@
dev:
$(MAKE) --directory=dev
fatfs:
$(MAKE) --directory=fatfs
snd:
$(MAKE) --directory=snd
cli:
$(MAKE) --directory=cli
foenixmcp.s68: $(c_obj) $(cpu) dev fatfs snd cli
$(CC) $(CFLAGS) $(DEFINES) -o foenixmcp.s68 $(c_obj) $(cpu_c_obj) $(dev_c_obj) $(fat_c_obj) $(snd_c_obj) $(cli_c_obj)
foenixmcp.bin: $(c_obj) $(cpu) dev fatfs snd cli
$(CC) $(CFLAGS) $(DEFINES) -o foenixmcp.bin $(c_obj) $(cpu_c_obj) $(dev_c_obj) $(fat_c_obj) $(snd_c_obj) $(cli_c_obj)
$(PAD_CMD)
%.o: %.c $(DEPS)
$(CC) -S -c -o $@ $< $(CFLAGS) $(DEFINES)
.PHONEY: clean
clean:
$(RM) *.s68 *.o *.asm
$(MAKE) --directory=$(cpu) clean
$(MAKE) --directory=dev clean
$(MAKE) --directory=fatfs clean
$(MAKE) --directory=snd clean
$(MAKE) --directory=cli clean

35
src/boot.c
View file

@ -26,13 +26,14 @@
#include "dev/txt_screen.h"
#include "rsrc/font/quadrotextFONT.h"
#include "rsrc/bitmaps/image.h" /* Splashscreen */
#if MODEL == MODEL_FOENIX_A2560U || MODEL == MODEL_FOENIX_A2560U_PLUS
#include "rsrc/bitmaps/splash_a2560u.h"
#include "dev/txt_a2560u.h"
#elif MODEL == MODEL_FOENIX_A2560K
#include "rsrc/bitmaps/splash_a2560k.h"
//#include "rsrc/bitmaps/splash_a2560k.h"
#elif MODEL == MODEL_FOENIX_A2560X || MODEL == MODEL_FOENIX_GENX
#include "rsrc/bitmaps/splash_a2560x.h"
//#include "rsrc/bitmaps/splash_a2560x.h"
#elif MODEL == MODEL_FOENIX_C256U || MODEL == MODEL_FOENIX_C256U_PLUS || MODEL == MODEL_FOENIX_FMX
#endif
#if MODEL == MODEL_FOENIX_A2560K
@ -191,7 +192,7 @@ void make_key_name(const char * original, char * buffer) {
*
* @return boot device selected by user
*/
short boot_screen() {
short boot_screen(void) {
t_rect region;
short device = BOOT_DEFAULT;
short screen;
@ -213,10 +214,10 @@ short boot_screen() {
screen = 0;
/* Turn off the screen */
txt_set_mode(screen, 0);
txt_set_mode(screen, TXT_MODE_SLEEP);
for (i = 0; i < 256; i++) {
LUT_0[4*i] = splashscreen_lut[4*i];
LUT_0[4*i+0] = splashscreen_lut[4*i+0];
LUT_0[4*i+1] = splashscreen_lut[4*i+1];
LUT_0[4*i+2] = splashscreen_lut[4*i+2];
LUT_0[4*i+3] = splashscreen_lut[4*i+3];
@ -225,10 +226,10 @@ short boot_screen() {
#if 1
/* Copy the bitmap to video RAM, it has simple RLE compression */
for (pixels = splashscreen_pix; *pixels != 0;) {
unsigned char count = *pixels++;
unsigned char pixel = *pixels++;
uint8_t count = *pixels++;
uint8_t color = *pixels++;
for (i = 0; i < count; i++) {
*vram++ = pixel;
*vram++ = color;
}
}
#else
@ -244,7 +245,7 @@ short boot_screen() {
#endif
/* Set up the bitmap */
*BM0_Addy_Pointer_Reg = 0; /* Start of VRAM */
*BM0_Control_Reg = 1;
*BM0_Control_Reg = 1; /* Enable bitmap layer, use LUT 0 */
/* Set a background color for the bitmap mode */
#if HAS_DUAL_SCREEN
@ -280,7 +281,7 @@ short boot_screen() {
make_key_name("RETURN", cr_text);
#if HAS_FLOPPY
sprintf(buffer, "BOOT: %s=SD CARD, %s=HARD DRIVE, s=FLOPPY, %s=DEFAULT, %s=SAFE", f1, f2, f3, space, cr_text);
sprintf(buffer, "BOOT: %s=SD CARD, %s=HARD DRIVE, %s=FLOPPY, %s=DEFAULT, %s=SAFE", f1, f2, f3, space, cr_text);
#else
sprintf(buffer, "BOOT: %s=SD CARD, %s=HARD DRIVE, %s=DEFAULT, %s=SAFE", f1, f2, space, cr_text);
#endif
@ -304,7 +305,7 @@ short boot_screen() {
str_upcase(info.cpu_name, entry);
sprintf(buffer, " CPU: %s\n", entry);
print(screen, buffer);
sprintf(buffer, " CLOCK (KHZ): %u\n", info.cpu_clock_khz);
sprintf(buffer, " CLOCK (KHZ): %lu\n", info.cpu_clock_khz);
print(screen, buffer);
sprintf(buffer, " FPGA V: %u.%02u.%04u\n", (unsigned int)info.fpga_model, info.fpga_version, info.fpga_subver);
print(screen, buffer);
@ -394,14 +395,14 @@ void boot_from_bdev(short device) {
case 0x0000:
// Boot from IDE
device = BDEV_HDC;
log(LOG_INFO, "Boot DIP set for IDE");
INFO("Boot DIP set for IDE");
strcpy(initial_path, "/hd");
break;
case 0x0001:
// Boot from SDC
device = BDEV_SDC;
log(LOG_INFO, "Boot DIP set for SDC");
INFO("Boot DIP set for SDC");
strcpy(initial_path, "/sd");
break;
@ -409,13 +410,13 @@ void boot_from_bdev(short device) {
case 0x0002:
// Boot from Floppy
device = BDEV_FDC;
log(LOG_INFO, "Boot DIP set for FDC");
INFO("Boot DIP set for FDC");
strcpy(initial_path, "/fd");
break;
#endif
default:
// Boot straight to REPL
log(LOG_INFO, "Boot DIP set for REPL");
INFO("Boot DIP set for REPL");
strcpy(initial_path, "/sd");
device = -1;
break;

62
src/cli/Makefile
View file

@ -1,13 +1,59 @@
csources = $(wildcard *.c)
cobjects = $(subst .c,.o,$(csources))
.PHONY: all
all: $(cobjects)
UNIT := C256U_PLUS
# Define OS-dependent variables
ifeq ($(OS),Windows_NT)
RM = del /F/Q
else
RM = rm -f
endif
# Define model-specific variables, including tools, source files, compiler flags, etc.
ifeq ($(UNIT),C256U)
CC=cc65816
AS=as65816
AR=nlib
SRCS_FOR_UNIT=
CFLAGS_FOR_UNIT=-DMODEL=1 -DCPU=255 --target Foenix --code-model large --data-model large
else ifeq ($(UNIT),C256U_PLUS)
CC=cc65816
AS=as65816
AR=nlib
SRCS_FOR_UNIT=
CFLAGS_FOR_UNIT=-DMODEL=5 -DCPU=255 --target Foenix --code-model large --data-model large
else ifeq ($(UNIT),C256_FMX)
CC=cc65816
AS=as65816
AR=nlib
SRCS_FOR_UNIT=
CFLAGS_FOR_UNIT=-DMODEL=0 -DCPU=255 --target Foenix --code-model large --data-model large
endif
INCLUDES=-I.. -I../include
CFLAGS=$(INCLUDES) $(CFLAGS_FOR_UNIT) -l
ASFLAGS=$(INCLUDES)
SRCS = cli.c dos_cmds.c dos_copy.c mem_cmds.c settings.c sound_cmds.c test_cmd2.c $(SRCS_FOR_UNIT)
OBJS = $(patsubst %.c,%.o,$(SRCS))
OBJS4RM = $(subst /,\\,$(OBJS))
.PHONY: all clean
all: cli.a
# Build the CLI library file for this model
cli.a: $(OBJS)
$(AR) $@ $^
# Build the object files from C
%.o: %.c
$(CC) -c -o $@ $< $(CFLAGS) $(DEFINES)
.PHONY: clean
$(CC) $(CFLAGS) -o $@ $^
# Clean up after a build
clean:
$(RM) $(aobjects) $(cobjects) *.asm
$(RM) $(OBJS4RM) cli.a *.lst

16
src/cli/cli.c
View file

@ -173,19 +173,21 @@ void cli_command_set(const char * path) {
}
cli_command_path[i] = c;
}
TRACE1("Setting SHELL: %s", cli_command_path);
result = sys_var_set("SHELL", cli_command_path);
if (result) {
log(LOG_ERROR, "Unable to set SHELL");
ERROR("Unable to set SHELL");
}
TRACE("SHELL Set");
} else {
// Set to the default CLI
result = sys_var_set("SHELL", 0);
if (result) {
log(LOG_ERROR, "Unable to set SHELL");
ERROR("Unable to set SHELL");
}
}
TRACE("Leaving cli_command_set");
}
/**
@ -279,7 +281,7 @@ short cmd_sysinfo(short channel, int argc, const char * argv[]) {
sprintf(buffer, "CPU: %s\n", cli_sys_info.cpu_name);
print(channel, buffer);
sprintf(buffer, "Clock (kHz): %u\n", cli_sys_info.cpu_clock_khz);
sprintf(buffer, "Clock (kHz): %lu\n", cli_sys_info.cpu_clock_khz);
print(channel, buffer);
sprintf(buffer, "System Memory: 0x%lX\n", cli_sys_info.system_ram_size);
@ -986,7 +988,7 @@ short cli_start_repl(short channel, const char * init_cwd) {
result = sys_fsys_set_cwd(init_cwd);
if (result) {
char message[80];
sprintf(message, "Unable to set startup directory: %s\n", err_message(result));
sprintf(message, "Unable to set startup directory: %s\n", sys_err_message(result));
print(g_current_channel, message);
}
}
@ -1002,7 +1004,7 @@ short cli_start_repl(short channel, const char * init_cwd) {
print(0, "Unable to start ");
print(0, cli_command_path);
print(0, ": ");
print(0, err_message(result));
print(0, sys_err_message(result));
while (1) ;
}
return 0;
@ -1036,7 +1038,7 @@ void cli_rerepl() {
print(0, "Unable to start ");
print(0, cli_command_path);
print(0, ": ");
print(0, err_message(result));
print(0, sys_err_message(result));
while (1) ;
}

12
src/cli/dos_cmds.c
View file

@ -423,9 +423,9 @@ short cmd_type(short screen, int argc, const char * argv[]) {
short n = chan_read(fd, buffer, 128);
log_num(LOG_INFO, "cmd_type chan_read: ", n);
if (n > 0) {
log(LOG_INFO, "cmd_type chan_write: ");
logmsg(LOG_INFO, "cmd_type chan_write: ");
chan_write(screen, buffer, n);
log(LOG_INFO, "/cmd_type chan_write: ");
logmsg(LOG_INFO, "/cmd_type chan_write: ");
} else {
break;
}
@ -439,7 +439,7 @@ short cmd_type(short screen, int argc, const char * argv[]) {
return fd;
}
} else {
log(LOG_ERROR, "Usage: TYPE <path>");
logmsg(LOG_ERROR, "Usage: TYPE <path>");
return -1;
}
}
@ -460,9 +460,9 @@ short cmd_load(short screen, int argc, const char * argv[]) {
short result = fsys_load(argv[1], destination, &start);
if (result == 0) {
if (start != 0) {
log(LOG_INFO, "Loaded file with a start adddress.");
logmsg(LOG_INFO, "Loaded file with a start adddress.");
} else {
log(LOG_INFO, "File loaded.");
logmsg(LOG_INFO, "File loaded.");
}
} else {
err_print(screen, "Unable to open file", result);
@ -471,7 +471,7 @@ short cmd_load(short screen, int argc, const char * argv[]) {
return result;
} else {
log(LOG_ERROR, "Usage: LOAD <path> [<destination>]");
logmsg(LOG_ERROR, "Usage: LOAD <path> [<destination>]");
return -1;
}
}

20
src/cli/mem_cmds.c
View file

@ -37,13 +37,13 @@ short mem_cmd_dump(short channel, int argc, const char * argv[]) {
return 0;
} else {
log(LOG_ERROR, "USAGE: DUMP <address> <count>");
logmsg(LOG_ERROR, "USAGE: DUMP <address> <count>");
return -1;
}
}
void test_thunk() {
log(LOG_ERROR, "CALL is working.");
logmsg(LOG_ERROR, "CALL is working.");
}
/*
@ -83,11 +83,11 @@ short mem_cmd_dasm(short channel, int argc, const char * argv[]) {
return 0;
} else {
log(LOG_ERROR, "USAGE: DASM <address> <count>");
logmsg(LOG_ERROR, "USAGE: DASM <address> <count>");
return -1;
}
#else
log(LOG_ERROR, "DASM only available on m68k machines");
logmsg(LOG_ERROR, "DASM only available on m68k machines");
return -1;
#endif
@ -108,7 +108,7 @@ short mem_cmd_poke8(short channel, int argc, const char * argv[]) {
return 0;
} else {
log(LOG_ERROR, "USAGE: POKE8 <address> <value>");
logmsg(LOG_ERROR, "USAGE: POKE8 <address> <value>");
return -1;
}
}
@ -129,7 +129,7 @@ short mem_cmd_peek8(short channel, int argc, const char * argv[]) {
return c;
} else {
log(LOG_ERROR, "USAGE: PEEK8 <address>");
logmsg(LOG_ERROR, "USAGE: PEEK8 <address>");
return -1;
}
}
@ -149,7 +149,7 @@ short mem_cmd_poke16(short channel, int argc, const char * argv[]) {
return 0;
} else {
log(LOG_ERROR, "USAGE: POKE16 <address> <value>");
logmsg(LOG_ERROR, "USAGE: POKE16 <address> <value>");
return -1;
}
}
@ -169,7 +169,7 @@ short mem_cmd_peek16(short channel, int argc, const char * argv[]) {
return c;
} else {
log(LOG_ERROR, "USAGE: PEEK16 <address>");
logmsg(LOG_ERROR, "USAGE: PEEK16 <address>");
return -1;
}
}
@ -189,7 +189,7 @@ short mem_cmd_poke32(short channel, int argc, const char * argv[]) {
return 0;
} else {
log(LOG_ERROR, "USAGE: POKE32 <address> <value>");
logmsg(LOG_ERROR, "USAGE: POKE32 <address> <value>");
return -1;
}
}
@ -209,7 +209,7 @@ short mem_cmd_peek32(short channel, int argc, const char * argv[]) {
return 0;
} else {
log(LOG_ERROR, "USAGE: PEEK32 <address>");
logmsg(LOG_ERROR, "USAGE: PEEK32 <address>");
return -1;
}
}

58
src/cli/sound_cmds.c
View file

@ -3,6 +3,7 @@
*/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "features.h"
@ -658,8 +659,12 @@ short opn_test(short channel, int argc, const char * argv[]) {
}
#endif
#if HAS_OPL3
const unsigned char opl3_tone_on[] = {
const uint16_t opl3_tone_on[] = {
#if 1 // 7-channel tone with enveloppes and feeback
//0x01,0x00, /* initialise */
0x00bd, 0x40, 0x00bd, 0xc0, 0x0043, 0x00, 0x0023, 0x03, 0x0023, 0x23, 0x0063, 0xf0, 0x0063, 0xff, 0x0083, 0x00, 0x0083, 0x05, 0x0043, 0x2b, 0x0023, 0x23, 0x0023, 0x23, 0x00c0, 0x00, 0x00c0, 0x06, 0x0040, 0x00, 0x0020, 0x02, 0x0020, 0x22, 0x0060, 0xf0, 0x0060, 0xf2, 0x0080, 0x40, 0x0080, 0x45, 0x0040, 0x00, 0x0020, 0x22, 0x0020, 0x22, 0x00b0, 0x0a, 0x00a0, 0x8c, 0x00b1, 0x0b, 0x00a1, 0x35, 0x00b2, 0x0b, 0x00a2, 0xd1, 0x00b3, 0x0e, 0x00a3, 0x8b, 0x00b4, 0x06, 0x00a4, 0x8e, 0x00b5, 0x02, 0x00a5, 0x93, 0x00c0, 0x36, 0x00c0, 0x37, 0x00b0, 0x2a, 0x0044, 0x00, 0x0024, 0x03, 0x0024, 0x23, 0x0064, 0xf0, 0x0064, 0xff, 0x0084, 0x00, 0x0084, 0x05, 0x0044, 0x2b, 0x0024, 0x23, 0x0024, 0x23, 0x00c0, 0x36, 0x00c1, 0x06, 0x0041, 0x00, 0x0021, 0x02, 0x0021, 0x22, 0x0061, 0xf0, 0x0061, 0xf2, 0x0081, 0x40, 0x0081, 0x45, 0x0041, 0x00, 0x0021, 0x22, 0x0021, 0x22, 0x00b0, 0x2a, 0x00a0, 0x8c, 0x00b1, 0x0b, 0x00a1, 0x35, 0x00b2, 0x0b, 0x00a2, 0xd1, 0x00b3, 0x0e, 0x00a3, 0x8b, 0x00b4, 0x06, 0x00a4, 0x8e, 0x00b5, 0x02, 0x00a5, 0x93, 0x00c1, 0x36, 0x00c1, 0x37, 0x00b1, 0x2b, 0x0045, 0x00, 0x0025, 0x03, 0x0025, 0x23, 0x0065, 0xf0, 0x0065, 0xff, 0x0085, 0x00, 0x0085, 0x05, 0x0045, 0x2b, 0x0025, 0x23, 0x0025, 0x23, 0x00c0, 0x36, 0x00c2, 0x06, 0x0042, 0x00, 0x0022, 0x02, 0x0022, 0x22, 0x0062, 0xf0, 0x0062, 0xf2, 0x0082, 0x40, 0x0082, 0x45, 0x0042, 0x00, 0x0022, 0x22, 0x0022, 0x22, 0x00b0, 0x2a, 0x00a0, 0x8c, 0x00b1, 0x2b, 0x00a1, 0x35, 0x00b2, 0x0b, 0x00a2, 0xd1, 0x00b3, 0x0e, 0x00a3, 0x8b, 0x00b4, 0x06, 0x00a4, 0x8e, 0x00b5, 0x02, 0x00a5, 0x93, 0x00c2, 0x36, 0x00c2, 0x37, 0x00b2, 0x2b, 0x004b, 0x00, 0x002b, 0x03, 0x002b, 0x23, 0x006b, 0xf0, 0x006b, 0xff, 0x008b, 0x00, 0x008b, 0x05, 0x004b, 0x2b, 0x002b, 0x23, 0x002b, 0x23, 0x00c0, 0x36, 0x00c3, 0x06, 0x0048, 0x00, 0x0028, 0x02, 0x0028, 0x22, 0x0068, 0xf0, 0x0068, 0xf2, 0x0088, 0x40, 0x0088, 0x45, 0x0048, 0x00, 0x0028, 0x22, 0x0028, 0x22, 0x00b0, 0x2a, 0x00a0, 0x8c, 0x00b1, 0x2b, 0x00a1, 0x35, 0x00b2, 0x2b, 0x00a2, 0xd1, 0x00b3, 0x0e, 0x00a3, 0x8b, 0x00b4, 0x06, 0x00a4, 0x8e, 0x00b5, 0x02, 0x00a5, 0x93, 0x00c3, 0x36, 0x00c3, 0x37, 0x00b3, 0x2e, 0x004c, 0x00, 0x002c, 0x03, 0x002c, 0x23, 0x006c, 0xf0, 0x006c, 0xff, 0x008c, 0x00, 0x008c, 0x05, 0x004c, 0x2b, 0x002c, 0x23, 0x002c, 0x23, 0x00c0, 0x36, 0x00c4, 0x06, 0x0049, 0x00, 0x0029, 0x02, 0x0029, 0x22, 0x0069, 0xf0, 0x0069, 0xf2, 0x0089, 0x40, 0x0089, 0x45, 0x0049, 0x00, 0x0029, 0x22, 0x0029, 0x22, 0x00b0, 0x2a, 0x00a0, 0x8c, 0x00b1, 0x2b, 0x00a1, 0x35, 0x00b2, 0x2b, 0x00a2, 0xd1, 0x00b3, 0x2e, 0x00a3, 0x8b, 0x00b4, 0x06, 0x00a4, 0x8e, 0x00b5, 0x02, 0x00a5, 0x93, 0x00c4, 0x36, 0x00c4, 0x37, 0x00b4, 0x26, 0x004d, 0x00, 0x002d, 0x03, 0x002d, 0x23, 0x006d, 0xf0, 0x006d, 0xff, 0x008d, 0x00, 0x008d, 0x05, 0x004d, 0x2b, 0x002d, 0x23, 0x002d, 0x23, 0x00c0, 0x36, 0x00c5, 0x06, 0x004a, 0x00, 0x002a, 0x02, 0x002a, 0x22, 0x006a, 0xf0, 0x006a, 0xf2, 0x008a, 0x40, 0x008a, 0x45, 0x004a, 0x00, 0x002a, 0x22, 0x002a, 0x22, 0x00b0, 0x2a, 0x00a0, 0x8c, 0x00b1, 0x2b, 0x00a1, 0x35, 0x00b2, 0x2b, 0x00a2, 0xd1, 0x00b3, 0x2e, 0x00a3, 0x8b, 0x00b4, 0x26, 0x00a4, 0x8e, 0x00b5, 0x02, 0x00a5, 0x93, 0x00c5, 0x36, 0x00c5, 0x37, 0x00b5, 0x22, 0x0053, 0x00, 0x0033, 0x03, 0x0033, 0x23, 0x0073, 0xf0, 0x0073, 0xff, 0x0093, 0x00, 0x0093, 0x05, 0x0053, 0x2b, 0x0033, 0x23, 0x0033, 0x23, 0x00c0, 0x36, 0x00c6, 0x06, 0x0050, 0x00, 0x0030, 0x02, 0x0030, 0x22, 0x0070, 0xf0, 0x0070, 0xf2, 0x0090, 0x40, 0x0090, 0x45, 0x0050, 0x00, 0x0030, 0x22, 0x0030, 0x22, 0x00b0, 0x2a, 0x00a0, 0x8c, 0x00b1, 0x2b, 0x00a1, 0x35, 0x00b2, 0x2b, 0x00a2, 0xd1, 0x00b3, 0x2e, 0x00a3, 0x8b, 0x00b4, 0x26, 0x00a4, 0x8e, 0x00b5, 0x22, 0x00a5, 0x93, 0x00c6, 0x36, 0x00c6, 0x37, 0x00b6, 0x20,
#else // single tone
0x01,0x00, /* initialise */
0x05,0x01, /* OPL3 mode, necessary for stereo */
0xc0,0x31, /* both channel, parallel connection */
@ -692,15 +697,14 @@ const unsigned char opl3_tone_on[] = {
/* block 0, key on */
0xb0,0x32,
#endif
/* end of sequence marker */
0xff
0xffff
};
const unsigned char opl3_tone_off[] = {
/* block 0, key off */
0xb0,0x00,
const uint8_t opl3_tone_off[] = {
/* block 0 to 6, key off */
0xb0, 0x00, 0xb1, 0x00, 0xb2, 0x00, 0xb3, 0x00, 0xb4, 0x00, 0xb5, 0x00, 0xb6, 0x00,
/* end of sequence marker */
0xff
};
@ -710,23 +714,34 @@ const unsigned char opl3_tone_off[] = {
*/
short opl3_test(short channel, int argc, const char * argv[]) {
short i;
unsigned char reg;
unsigned short reg;
unsigned char data;
long target_time;
// Delay between sending bytes. If none, it seems (on the A2560U at least) some commands are missed.
// Maybe the FIFO managed by Beatrix to feed the YM262 gets too full?
// Even a tiny delay is enough to avoid the issue.
long delay = argc > 0 ? atol(argv[1]) : 10;
print(channel, "Loading data into OPL3...\n");
i = 0;
while (1) {
reg = opl3_tone_on[i++];
if (reg == 0xff) {
if (reg == 0xffff)
break;
} else {
data = opl3_tone_on[i++];
//print_hex_32(channel, (unsigned long)(&OPL3_PORT[reg]));print(channel, " ");print_hex_8(channel, data);print(channel, "\n");
OPL3_PORT[reg] = data;
}
if (delay)
for (int j=0; j<delay; j++);
}
target_time = sys_time_jiffies() + 60;
while (target_time > sys_time_jiffies()) ;
print(channel, "Playing now. Press 'ESC' to quit.");
while (sys_kbd_scancode() != 0x01 /*ESC scancode*/)
;
i = 0;
while (1) {
@ -736,12 +751,13 @@ short opl3_test(short channel, int argc, const char * argv[]) {
} else {
data = opl3_tone_off[i++];
OPL3_PORT[reg] = data;
if (delay)
for (int j=0; j<delay; j++);
}
}
return 0;
}
#endif
#if HAS_MIDI_PORTS
/*
@ -785,7 +801,7 @@ short midi_tx_test(short channel, int argc, const char * argv[]) {
sys_chan_close(midi);
} else {
sprintf(message, "Couldn't open MIDI port: %s\n", err_message(midi));
sprintf(message, "Couldn't open MIDI port: %s\n", sys_err_message(midi));
print(channel, message);
return 0;
}
@ -811,7 +827,7 @@ short midi_rx_test(short channel, int argc, const char * argv[]) {
while (scancode != 0x01) {
short input = sys_chan_read_b(midi);
if (input < 0) {
sprintf(message, "Could not read from MIDI port: %s\n", err_message(input));
sprintf(message, "Could not read from MIDI port: %s\n", sys_err_message(input));
print(channel, message);
return 0;
}
@ -834,7 +850,7 @@ short midi_rx_test(short channel, int argc, const char * argv[]) {
print_c(channel, '\n');
sys_chan_close(midi);
} else {
sprintf(message, "Couldn't open MIDI port: %s\n", err_message(midi));
sprintf(message, "Couldn't open MIDI port: %s\n", sys_err_message(midi));
print(channel, message);
return 0;
}
@ -863,7 +879,7 @@ short midi_loop_test(short channel, int argc, const char * argv[]) {
print(channel, "Sending: ");
result = sys_chan_write_b(midi, output);
if (result) {
sprintf(message, "Unable to write a byte to the MIDI ports: %s\n", err_message(result));
sprintf(message, "Unable to write a byte to the MIDI ports: %s\n", sys_err_message(result));
print(channel, message);
return 0;
}
@ -872,7 +888,7 @@ short midi_loop_test(short channel, int argc, const char * argv[]) {
short input = sys_chan_read_b(midi);
if (input < 0) {
sprintf(message, "Unable to read a byte to the MIDI ports: %s\n", err_message(input));
sprintf(message, "Unable to read a byte to the MIDI ports: %s\n", sys_err_message(input));
print(channel, message);
return 0;
}
@ -890,7 +906,7 @@ short midi_loop_test(short channel, int argc, const char * argv[]) {
sys_chan_write(channel, "\n", 1);
sys_chan_close(midi);
} else {
sprintf(message, "Couldn't open MIDI port: %s\n", err_message(midi));
sprintf(message, "Couldn't open MIDI port: %s\n", sys_err_message(midi));
print(channel, message);
return 0;
}

30
src/cli/test_cmd2.c
View file

@ -920,8 +920,34 @@ static short cli_test_textscroll (short screen, int argc, const char * argv[]) {
return 0;
}
static short cli_test_background (short screen, int argc, const char * argv[]) {
if (argc != 2) {
print (screen, "AARRGGBB color code missing.");
return 0;
}
uint32_t jiffies = sys_time_jiffies() + 60*3;
uint32_t old_ctrl = *MasterControlReg_A;
uint32_t old_rgb = *BackGroundControlReg_A;
uint32_t rgb = (uint32_t)cli_eval_number(argv[1]);
*MasterControlReg_A = (old_ctrl & 0xfffffff0) | (VKY3_MCR_TEXT_EN|VKY3_MCR_TEXT_OVRLY|VKY3_MCR_GRAPH_EN);
*BackGroundControlReg_A = rgb;
// Wait a bit
while (sys_time_jiffies() < jiffies);
*MasterControlReg_A = old_ctrl; // Bitmap+screen overlay
*BackGroundControlReg_A = old_rgb;
return 0;
}
const t_cli_test_feature cli_test_features[] = {
{"ANSI", "ANSI: test the ANSI escape codes", cmd_test_ansi},
{"BACKGROUND", "BACKGROUND <0xaarrggbb>: set the background color to the give RGB color", cli_test_background},
{"BITMAP", "BITMAP: test the bitmap screen", cli_test_bitmap},
{"CREATE", "CREATE <path>: test creating a file", cli_test_create},
{"IDE", "IDE: test reading the MBR of the IDE drive", cli_test_ide},
@ -941,9 +967,7 @@ const t_cli_test_feature cli_test_features[] = {
{"MIDIRX", "MIDIRX: perform a receive test on the MIDI ports", midi_rx_test},
{"MIDITX", "MIDITX: send a note to a MIDI keyboard", midi_tx_test},
#endif
#if HAS_OPL3
{"OPL3", "OPL3: test the OPL3 sound chip", opl3_test},
#endif
{"OPL3", "OPL3 <delay>: test the OPL3 sound chip, with some optional delay between bytes", opl3_test},
#if HAS_OPN
{"OPN", "OPN [EXT|INT]: test the OPN sound chip", opn_test},
#endif

62
src/dev/Makefile
View file

@ -1,15 +1,59 @@
csources = $(wildcard *.c)
cobjects = $(subst .c,.o,$(csources))
cobjects = $(subst .c,.o,$(csources))
UNIT := C256U_PLUS
.PHONY: all
all: $(cobjects)
# Define OS-dependent variables
ifeq ($(OS),Windows_NT)
RM = del /F/Q
else
RM = rm -f
endif
# Define model-specific variables, including tools, source files, compiler flags, etc.
ifeq ($(UNIT),C256U)
CC=cc65816
AS=as65816
AR=nlib
SRCS_FOR_UNIT=txt_c256.c txt_evid.c indicators_c256.c interrupts_c256.c timers_c256.c
CFLAGS_FOR_UNIT=-DMODEL=1 -DCPU=255 --target Foenix --code-model large --data-model large
else ifeq ($(UNIT),C256U_PLUS)
CC=cc65816
AS=as65816
AR=nlib
SRCS_FOR_UNIT=txt_c256.c txt_evid.c indicators_c256.c interrupts_c256.c timers_c256.c
CFLAGS_FOR_UNIT=-DMODEL=5 -DCPU=255 --target Foenix --code-model large --data-model large
else ifeq ($(UNIT),C256_FMX)
CC=cc65816
AS=as65816
AR=nlib
SRCS_FOR_UNIT=txt_c256.c txt_evid.c indicators_c256.c interrupts_c256.c timers_c256.c
CFLAGS_FOR_UNIT=-DMODEL=0 -DCPU=255 --target Foenix --code-model large --data-model large
endif
INCLUDES=-I.. -I../include
CFLAGS=$(INCLUDES) $(CFLAGS_FOR_UNIT) -l
ASFLAGS=$(INCLUDES)
SRCS = bitmap.c block.c channel.c console.c dma.c fsys.c pata.c ps2.c sdc.c rtc.c txt_screen.c $(SRCS_FOR_UNIT)
OBJS = $(patsubst %.c,%.o,$(SRCS))
OBJS4RM = $(subst /,\\,$(OBJS))
.PHONY: all clean
all: devices.a
# Build the devices library file for this model
devices.a: $(OBJS)
$(AR) $@ $^
# Build the object files from C
%.o: %.c
$(CC) -c -o $@ $< $(CFLAGS) $(DEFINES)
.PHONY: clean
$(CC) $(CFLAGS) -o $@ $^
# Clean up after a build
clean:
$(RM) *.o *.asm
$(RM) $(OBJS4RM) devices.a *.lst

152
src/dev/bitmap.c Normal file
View file

@ -0,0 +1,152 @@
/**
* @file bitmap.c
* @author Peter Weingartner (pjw@tailrecursive.org)
* @brief Simple bitmap management code
* @version 0.1
* @date 2023-10-02
*
*/
#include <stdint.h>
#include "bitmap.h"
#include "dma.h"
#include "vicky_general.h"
#define NUM_BITMAP_PLANES 2
static uint8_t bm_visible = 0; // Track whether a given bitmap plane is visible
/**
* @brief Set the visibility of a given bitmap plane, and the CLUT to use
*
* @param plane the number of the bitmap to update
* @param clut the number of the CLUT to use for the bitmap
* @param is_visible 0 to hide the bitmap, any other number to show it
*/
void bm_set_visibility(short plane, short clut, short is_visible) {
uint8_t new_control_value = (clut & 0x03) << 1 | (is_visible) ? 1 : 0;
switch(plane) {
case 0:
*bm0_control = new_control_value;
if (is_visible) {
bm_visible |= 0x01;
} else {
bm_visible &= ~0x01;
}
break;
case 1:
*bm1_control = new_control_value;
if (is_visible) {
bm_visible |= 0x02;
} else {
bm_visible &= ~0x02;
}
break;
default:
break;
}
if (bm_visible) {
tvky_mstr_ctrl->raw = tvky_mstr_ctrl->raw | VKY_MCR_TEXT_OVERLAY | VKY_MCR_GRAPHICS | VKY_MCR_BITMAP;
} else {
tvky_mstr_ctrl->raw = tvky_mstr_ctrl->raw & ~(VKY_MCR_TEXT_OVERLAY | VKY_MCR_GRAPHICS | VKY_MCR_BITMAP);
}
}
/**
* @brief Set the
*
* @param plane the number of the bitmap to set
* @param src the address of the bitmap data to use (should be in video RAM)
*/
void bm_set_data(short plane, uint8_t * src) {
uint32_t src_raw = (uint32_t)src - (uint32_t)vram_base;
switch (plane) {
case 0:
bm0_address[0] = (uint8_t)(src_raw & 0xff);
bm0_address[1] = (uint8_t)((src_raw >> 8) & 0xff);
bm0_address[2] = (uint8_t)((src_raw >> 16) & 0xff);
break;
case 1:
bm1_address[0] = (uint8_t)(src_raw & 0xff);
bm1_address[1] = (uint8_t)((src_raw >> 8) & 0xff);
bm1_address[2] = (uint8_t)((src_raw >> 16) & 0xff);
break;
default:
break;
}
}
/**
* @brief Fill the bitmap data with a given color
*
* @param dest the area of video RAM to fill
* @param color the color index to fill it with
* @param width the width of the image in pixels
* @param height the height of the image in pixels
*/
void bm_fill(uint8_t * dest, uint8_t color, int width, int height) {
vdma_fill_linear(dest, color, (long)width * (long)height);
}
/**
* @brief Load the color lookup table
*
* @param clut number of the CLUT to load
* @param src pointer to the source data for the CLUT (in B, G, R, A order)
*/
void bm_load_clut(short clut, uint8_t * src) {
uint8_t * base = (uint8_t *)((uint32_t)VKY_GR_CLUT_0 + 4l * 256l * (uint32_t)clut);
tvky_bg_color->blue = src[0];
tvky_bg_color->green = src[1];
tvky_bg_color->red = src[2];
for (int i = 0; i < 4 * 256; i++) {
base[i] = src[i];
}
}
/**
* @brief Load RLE bitmap data into video RAM
*
* @param dest address to load with the expanded bitmap data (should be in video RAM)
* @param src address of the RLE data to expand
* @param width the width of the image in pixels
* @param height the height of the image in pixels
*/
void bm_load_rle(uint8_t * dest, uint8_t * src, int width, int height) {
uint32_t my_base = (uint32_t)dest;
// Clear the image map
bm_fill(dest, 0, width, height);
uint8_t count = *(src++);
while (count != 0) {
uint8_t value = *(src++);
if (value != 0) {
volatile uint8_t * my_pointer = (uint8_t *)my_base;
for (int i = 0; i < count; i++) {
my_pointer[i] = value;
}
}
my_base += count;
count = *(src++);
}
}
/**
* @brief Initialize the bitmap system
*
*/
void bm_init() {
bm_visible = 0;
}

62
src/dev/bitmap.h Normal file
View file

@ -0,0 +1,62 @@
/**
* @brief Definitions for functions to manage bitmap displays
*
*/
#ifndef __BITMAP_H__
#define __BITMAP_H__
#include <stdint.h>
/**
* @brief Set the visibility of a given bitmap plane, and the CLUT to use
*
* @param plane the number of the bitmap to update
* @param clut the number of the CLUT to use for the bitmap
* @param is_visible 0 to hide the bitmap, any other number to show it
*/
extern void bm_set_visibility(short plane, short clut, short is_visible);
/**
* @brief Set the
*
* @param plane the number of the bitmap to set
* @param src the address of the bitmap data to use (should be in video RAM)
*/
extern void bm_set_data(short plane, uint8_t * src);
/**
* @brief Fill the bitmap data with a given color
*
* @param dest the area of video RAM to fill
* @param color the color index to fill it with
* @param width the width of the image in pixels
* @param height the height of the image in pixels
*/
extern void bm_fill(uint8_t * dest, uint8_t color, int width, int height);
/**
* @brief Load the color lookup table
*
* @param clut number of the CLUT to load
* @param src pointer to the source data for the CLUT (in B, G, R, A order)
*/
extern void bm_load_clut(short clut, uint8_t * src);
/**
* @brief Load RLE bitmap data into video RAM
*
* @param dest address to load with the expanded bitmap data (should be in video RAM)
* @param src address of the RLE data to expand
* @param width the width of the image in pixels
* @param height the height of the image in pixels
*/
extern void bm_load_rle(uint8_t * dest, uint8_t * src, int width, int height);
/**
* @brief Initialize the bitmap system
*
*/
extern void bm_init();
#endif

2
src/dev/block.c
View file

@ -153,7 +153,7 @@ short bdev_status(short dev) {
ret = bdev->status();
}
TRACE1("bdev_status returning %d", (int)ret);
TRACE2("bdev_status returning %d (0x%x)", (int)ret, ret);
return ret;
}

2
src/dev/channel.c
View file

@ -350,7 +350,7 @@ short chan_write(short channel, const uint8_t * buffer, short size) {
p_channel chan;
p_dev_chan cdev;
short res;
log(LOG_TRACE,"chan_write(%d,%p,%x)", channel, buffer, (int)size);
logmsg(LOG_TRACE,"chan_write(%d,%p,%x)", channel, buffer, (int)size);
res = chan_get_records(channel, &chan, &cdev);
if (res == 0)

5
src/dev/channel.h
View file

@ -94,10 +94,13 @@ extern short cdev_register(p_dev_chan device);
/*
* Get a free channel
*
* Inputs:
* the device to associate with the channel
*
* Returns:
* A pointer to the free channel, 0 if none are available.
*/
extern p_channel chan_alloc();
extern p_channel chan_alloc(short dev);
/*
* Return a channel to the pool of unused channels

71
src/dev/dma.c Normal file
View file

@ -0,0 +1,71 @@
#include <stdint.h>
#include "dma.h"
#include "dma_reg.h"
#include "vicky_general.h"
/**
* @brief Check if an address is in the range of video RAM
*
* @param address the address to check
* @return short 0 if it is not in video RAM, 1 if it is in video RAM
*/
short is_vram(uint8_t * address) {
if ((uint32_t)address >= (uint32_t)vram_base) {
return 1;
} else {
return 0;
}
}
/**
* @brief Wait while the VDMA engine is busy
*
*/
void vdma_wait() {
while ((*VDMA_STAT & VDMA_STAT_TFR_BUSY) != 0) ;
}
/**
* @brief Fill video memory using a linear VDMA operation
*
* @param dest the address of memory to fill (must be in video RAM)
* @param value the value to put into memory
* @param count the number of bytes to fill
*/
void vdma_fill_linear(uint8_t * dest, uint8_t value, long count) {
if (is_vram(dest)) {
// We'll just ignore non-vram addresses
// Make sure any previous transfer is complete
vdma_wait();
*VDMA_CTRL = 0;
// Set us up for a 1D fill
*VDMA_CTRL = VDMA_CTRL_EN | VDMA_CTRL_FILL;
// Set the fill value
*VDMA_FILL_VALUE = value;
// Set the destination address
uint32_t dest_vram_address = (uint32_t)dest - (uint32_t)vram_base;
VDMA_DST_ADDR[0] = (uint8_t)(dest_vram_address & 0xff);
VDMA_DST_ADDR[1] = (uint8_t)((dest_vram_address >> 8) & 0xff);
VDMA_DST_ADDR[2] = (uint8_t)((dest_vram_address >> 16) & 0xff);
// Set the count
VDMA_SIZE[0] = (uint8_t)(count & 0xff);
VDMA_SIZE[1] = (uint8_t)((count >> 8) & 0xff);
VDMA_SIZE[2] = (uint8_t)((count >> 16) & 0xff);
// Start the transfer
*VDMA_CTRL = VDMA_CTRL_EN | VDMA_CTRL_FILL | VDMA_CTRL_TRF;
// Wait for completion
vdma_wait();
// Turn off the VDMA engine
*VDMA_CTRL = 0;
}
}

20
src/dev/dma.h Normal file
View file

@ -0,0 +1,20 @@
/**
* @brief Definitions for functions to manage DMA transfers
*
*/
#ifndef __DMA_H__
#define __DMA_H__
#include <stdint.h>
/**
* @brief Fill video memory using a linear VDMA operation
*
* @param dest the address of memory to fill (must be in video RAM)
* @param value the value to put into memory
* @param count the number of bytes to fill
*/
extern void vdma_fill_linear(uint8_t * dest, uint8_t value, long count);
#endif

82
src/dev/fdc.c
View file

@ -252,7 +252,7 @@ short fdc_in(unsigned char *ptr) {
long target_ticks = timers_jiffies() + fdc_timeout;
while ((*FDC_MSR & FDC_MSR_RQM) != FDC_MSR_RQM) {
if (timers_jiffies() >= target_ticks) {
log(LOG_ERROR, "fdc_in: timeout waiting for RQM");
logmsg(LOG_ERROR, "fdc_in: timeout waiting for RQM");
return DEV_TIMEOUT;
}
}
@ -272,7 +272,7 @@ short fdc_out(unsigned char x) {
long target_ticks = timers_jiffies() + fdc_timeout;
while ((*FDC_MSR & FDC_MSR_RQM) != FDC_MSR_RQM) {
if (timers_jiffies() >= target_ticks) {
log(LOG_ERROR, "fdc_out: timeout waiting for RQM");
logmsg(LOG_ERROR, "fdc_out: timeout waiting for RQM");
return DEV_TIMEOUT;
}
}
@ -296,7 +296,7 @@ short fdc_motor_on() {
if (fdc_wait_rqm()) {
/* Got a timeout after trying to turn on the motor */
log(LOG_ERROR, "fdc_motor_on timeout");
logmsg(LOG_ERROR, "fdc_motor_on timeout");
return DEV_TIMEOUT;
}
@ -384,13 +384,13 @@ short fdc_sense_interrupt_status(unsigned char *st0, unsigned char *pcn) {
if (fdc_wait_while_busy()) {
/* Timed out waiting for the FDC to be free */
log(LOG_ERROR, "fdc_sense_interrupt_status: fdc_wait_while_busy timeout");
logmsg(LOG_ERROR, "fdc_sense_interrupt_status: fdc_wait_while_busy timeout");
return DEV_TIMEOUT;
}
if (fdc_wait_write()) {
/* Timed out waiting for permission to write a command byte */
log(LOG_ERROR, "fdc_sense_interrupt_status: fdc_wait_write timeout");
logmsg(LOG_ERROR, "fdc_sense_interrupt_status: fdc_wait_write timeout");
return DEV_TIMEOUT;
}
@ -399,13 +399,13 @@ short fdc_sense_interrupt_status(unsigned char *st0, unsigned char *pcn) {
if (fdc_wait_rqm()) {
/* Timed out waiting to receive data */
log(LOG_ERROR, "fdc_sense_interrupt_status: fdc_wait_rqm timeout 1");
logmsg(LOG_ERROR, "fdc_sense_interrupt_status: fdc_wait_rqm timeout 1");
return DEV_TIMEOUT;
}
if (fdc_wait_read()) {
/* Timed out waiting to receive data */
log(LOG_ERROR, "fdc_sense_interrupt_status: fdc_wait_read timeout 1");
logmsg(LOG_ERROR, "fdc_sense_interrupt_status: fdc_wait_read timeout 1");
return DEV_TIMEOUT;
}
@ -415,13 +415,13 @@ short fdc_sense_interrupt_status(unsigned char *st0, unsigned char *pcn) {
if (fdc_wait_rqm()) {
/* Timed out waiting to receive data */
log(LOG_ERROR, "fdc_sense_interrupt_status: fdc_wait_rqm timeout 1");
logmsg(LOG_ERROR, "fdc_sense_interrupt_status: fdc_wait_rqm timeout 1");
return DEV_TIMEOUT;
}
if (fdc_wait_read()) {
/* Timed out waiting for permission to transfer another byte */
log(LOG_ERROR, "fdc_sense_interrupt_status: fdc_wait_read timeout 2");
logmsg(LOG_ERROR, "fdc_sense_interrupt_status: fdc_wait_read timeout 2");
return DEV_TIMEOUT;
}
@ -444,13 +444,13 @@ short fdc_specify() {
if (fdc_wait_while_busy()) {
/* Timed out waiting for the FDC to be free */
log(LOG_ERROR, "fdc_specify: fdc_wait_while_busy timeout");
logmsg(LOG_ERROR, "fdc_specify: fdc_wait_while_busy timeout");
return DEV_TIMEOUT;
}
if (fdc_wait_write() < 0) {
/* Timed out waiting for permission to write a command byte */
log(LOG_ERROR, "fdc_specify: fdc_wait_write timeout 1");
logmsg(LOG_ERROR, "fdc_specify: fdc_wait_write timeout 1");
return DEV_TIMEOUT;
}
@ -459,7 +459,7 @@ short fdc_specify() {
if (fdc_wait_write() < 0) {
/* Timed out waiting for permission to write a command byte */
log(LOG_ERROR, "fdc_specify: fdc_wait_write timeout 2");
logmsg(LOG_ERROR, "fdc_specify: fdc_wait_write timeout 2");
return DEV_TIMEOUT;
}
@ -468,7 +468,7 @@ short fdc_specify() {
if (fdc_wait_write() < 0) {
/* Timed out waiting for permission to write a command byte */
log(LOG_ERROR, "fdc_specify: fdc_wait_write timeout 3");
logmsg(LOG_ERROR, "fdc_specify: fdc_wait_write timeout 3");
return DEV_TIMEOUT;
}
@ -498,13 +498,13 @@ short fdc_configure() {
if (fdc_wait_while_busy()) {
/* Timed out waiting for the FDC to be free */
log(LOG_ERROR, "fdc_configure: fdc_wait_while_busy timeout");
logmsg(LOG_ERROR, "fdc_configure: fdc_wait_while_busy timeout");
return DEV_TIMEOUT;
}
if (fdc_wait_write()) {
/* Timed out waiting for the FDC to be free */
log(LOG_ERROR, "fdc_configure: fdc_wait_write timeout 1");
logmsg(LOG_ERROR, "fdc_configure: fdc_wait_write timeout 1");
return DEV_TIMEOUT;
}
@ -513,7 +513,7 @@ short fdc_configure() {
if (fdc_wait_write()) {
/* Timed out waiting for the FDC to be free */
log(LOG_ERROR, "fdc_configure: fdc_wait_write timeout 2");
logmsg(LOG_ERROR, "fdc_configure: fdc_wait_write timeout 2");
return DEV_TIMEOUT;
}
@ -522,7 +522,7 @@ short fdc_configure() {
if (fdc_wait_write()) {
/* Timed out waiting for the FDC to be free */
log(LOG_ERROR, "fdc_configure: fdc_wait_write timeout 3");
logmsg(LOG_ERROR, "fdc_configure: fdc_wait_write timeout 3");
return DEV_TIMEOUT;
}
@ -531,7 +531,7 @@ short fdc_configure() {
if (fdc_wait_write()) {
/* Timed out waiting for the FDC to be free */
log(LOG_ERROR, "fdc_configure: fdc_wait_write timeout 4");
logmsg(LOG_ERROR, "fdc_configure: fdc_wait_write timeout 4");
return DEV_TIMEOUT;
}
@ -555,13 +555,13 @@ short fdc_version(unsigned char *version) {
if (fdc_wait_while_busy()) {
/* Timed out waiting for the FDC to be free */
log(LOG_ERROR, "fdc_version: fdc_wait_while_busy timeout");
logmsg(LOG_ERROR, "fdc_version: fdc_wait_while_busy timeout");
return DEV_TIMEOUT;
}
if (fdc_wait_write()) {
/* Timed out waiting for the FDC to be free */
log(LOG_ERROR, "fdc_version: fdc_wait_write timeout 1");
logmsg(LOG_ERROR, "fdc_version: fdc_wait_write timeout 1");
return DEV_TIMEOUT;
}
@ -570,7 +570,7 @@ short fdc_version(unsigned char *version) {
if (fdc_wait_write()) {
/* Timed out waiting for the FDC to be free */
log(LOG_ERROR, "fdc_version: fdc_wait_write timeout 2");
logmsg(LOG_ERROR, "fdc_version: fdc_wait_write timeout 2");
return DEV_TIMEOUT;
}
@ -621,7 +621,7 @@ short fdc_reset() {
pcn = 0;
if (fdc_sense_interrupt_status(&st0, &pcn) < 0) {
/* Time out on sense interrupt */
log(LOG_ERROR, "fdc_sense_interrupt_status timeout");
logmsg(LOG_ERROR, "fdc_sense_interrupt_status timeout");
return DEV_TIMEOUT;
}
@ -636,14 +636,14 @@ short fdc_reset() {
/* Configure the FDC */
if (fdc_configure() < 0) {
/* Timeout on sense interrupt */
log(LOG_ERROR, "fdc_configure timeout");
logmsg(LOG_ERROR, "fdc_configure timeout");
return DEV_TIMEOUT;
}
/* Specify seek and head times, and turn off DMA */
if (fdc_specify() < 0) {
/* Timeout on sense interrupt */
log(LOG_ERROR, "fdc_specify timeout");
logmsg(LOG_ERROR, "fdc_specify timeout");
return DEV_TIMEOUT;
}
@ -698,19 +698,19 @@ short fdc_command_dma(p_fdc_trans transaction) {
if (fdc_wait_while_busy()) {
/* Timed out waiting for the FDC to be free */
log(LOG_ERROR, "fdc_command: fdc_wait_while_busy timeout");
logmsg(LOG_ERROR, "fdc_command: fdc_wait_while_busy timeout");
return DEV_TIMEOUT;
}
result = fdc_out(transaction->command); /* Send the command byte */
if (result < 0) {
log(LOG_ERROR, "fdc_command: timeout sending command");
logmsg(LOG_ERROR, "fdc_command: timeout sending command");
return result;
}
for (i = 0; i < transaction->parameter_count; i++) {
if ((result = fdc_out(transaction->parameters[i])) < 0) {
log(LOG_ERROR, "fdc_command: timeout sending parameters");
logmsg(LOG_ERROR, "fdc_command: timeout sending parameters");
return result;
}
}
@ -749,7 +749,7 @@ short fdc_command_dma(p_fdc_trans transaction) {
for (i = 0; i < transaction->result_count; i++) {
if ((result = fdc_in(&transaction->results[i])) < 0) {
log(LOG_ERROR, "fdc_command: timeout getting results");
logmsg(LOG_ERROR, "fdc_command: timeout getting results");
return result;
}
}
@ -788,19 +788,19 @@ short fdc_command(p_fdc_trans transaction) {
if (fdc_wait_while_busy()) {
/* Timed out waiting for the FDC to be free */
log(LOG_ERROR, "fdc_command: fdc_wait_while_busy timeout");
logmsg(LOG_ERROR, "fdc_command: fdc_wait_while_busy timeout");
return DEV_TIMEOUT;
}
result = fdc_out(transaction->command); /* Send the command byte */
if (result < 0) {
log(LOG_ERROR, "fdc_command: timeout sending command");
logmsg(LOG_ERROR, "fdc_command: timeout sending command");
return result;
}
for (i = 0; i < transaction->parameter_count; i++) {
if ((result = fdc_out(transaction->parameters[i])) < 0) {
log(LOG_ERROR, "fdc_command: timeout sending parameters");
logmsg(LOG_ERROR, "fdc_command: timeout sending parameters");
return result;
}
}
@ -815,7 +815,7 @@ short fdc_command(p_fdc_trans transaction) {
if (*FDC_MSR & FDC_MSR_NONDMA) {
for (i = 0; (i < transaction->data_count); i++) {
if ((result = fdc_out(transaction->data[i])) < 0) {
log(LOG_ERROR, "fdc_command: timeout writing data");
logmsg(LOG_ERROR, "fdc_command: timeout writing data");
return result;
}
}
@ -826,7 +826,7 @@ short fdc_command(p_fdc_trans transaction) {
/* We're reading from the FDC */
for (i = 0; (i < transaction->data_count); i++) {
if ((result = fdc_in(&transaction->data[i])) < 0) {
log(LOG_ERROR, "fdc_command: timeout getting data");
logmsg(LOG_ERROR, "fdc_command: timeout getting data");
return result;
}
}
@ -842,7 +842,7 @@ short fdc_command(p_fdc_trans transaction) {
for (i = 0; i < transaction->result_count; i++) {
if ((result = fdc_in(&transaction->results[i])) < 0) {
log(LOG_ERROR, "fdc_command: timeout getting results");
logmsg(LOG_ERROR, "fdc_command: timeout getting results");
return result;
}
}
@ -1067,12 +1067,12 @@ short fdc_read(long lba, unsigned char * buffer, short size) {
if ((result == 0)) { //} && ((trans.results[0] & 0xC0) == 0)) {
sprintf(message, "fdc_read: success? ST0=%02X ST1=%02X ST2=%02X C=%02X H=%02X R=%02X N=%02X",
trans.results[0], trans.results[1], trans.results[2], trans.results[3], trans.results[4], trans.results[5], trans.results[6]);
log(LOG_INFO, message);
logmsg(LOG_INFO, message);
return size;
} else {
sprintf(message, "fdc_read: retry ST0=%02X ST1=%02X ST2=%02X C=%02X H=%02X R=%02X N=%02X",
trans.results[0], trans.results[1], trans.results[2], trans.results[3], trans.results[4], trans.results[5], trans.results[6]);
log(LOG_ERROR, message);
logmsg(LOG_ERROR, message);
}
fdc_init();
trans.retries--;
@ -1135,7 +1135,7 @@ short fdc_write(long lba, const unsigned char * buffer, short size) {
}
if ((trans.results[1] & 0x02) != 0) {
log(LOG_ERROR, "Disk is write protected");
logmsg(LOG_ERROR, "Disk is write protected");
g_fdc_stat |= FDC_STAT_PROTECTED;
return DEV_WRITEPROT;
}
@ -1143,12 +1143,12 @@ short fdc_write(long lba, const unsigned char * buffer, short size) {
if ((result == 0)) { //} && ((trans.results[0] & 0xC0) == 0)) {
sprintf(message, "fdc_write: success? ST0=%02X ST1=%02X ST2=%02X C=%02X H=%02X R=%02X N=%02X",
trans.results[0], trans.results[1], trans.results[2], trans.results[3], trans.results[4], trans.results[5], trans.results[6]);
log(LOG_INFO, message);
logmsg(LOG_INFO, message);
return size;
} else {
sprintf(message, "fdc_write: retry ST0=%02X ST1=%02X ST2=%02X C=%02X H=%02X R=%02X N=%02X",
trans.results[0], trans.results[1], trans.results[2], trans.results[3], trans.results[4], trans.results[5], trans.results[6]);
log(LOG_ERROR, message);
logmsg(LOG_ERROR, message);
}
fdc_init();
trans.retries--;
@ -1228,13 +1228,13 @@ short fdc_ioctrl(short command, unsigned char * buffer, short size) {
*/
short fdc_init() {
if (fdc_reset() < 0) {
log(LOG_ERROR, "Unable to reset the FDC");
logmsg(LOG_ERROR, "Unable to reset the FDC");
return DEV_TIMEOUT;
}
// Recalibrate the drive
if (fdc_recalibrate()) {
log(LOG_ERROR, "Unable to recalibrate the drive");
logmsg(LOG_ERROR, "Unable to recalibrate the drive");
return ERR_GENERAL;
}

10
src/dev/fsys.c
View file

@ -615,7 +615,7 @@ short fchan_read(t_channel * chan, unsigned char * buffer, short size) {
FRESULT result;
int total_read;
log(LOG_TRACE, "fchan_read");
logmsg(LOG_TRACE, "fchan_read");
file = fchan_to_file(chan);
if (file) {
@ -660,7 +660,7 @@ short fchan_read_b(t_channel * chan) {
short total_read;
char buffer[2];
log(LOG_TRACE, "fchan_read_b");
logmsg(LOG_TRACE, "fchan_read_b");
file = fchan_to_file(chan);
if (file) {
@ -1339,11 +1339,11 @@ static short fsys_load_ext(const char * path, const char * extension, long desti
if (loader == 0) {
if (destination != 0) {
/* If a destination was specified, just load it into memory without interpretation */
log(LOG_DEBUG, "Setting default loader.");
logmsg(LOG_DEBUG, "Setting default loader.");
loader = fsys_default_loader;
} else {
log(LOG_DEBUG, "Returning a bad extension.");
logmsg(LOG_DEBUG, "Returning a bad extension.");
/* Return bad extension */
return ERR_BAD_EXTENSION;
}
@ -1443,7 +1443,7 @@ short fsys_load(const char * path, long destination, long * start) {
// Found path with valid loader
fsys_load_ext(spath, extension, destination, start);
} else {
log(LOG_ERROR, "Command not found.");
logmsg(LOG_ERROR, "Command not found.");
return ERR_NOT_FOUND;
}
}

62
src/dev/indicators_c256.c Normal file
View file

@ -0,0 +1,62 @@
/**
* @file indicators_c256.c
* @brief Indicator control logic for the C256 line
* @version 0.1
* @date 2023-08-30
*
* Indicators on the C256 include the SD card LED and the power LED. They can be on or off.
* An error state will equate to being off. This code also sets the two status LEDs to their
* default blinking state.
*
*/
#include "indicators.h"
#include "gabe_reg.h"
/*
* Set an indicator to the given state
*
* Inputs:
* ind_number = the number of the indicator to change
* state = the state the indicator should take (on, off, error)
*/
void ind_set(short ind_number, short state) {
uint8_t bit = 0;
// Figure out which bit to manipulate
switch (ind_number) {
case IND_POWER:
bit = GABE_CTRL_PWR_LED;
break;
case IND_SDC:
bit = GABE_CTRL_SDC_LED;
break;
default:
// Any other indicator is ignored
return;
}
if (state == IND_ON) {
// Flip the bit on
*GABE_CTRL_REG |= bit;
} else {
// Flip the bit off
*GABE_CTRL_REG &= ~bit;
}
}
/*
* Initialize the indicators
*
* Generally, this means the indicators will all be turned off
*/
void ind_init() {
*GABE_CTRL_REG = 0;
*GABE_LED_FLASH_CTRL = 0x03;
ind_set(IND_POWER, IND_ON);
ind_set(IND_SDC, IND_OFF);
}

597
src/dev/interrupts_c256.c Normal file
View file

@ -0,0 +1,597 @@
/*
* Definitions for the interrupt controls for the C256 machines
*/
#include <calypsi/intrinsics65816.h>
#include <string.h>
#include "features.h"
#include "interrupt.h"
#include "log.h"
// FoenixMCP interrupt number -> C256 group and mask:
// INT_SOF_A 0x00 --> 0x00, 0x01 (Main screen start-of-frame)
// INT_SOL_A 0x01 --> 0x00, 0x02 (Main screen start-of-line)
// INT_VICKY_A_1 0x02 --> 0x01, 0x02 (Sprite Collision)
// INT_VICKY_A_2 0x03 --> 0x01, 0x04 (Bitmap Collision)
// INT_VICKY_A_3 0x04 --> 0x02, 0x08 (VDMA Interrupt)
// INT_VICKY_A_4 0x05 --> 0x02, 0x10 (Tile Collision)
// INT_RESERVED_1 0x06 --> 0x02, 0x40 (External Expansion)
// INT_VICKY_A_DAC 0x07
// INT_SOF_B 0x08
// INT_SOL_B 0x09
// INT_VICKY_B_1 0x0A
// INT_VICKY_B_2 0x0B
// INT_VICKY_B_3 0x0C
// INT_VICKY_B_4 0x0D
// INT_RESERVED_2 0x0E
// INT_VICKY_B_DAC 0x0F
// INT_KBD_PS2 0x10 --> 0x01, 0x01 (PS/2 Keyboard)
// INT_KBD_A2560K 0x11
// INT_MOUSE 0x12 --> 0x00, 0x80 (PS/2 Mouse)
// INT_COM1 0x13 --> 0x01, 0x10 (Serial port 1)
// INT_COM2 0x14 --> 0x01, 0x08 (Serial port 2)
// INT_LPT1 0x15 --> 0x01, 0x40 (LPT)
// INT_FDC 0x16 --> 0x00, 0x40 (Floppy drive)
// INT_MIDI 0x17 --> 0x01, 0x20 (MIDI)
// INT_TIMER0 0x18 --> 0x00, 0x04 (Timer 0)
// INT_TIMER1 0x19 --> 0x00, 0x08 (Timer 1)
// INT_TIMER2 0x1A --> 0x00, 0x10 (Timer 2)
// INT_TIMER3 0x1B
// INT_TIMER4 0x1C
// INT_RESERVED_3 0x1D
// INT_RESERVED_4 0x1E
// INT_RTC 0x1F --> 0x00, 0x20 (Real time clock)
// INT_PATA 0x20 --> 0x03, 0x04 (IDE)
// INT_SDC_INS 0x21 --> 0x02, 0x80 (SDC inserted)
// INT_SDC 0x22 --> 0x01, 0x80 (SDC)
// INT_OPM_INT 0x23 --> 0x03, 0x02 (OPM)
// INT_OPN2_EXT 0x24 --> 0x03, 0x01 (OPN)
// INT_OPL3_EXT 0x25 --> 0x02, 0x01 (OPL3)
// INT_RESERVED_5 0x26
// INT_RESERVED_6 0x27
// INT_BEATRIX_0 0x28
// INT_BEATRIX_1 0x29
// INT_BEATRIX_2 0x2A
// INT_BEATRIX_3 0x2B
// INT_RESERVED_7 0x2C
// INT_DAC1_PB 0x2D /* DAC1 Playback Done (48K) */
// INT_RESERVED_8 0x2E /* Reserved */
// INT_DAC0_PB 0x2F /* DAC0 Playback Done (44.1K) */
//
// Interrupt Handler Vectors
//
p_int_handler int_handle_00;
p_int_handler int_handle_01;
p_int_handler int_handle_02;
p_int_handler int_handle_03;
p_int_handler int_handle_04;
p_int_handler int_handle_05;
p_int_handler int_handle_06;
p_int_handler int_handle_07;
p_int_handler int_handle_10;
p_int_handler int_handle_11;
p_int_handler int_handle_12;
p_int_handler int_handle_13;
p_int_handler int_handle_14;
p_int_handler int_handle_15;
p_int_handler int_handle_16;
p_int_handler int_handle_17;
p_int_handler int_handle_20;
p_int_handler int_handle_21;
p_int_handler int_handle_22;
p_int_handler int_handle_23;
p_int_handler int_handle_24;
p_int_handler int_handle_25;
p_int_handler int_handle_26;
p_int_handler int_handle_27;
p_int_handler int_handle_30;
p_int_handler int_handle_31;
p_int_handler int_handle_32;
p_int_handler int_handle_33;
p_int_handler int_handle_34;
p_int_handler int_handle_35;
p_int_handler int_handle_36;
p_int_handler int_handle_37;
/**
* @brief Mapping of FoenixMCP interrupt numbers to C256 GABE group numbers (0xff indicates an unassigned interrupt number)
*
*/
static unsigned short g_int_group[] = {
0x00, 0x00, 0x01, 0x01, 0x02, 0x02, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0x01, 0xff, 0x00, 0x01, 0x01, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0x00,
0x03, 0x02, 0x01, 0x03, 0x03, 0x02, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
};
/**
* @brief Mapping of FoenixMCP interrupt numbers to C256 GABE mask numbers (0xff indicates an unassigned interrupt number)
*
*/
static unsigned short g_int_mask[] = {
0x01, 0x02, 0x02, 0x04, 0x08, 0x10, 0x40, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0x01, 0xff, 0x80, 0x10, 0x08, 0x40, 0x40, 0x20, 0x04, 0x08, 0x10, 0xff, 0xff, 0xff, 0xff, 0x20,
0x04, 0x80, 0x80, 0x02, 0x01, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
};
/*
* Return the group number for the interrupt number
*/
unsigned short int_group(unsigned short n) {
return g_int_group[n];
}
/*
* Return the mask bit for the interrupt number
*/
unsigned short int_mask(unsigned short n) {
return g_int_mask[n];
}
/*
* Initialize the interrupt registers
*/
void int_init() {
int i;
p_int_handler * int_handlers = &int_handle_00;
// Clear all the interrupt handlers
for (i = 0; i < 4 * 8; i++) {
int_handlers[i] = 0;
}
// At Reset, all of those already have those values
// the Pol are @ 0x0000 and normally pending are reseted, but it is not impossible that some might be triggered during init
*EDGE_GRP0 = 0xFF;
*EDGE_GRP1 = 0xFF;
*EDGE_GRP2 = 0xFF;
*EDGE_GRP3 = 0xFF;
*MASK_GRP0 = 0xFF;
*MASK_GRP1 = 0xFF;
*MASK_GRP2 = 0xFF;
*MASK_GRP3 = 0xFF;
// Clear all the pending flags
*PENDING_GRP0 = 0xFF;
*PENDING_GRP1 = 0xFF;
*PENDING_GRP2 = 0xFF;
*PENDING_GRP3 = 0xFF;
}
/*
* Enable all interrupts
*
* Returns:
* a machine dependent representation of the interrupt masking prior to enabling
*/
short int_enable_all() {
// NOTE: this code uses Calypsi specific intrinsic functions
// and does a cast that may not be valid
short status = (short)__get_interrupt_state();
__enable_interrupts();
return status;
}
/*
* Disable all interrupts
*
* Returns:
* a machine dependent representation of the interrupt masking prior to disabling
*/
short int_disable_all() {
// NOTE: this code uses Calypsi specific intrinsic functions
// and does a cast that may not be valid
short status = (short)__get_interrupt_state();
__disable_interrupts();
return status;
}
/*
* Disable an interrupt by masking it
*
* Interrupt number is made by the group number and number within the group.
* For instance, the RTC interrupt would be 0x1F and the Channel A SOF interrupt would be 0x00.
*
* Inputs:
* n = the number of the interrupt: n[7..4] = group number, n[3..0] = individual number.
*/
void int_disable(unsigned short n) {
/* Find the group (the relevant interrupt mask register) for the interrupt */
unsigned short group = int_group(n);
/* Find the mask for the interrupt */
unsigned short mask = int_mask(n);
if ((group != 0xff) && (mask != 0xff)) {
// Only set the mask if the mask and group numbers are valid
uint8_t new_mask = MASK_GRP0[group] | mask;
/* Set the mask bit for the interrupt in the correct MASK register */
MASK_GRP0[group] = new_mask;
}
}
/*
* Enable an interrupt
*
* Interrupt number is made by the group number and number within the group.
* For instance, the RTC interrupt would be 0x1F and the Channel A SOF interrupt would be 0x00.
* And interrupt number of 0xFF specifies that all interrupts should be disabled.
*
* Inputs:
* n = the number of the interrupt: n[7..4] = group number, n[3..0] = individual number.
*/
void int_enable(unsigned short n) {
/* Find the group (the relevant interrupt mask register) for the interrupt */
unsigned short group = int_group(n);
/* Find the mask for the interrupt */
unsigned short mask = int_mask(n);
printf("Enable interrupt %d => group: %d, mask: %d\n", n, group, mask);
if ((group != 0xff) && (mask != 0xff)) {
// Only set the mask if the mask and group numbers are valid
uint8_t new_mask = MASK_GRP0[group] & ~mask;
/* Clear the mask bit for the interrupt in the correct MASK register */
MASK_GRP0[group] = new_mask;
}
}
/**
* @brief Convert group and mask to an index into a "array" of interrupt handler pointers
*
* @param group the number of the interrupt's group
* @param mask the interupt's mask bit
* @return int the offset to the handler (-1 on error)
*/
static int int_group_mask_to_offset(unsigned short group, unsigned short mask) {
if ((group != 0xff) && (mask != 0xff)) {
unsigned short position = 0;
switch (mask) {
case 0x01:
position = 0;
break;
case 0x02:
position = 1;
break;
case 0x04:
position = 2;
break;
case 0x08:
position = 3;
break;
case 0x10:
position = 4;
break;
case 0x20:
position = 5;
break;
case 0x40:
position = 6;
break;
case 0x80:
position = 7;
break;
default:
break;
}
return group * 8 + position;
} else {
return -1;
}
}
/*
* Register a handler for a given interrupt.
*
* Inputs:
* n = the number of the interrupt: n[7..4] = group number, n[3..0] = individual number.
* handler = pointer to the interrupt handler to register
*
* Returns:
* the pointer to the previous interrupt handler
*/
p_int_handler int_register(unsigned short n, p_int_handler handler) {
p_int_handler * handler_ref = 0;
p_int_handler old_handler = 0;
/* Find the group (the relevant interrupt mask register) for the interrupt */
unsigned short group = int_group(n);
/* Find the mask for the interrupt */
unsigned short mask = int_mask(n);
switch(group) {
case 0:
switch(mask) {
case 1:
handler_ref = &int_handle_00;
break;
case 2:
handler_ref = &int_handle_01;
break;
case 4:
handler_ref = &int_handle_02;
break;
case 8:
handler_ref = &int_handle_03;
break;
case 16:
handler_ref = &int_handle_04;
break;
case 32:
handler_ref = &int_handle_05;
break;
case 64:
handler_ref = &int_handle_06;
break;
case 128:
handler_ref = &int_handle_07;
break;
default:
return 0;
}
break;
case 1:
switch(mask) {
case 1:
handler_ref = &int_handle_10;
break;
case 2:
handler_ref = &int_handle_11;
break;
case 4:
handler_ref = &int_handle_12;
break;
case 8:
handler_ref = &int_handle_13;
break;
case 16:
handler_ref = &int_handle_14;
break;
case 32:
handler_ref = &int_handle_15;
break;
case 64:
handler_ref = &int_handle_16;
break;
case 128:
handler_ref = &int_handle_17;
break;
default:
return 0;
}
break;
case 2:
switch(mask) {
case 1:
handler_ref = &int_handle_20;
break;
case 2:
handler_ref = &int_handle_21;
break;
case 4:
handler_ref = &int_handle_22;
break;
case 8:
handler_ref = &int_handle_23;
break;
case 16:
handler_ref = &int_handle_24;
break;
case 32:
handler_ref = &int_handle_25;
break;
case 64:
handler_ref = &int_handle_26;
break;
case 128:
handler_ref = &int_handle_27;
break;
default:
return 0;
}
break;
case 3:
switch(mask) {
case 1:
handler_ref = &int_handle_30;
break;
case 2:
handler_ref = &int_handle_31;
break;
case 4:
handler_ref = &int_handle_32;
break;
case 8:
handler_ref = &int_handle_33;
break;
case 16:
handler_ref = &int_handle_34;
break;
case 32:
handler_ref = &int_handle_35;
break;
case 64:
handler_ref = &int_handle_36;
break;
case 128:
handler_ref = &int_handle_37;
break;
default:
return 0;
}
break;
default:
return 0;
}
old_handler = *handler_ref;
*handler_ref = handler;
return old_handler;
}
/*
* Return true (non-zero) if an interrupt is pending for the given interrupt
*
* Inputs:
* n = the number of the interrupt: n[7..4] = group number, n[3..0] = individual number.
*
* Returns:
* non-zero if interrupt n is pending, 0 if not
*/
short int_pending(unsigned short n) {
/* Find the group (the relevant interrupt mask register) for the interrupt */
unsigned short group = int_group(n);
/* Find the mask for the interrupt */
unsigned short mask = int_mask(n);
if ((group != 0xff) && (mask != 0xff)) {
// Only query the pending mask if the mask and group numbers are valid
return (PENDING_GRP0[group] & mask);
} else {
// If the mask or group number are invalid, just return false
return 0;
}
}
/*
* Acknowledge an interrupt (clear out its pending flag)
*
* Inputs:
* n = the number of the interrupt: n[7..4] = group number, n[3..0] = individual number.
*/
void int_clear(unsigned short n) {
/* Find the group (the relevant interrupt mask register) for the interrupt */
unsigned short group = int_group(n);
/* Find the mask for the interrupt */
unsigned short mask = int_mask(n);
if ((group != 0xff) && (mask != 0xff)) {
// Only set the mask if the mask and group numbers are valid
uint8_t new_mask = PENDING_GRP0[group] | mask;
/* Set the bit for the interrupt to mark it as cleared */
PENDING_GRP0[group] = new_mask;
}
}
/**
* @brief Handle incomming IRQ signal
*
* NOTE: this routine might not be fast enough in C and have to be replaced by hand written
* assembly code... but we will try it this way first.
*/
__attribute__((interrupt(0xffee))) void int_handle_irq() {
uint8_t mask_bits = 0;
// Process any pending interrupts in group 0
mask_bits = *PENDING_GRP0;
if (mask_bits) {
if ((mask_bits & 0x01) && int_handle_00) int_handle_00(); // Start of frame
if ((mask_bits & 0x02) && int_handle_01) int_handle_01(); // Start of line
if ((mask_bits & 0x04) && int_handle_02) int_handle_02(); // Timer 0
if ((mask_bits & 0x08) && int_handle_03) int_handle_03(); // Timer 1
if ((mask_bits & 0x10) && int_handle_04) int_handle_04(); // Timer 2
if ((mask_bits & 0x20) && int_handle_05) int_handle_05(); // Realtime Clock
if ((mask_bits & 0x40) && int_handle_06) int_handle_06(); // Floppy Disk Controller
if ((mask_bits & 0x80) && int_handle_07) int_handle_07(); // PS/2 Mouse
// Clear the pending bits for group 0
*PENDING_GRP0 = mask_bits;
}
// Process any pending interrupts in group 1
mask_bits = *PENDING_GRP1;
if (mask_bits) {
volatile __attribute__((far)) char * text = (char *)0xafa000;
*text = *text + 1;
if ((mask_bits & 0x01) && int_handle_10) {
volatile __attribute__((far)) char * text = (char *)0xafa001;
*text = *text + 1;
int_handle_10(); // PS/2 Keyboard
}
if ((mask_bits & 0x02) && int_handle_11) int_handle_11(); // VICKY II Sprite Collision
if ((mask_bits & 0x04) && int_handle_12) int_handle_12(); // VICKY II Bitmap Collision
if ((mask_bits & 0x08) && int_handle_13) int_handle_13(); // Serial Port #2
if ((mask_bits & 0x10) && int_handle_14) int_handle_14(); // Serial Port #1
if ((mask_bits & 0x20) && int_handle_15) int_handle_15(); // MIDI Controller
if ((mask_bits & 0x40) && int_handle_16) int_handle_16(); // Parallel Port
if ((mask_bits & 0x80) && int_handle_17) int_handle_17(); // SD Controller
// Clear the pending bits for group 1
*PENDING_GRP1 = mask_bits;
}
// Process any pending interrupts in group 2
mask_bits = *PENDING_GRP2;
if (mask_bits) {
if ((mask_bits & 0x01) && int_handle_20) int_handle_20(); // OPL3
// if (mask_bits & 0x02) int_handle_21(); // Currently unused
// if (mask_bits & 0x04) int_handle_22(); // Currently unused
if ((mask_bits & 0x08) && int_handle_23) int_handle_23(); // VICKY II VDMA
if ((mask_bits & 0x10) && int_handle_24) int_handle_24(); // VICKY II Tile Collision
// if (mask_bits & 0x20) int_handle_25(); // Currently unused
if ((mask_bits & 0x40) && int_handle_26) int_handle_26(); // External Expansion
if ((mask_bits & 0x80) && int_handle_27) int_handle_27(); // SD Insert
// Clear the pending bits for group 2
*PENDING_GRP2 = mask_bits;
}
// Process any pending interrupts in group 3
mask_bits = *PENDING_GRP3;
if (mask_bits) {
if ((mask_bits & 0x01) && int_handle_30) int_handle_30(); // OPN2
if ((mask_bits & 0x02) && int_handle_31) int_handle_31(); // OPM
if ((mask_bits & 0x04) && int_handle_32) int_handle_32(); // IDE
// // if (mask_bits & 0x08) int_handle_33(); // Currently unused
// // if (mask_bits & 0x10) int_handle_34(); // Currently unused
// // if (mask_bits & 0x20) int_handle_35(); // Currently unused
// // if (mask_bits & 0x40) int_handle_36(); // Currently unused
// // if (mask_bits & 0x80) int_handle_37(); // Currently unused
// Clear the pending bits for group 3
*PENDING_GRP3 = mask_bits;
}
}
/**
* @brief Handle incomming NMI signal
*/
__attribute__((interrupt(0xffea))) void int_handle_nmi() {
}

27
src/dev/pata.c
View file

@ -51,7 +51,7 @@ short pata_wait_not_busy() {
} while ((status & PATA_STAT_BSY) && (target_ticks > ticks));
if (target_ticks <= ticks) {
log(LOG_ERROR, "pata_wait_not_busy: timeout");
logmsg(LOG_ERROR, "pata_wait_not_busy: timeout");
log_num(LOG_ERROR, "target_ticks: ", (int)target_ticks);
log_num(LOG_ERROR, "ticks: ", (int)ticks);
return DEV_TIMEOUT;
@ -80,7 +80,7 @@ short pata_wait_ready() {
} while (((status & PATA_STAT_DRDY) == 0) && (target_ticks > ticks));
if (target_ticks <= ticks) {
log(LOG_ERROR, "pata_wait_ready: timeout");
logmsg(LOG_ERROR, "pata_wait_ready: timeout");
return DEV_TIMEOUT;
} else {
return 0;
@ -112,7 +112,7 @@ short pata_wait_ready_not_busy() {
} while (((*PATA_CMD_STAT & PATA_STAT_BSY) == PATA_STAT_BSY) && (target_ticks > ticks));
if (target_ticks <= ticks) {
log(LOG_ERROR, "pata_wait_ready_not_busy: timeout");
logmsg(LOG_ERROR, "pata_wait_ready_not_busy: timeout");
log_num(LOG_ERROR, "target_ticks: ", (int)target_ticks);
log_num(LOG_ERROR, "ticks: ", (int)ticks);
@ -142,7 +142,7 @@ short pata_wait_data_request() {
} while (((status & PATA_STAT_DRQ) != PATA_STAT_DRQ) && (target_ticks > ticks));
if (target_ticks <= ticks) {
log(LOG_ERROR, "pata_wait_data_request: timeout");
logmsg(LOG_ERROR, "pata_wait_data_request: timeout");
return DEV_TIMEOUT;
} else {
return 0;
@ -161,7 +161,7 @@ char g_buffer[512];
// 0 on success, any negative number is an error code
//
short pata_identity(p_drive_info drive_info) {
char * buffer;
char * buffer = 0;
unsigned short *wptr;
char * cptr;
short i;
@ -198,7 +198,6 @@ short pata_identity(p_drive_info drive_info) {
TRACE("data copied");
wptr = (unsigned short *)buffer;
drive_info->flags = g_buffer[1] << 16 | g_buffer[0];
drive_info->lba_enabled = g_buffer[99] << 16 | g_buffer[98];
drive_info->l.lbaw.lba_default_lo = g_buffer[121] << 8 | g_buffer[120];
@ -355,12 +354,12 @@ short pata_flush_cache() {
status = *PATA_CMD_STAT;
if ((status & PATA_STAT_DF) != 0){
log(LOG_ERROR, "pata_flush_cache: device fault");
logmsg(LOG_ERROR, "pata_flush_cache: device fault");
return -1;
}
if ((status & PATA_STAT_ERR) != 0) {
log(LOG_ERROR, "pata_flush_cache: error");
logmsg(LOG_ERROR, "pata_flush_cache: error");
return -1;
}
@ -391,7 +390,7 @@ short pata_write(long lba, const unsigned char * buffer, short size) {
if (pata_wait_ready_not_busy()) {
/* Turn off the HDD LED */
ind_set(IND_HDC, IND_OFF);
log(LOG_ERROR, "pata_write: pata_wait_ready_not_busy timeout 1");
logmsg(LOG_ERROR, "pata_write: pata_wait_ready_not_busy timeout 1");
return DEV_TIMEOUT;
}
@ -400,7 +399,7 @@ short pata_write(long lba, const unsigned char * buffer, short size) {
if (pata_wait_ready_not_busy()) {
/* Turn off the HDD LED */
ind_set(IND_HDC, IND_OFF);
log(LOG_ERROR, "pata_write: pata_wait_ready_not_busy timeout 2");
logmsg(LOG_ERROR, "pata_write: pata_wait_ready_not_busy timeout 2");
return DEV_TIMEOUT;
}
@ -418,7 +417,7 @@ short pata_write(long lba, const unsigned char * buffer, short size) {
if (pata_wait_ready_not_busy()) {
/* Turn off the HDD LED */
ind_set(IND_HDC, IND_OFF);
log(LOG_ERROR, "pata_write: pata_wait_ready_not_busy timeout 3");
logmsg(LOG_ERROR, "pata_write: pata_wait_ready_not_busy timeout 3");
return DEV_TIMEOUT;
}
@ -433,7 +432,7 @@ short pata_write(long lba, const unsigned char * buffer, short size) {
if (pata_wait_ready_not_busy()) {
/* Turn off the HDD LED */
ind_set(IND_HDC, IND_OFF);
log(LOG_ERROR, "pata_write: pata_wait_ready_not_busy timeout 4");
logmsg(LOG_ERROR, "pata_write: pata_wait_ready_not_busy timeout 4");
return DEV_TIMEOUT;
}
@ -442,7 +441,7 @@ short pata_write(long lba, const unsigned char * buffer, short size) {
status = *PATA_CMD_STAT;
if ((status & PATA_STAT_DF) != 0){
log(LOG_ERROR, "pata_write: device fault");
logmsg(LOG_ERROR, "pata_write: device fault");
/* Turn off the HDD LED */
ind_set(IND_HDC, IND_OFF);
@ -451,7 +450,7 @@ short pata_write(long lba, const unsigned char * buffer, short size) {
}
if ((status & PATA_STAT_ERR) != 0) {
log(LOG_ERROR, "pata_write: error");
logmsg(LOG_ERROR, "pata_write: error");
/* Turn off the HDD LED */
ind_set(IND_HDC, IND_OFF);

11
src/dev/pata.h
View file

@ -5,6 +5,7 @@
#ifndef __PATA_H
#define __PATA_H
#include <stdint.h>
#include "types.h"
#define PATA_GET_SECTOR_COUNT 1
@ -22,17 +23,17 @@
//
typedef struct s_drive_info {
unsigned short flags;
uint16_t flags;
char serial_number[18];
char firmware_version[6];
char model_name[38];
unsigned short lba_enabled;
uint16_t lba_enabled;
union u1 {
struct s1 {
unsigned short lba_default_lo;
unsigned short lba_default_hi;
uint16_t lba_default_lo;
uint16_t lba_default_hi;
} lbaw;
unsigned long lba_default;
uint32_t lba_default;
} l;
} t_drive_info, *p_drive_info;

148
src/dev/ps2.c
View file

@ -6,6 +6,7 @@
#include <stdlib.h>
#include <string.h>
#include "errors.h"
#include "log_level.h"
#include "log.h"
#include "types.h"
#include "ring_buffer.h"
@ -334,7 +335,7 @@ const char g_us_sc_alt_shift[] = {
short ps2_wait_out() {
long target_ticks;
// log(LOG_TRACE, "ps2_wait_out");
// logmsg(LOG_TRACE, "ps2_wait_out");
target_ticks = rtc_get_jiffies() + PS2_TIMEOUT_JF;
while ((*PS2_STATUS & PS2_STAT_OBF) == 0) {
@ -355,7 +356,7 @@ short ps2_wait_out() {
short ps2_wait_in() {
long target_ticks;
// log(LOG_TRACE, "ps2_wait_in");
// logmsg(LOG_TRACE, "ps2_wait_in");
target_ticks = rtc_get_jiffies() + PS2_TIMEOUT_JF;
while ((*PS2_STATUS & PS2_STAT_IBF) != 0) {
@ -374,11 +375,34 @@ short ps2_wait_in() {
* The response from the PS/2 controller, -1 if there was a timeout
*/
short ps2_controller_cmd(unsigned char cmd) {
if (ps2_wait_in()) return -1;
if (ps2_wait_in()) {
INFO("ps2_controller_cmd: ps2_wait_in timeout");
return -1;
}
*PS2_CMD_BUF = cmd;
if (ps2_wait_out()) return -1;
return (short)*PS2_DATA_BUF;
if (ps2_wait_out()) {
INFO("ps2_controller_cmd: ps2_wait_out timeout");
return -1;
}
short result = (short)*PS2_DATA_BUF;
// DEBUG2("PS/2: ps2_controller_cmd(%02X) = %02X", cmd, result);
return result;
}
/*
* Send a command to the controller and wait for a response.
*
* Returns: 0 on success, -1 on timeout
*/
short ps2_controller_cmd_noreply(unsigned char cmd) {
if (ps2_wait_in()) {
INFO("ps2_controller_cmd_noreply: ps2_wait_in timeout");
return -1;
}
*PS2_CMD_BUF = cmd;
return 0;
}
/*
@ -388,10 +412,16 @@ short ps2_controller_cmd(unsigned char cmd) {
* The response from the PS/2 controller, -1 if there was a timeout
*/
short ps2_controller_cmd_param(unsigned char cmd, unsigned char parameter) {
if (ps2_wait_in()) return -1;
if (ps2_wait_in()) {
DEBUG("ps2_controller_cmd_param: ps2_wait_in #1 timeout.");
return -1;
}
*PS2_CMD_BUF = cmd;
if (ps2_wait_in()) return -1;
if (ps2_wait_in()) {
DEBUG("ps2_controller_cmd_param: ps2_wait_in #2 timeout.");
return -1;
}
*PS2_DATA_BUF = parameter;
return 0;
@ -404,12 +434,18 @@ short ps2_controller_cmd_param(unsigned char cmd, unsigned char parameter) {
* The response from the PS/2 controller, -1 if there was a timeout
*/
short ps2_kbd_cmd_p(unsigned char cmd, unsigned char parameter) {
if (ps2_wait_in()) return -1;
if (ps2_wait_in()) {
DEBUG("ps2_kbd_cmd_p: ps2_wait_in #1 timeout.");
return -1;
}
*PS2_DATA_BUF = cmd;
// May need a delay here
if (ps2_wait_in()) return -1;
if (ps2_wait_in()) {
DEBUG("ps2_kbd_cmd_p: ps2_wait_in #2 timeout.");
return -1;
}
*PS2_DATA_BUF = parameter;
// Return 0 by default... maybe read DATA?
@ -541,6 +577,11 @@ void kbd_handle_irq() {
/* Clear the pending flag */
int_clear(INT_KBD_PS2);
#if MODEL == MODEL_FOENIX_C256U || MODEL == MODEL_FOENIX_C256U_PLUS || MODEL == MODEL_FOENIX_FMX
volatile __attribute__((far)) char * text = (char *)0xafa002;
*text = *text + 1;
#endif
if (scan_code) {
// Make sure the scan code isn't 0 or 128, which are invalid make/break codes
if ((scan_code != 0) && (scan_code != 0x80)) {
@ -1143,6 +1184,47 @@ short kbd_layout(const char * tables) {
return 0;
}
/**
* @brief Attempt to identify the device on the given PS/2 port
*
* @param port 1 (keyboard port), or 2 (mouse port)
*/
void ps2_identify(short port) {
short res = 0;
short byte0 = 0;
short byte1 = 0;
switch(port) {
case 1:
res = ps2_kbd_cmd(KBD_CMD_DISABLE, 100);
res = ps2_kbd_cmd(KBD_CMD_ID, 100);
if (ps2_wait_in()) {
ERROR("PS/2: ps2_identify timeout #1.");
} else {
byte0 = (short)*PS2_DATA_BUF;
}
if (ps2_wait_in()) {
ERROR("PS/2: ps2_identify timeout #2.");
} else {
byte1 = (short)*PS2_DATA_BUF;
}
if (byte1 >= 0) {
INFO2("PS/2: ps2_identification: %02X %02X.", byte0, byte1);
} else {
INFO1("PS/2: ps2_identification: %02X.", byte0);
}
res = ps2_kbd_cmd(KBD_CMD_ENABLE, 0);
break;
default:
break;
}
}
/*
* Initialize the PS2 controller and any attached devices
* Enable keyboard and mouse interrupts as appropriate.
@ -1151,10 +1233,12 @@ short kbd_layout(const char * tables) {
* Status code indicating if either the mouse or the keyboard is missing.
*/
short ps2_init() {
unsigned char x;
short mouse_present;
short mouse_error;
short res;
unsigned char x = 0;
short mouse_present = 0;
short mouse_error = 0;
short res = 0;
DEBUG("PS/2: ps2_init entered.");
// Initialize the keyboard controller variables
@ -1178,55 +1262,66 @@ short ps2_init() {
int_disable(INT_MOUSE); /* Disable mouse interrupts */
int_disable(INT_KBD_PS2); /* Disable keyboar interrupts */
INFO("PS/2: Interrupts disabled.");
// Prevent the keyboard and mouse from sending events
ps2_controller_cmd(PS2_CTRL_DISABLE_1);
ps2_controller_cmd(PS2_CTRL_DISABLE_2);
ps2_controller_cmd_noreply(PS2_CTRL_DISABLE_1);
ps2_controller_cmd_noreply(PS2_CTRL_DISABLE_2);
// Read and clear out the controller's output buffer
ps2_flush_out();
// // Controller selftest...
if (ps2_controller_cmd(PS2_CTRL_SELFTEST) != PS2_RESP_OK) {
INFO("PS/2: FAILED controller self test.");
; // return PS2_FAIL_SELFTEST;
} else {
DEBUG("PS/2: PASSED controller self test.");
}
// Keyboard test
if (ps2_controller_cmd(PS2_CTRL_KBDTEST) != 0) {
INFO("PS/2: FAILED port #1 test.");
; // return PS2_FAIL_KBDTEST;
} else {
DEBUG("PS/2: PASSED port #1 test.");
}
/* Test if the mouse is working */
if (ps2_controller_cmd(PS2_CTRL_MOUSETEST) == 0) {
mouse_present = 1;
} else {
if (ps2_controller_cmd(PS2_CTRL_MOUSETEST) != 0) {
INFO("PS/2: FAILED port #2 test.");
mouse_present = 0;
} else {
DEBUG("PS/2: PASSED port #2 test.");
mouse_present = 1;
}
// Set scancode translation to set1, enable interrupts on mouse and keyboard
ps2_controller_cmd_param(PS2_CTRL_WRITECMD, 0x43); /* %01000011 */
// Enable the keyboard, don't check response
ps2_wait_in();
*PS2_CMD_BUF = PS2_CTRL_ENABLE_1;
// Enable the port #1, don't check response
ps2_controller_cmd_noreply(PS2_CTRL_ENABLE_1);
INFO("PS/2: port #1 enabled.");
// Reset the keyboard... waiting a bit before we check for a result
ps2_kbd_cmd(KBD_CMD_RESET, 1000);
INFO("PS/2: Keyboard reset.");
// Ideally, we would attempt a re-enable several times, but this doesn't work on the U/U+ for some keyboards
ps2_kbd_cmd(KBD_CMD_ENABLE, 0);
INFO("PS/2: Keyboard enabled.");
// TODO: set the keyboard LEDs
if (mouse_present) {
/* Initialize the mouse */
if (mouse_error = mouse_init()) {
log_num(LOG_INFO, "Unable to initialize mouse", res);
if ((mouse_error = mouse_init())) {
log_num(LOG_INFO, "Unable to initialize mouse", mouse_error);
}
}
ps2_wait_in();
*PS2_CMD_BUF = PS2_CTRL_ENABLE_2;
ps2_controller_cmd_noreply(PS2_CTRL_ENABLE_2);
INFO("PS/2: port #2 enabled.");
// Make sure everything is read
ps2_flush_out();
@ -1239,9 +1334,10 @@ short ps2_init() {
// Enable the keyboard interrupt
int_enable(INT_KBD_PS2);
INFO("PS/2: Keyboard interrupt enabled.");
if (mouse_present && (mouse_error == 0)) {
log(LOG_TRACE, "mouse enabled");
DEBUG("mouse enabled");
// Register the interrupt handler for the mouse
int_register(INT_MOUSE, mouse_handle_irq);

42
src/dev/rtc.c
View file

@ -10,7 +10,7 @@
#include "simpleio.h"
#include "timers.h"
static long rtc_ticks;
static unsigned long rtc_ticks;
/*
* Interrupt handler for the real time clock
@ -18,8 +18,8 @@ static long rtc_ticks;
void rtc_handle_int() {
unsigned char flags;
/* Periodic interrupt: increment the ticks counter */
flags = *RTC_FLAGS;
flags = *RTC_FLAGS; /* Acknowledge the interrupt */
rtc_ticks++;
}
@ -31,30 +31,28 @@ void rtc_init() {
unsigned char rates;
unsigned char enables;
log(LOG_TRACE, "rtc_init");
TRACE("rtc_init");
int_disable(INT_RTC);
/* Make sure the RTC is on */
*RTC_CTRL = (*RTC_CTRL & 0x07) | RTC_STOP;
*RTC_CTRL = RTC_STOP;
/*
* For the moment: Every so often, the RTC interrupt gets acknowledged
* without clearing the flags. Until I can sort out why, I will use
* the SOF A interrupt as a surrogate for the RTC jiffie timer
*/
#if !(MODEL == MODEL_FOENIX_C256U || MODEL == MODEL_FOENIX_C256U_PLUS || MODEL == MODEL_FOENIX_FMX)
// /* Set the periodic interrupt to 15 millisecs */
// *RTC_RATES = RTC_RATE_15ms;
//
// int_register(INT_RTC, rtc_handle_int);
//
// /* Enable the periodic interrupt */
// flags = *RTC_FLAGS;
// *RTC_ENABLES = RTC_PIE;
// rtc_ticks = 0;
//
// int_enable(INT_RTC);
*RTC_RATES = RTC_RATE_15ms;
int_register(INT_RTC, rtc_handle_int);
rtc_ticks = 0;
/* Enable the periodic interrupt */
rtc_enable_ticks();
#endif
}
/*
@ -64,7 +62,7 @@ void rtc_enable_ticks() {
/* Set the periodic interrupt to 15 millisecs */
*RTC_RATES = RTC_RATE_15ms;
unsigned char flags = *RTC_FLAGS;
unsigned char flags = *RTC_FLAGS; /* Acknowledge any previous interrupt before we start. */
*RTC_ENABLES = RTC_PIE;
@ -92,6 +90,7 @@ short rtc_register_periodic(short rate, FUNC_V_2_V handler) {
int_enable(INT_RTC);
}
return 0;
}
/*
@ -139,7 +138,7 @@ void rtc_set_time(p_time time) {
/* Temporarily disable updates to the clock */
ctrl = *RTC_CTRL;
*RTC_CTRL = ctrl | RTC_UTI;
log(LOG_INFO, "RTC Disabled");
logmsg(LOG_INFO, "RTC Disabled");
log_num(LOG_INFO, "RTC Rates: ", *RTC_RATES);
log_num(LOG_INFO, "RTC Enables: ", *RTC_ENABLES);
log_num(LOG_INFO, "RTC Flags: ", *RTC_FLAGS);
@ -179,7 +178,7 @@ void rtc_set_time(p_time time) {
/* Re-enable updates to the clock */
*RTC_CTRL = (ctrl & 0x07) | RTC_STOP;
log(LOG_INFO, "RTC Enabled");
logmsg(LOG_INFO, "RTC Enabled");
log_num(LOG_INFO, "RTC Rates: ", *RTC_RATES);
log_num(LOG_INFO, "RTC Enables: ", *RTC_ENABLES);
log_num(LOG_INFO, "RTC Flags: ", *RTC_FLAGS);
@ -200,7 +199,7 @@ void rtc_get_time(p_time time) {
/* Temporarily disable updates to the clock */
ctrl = *RTC_CTRL;
*RTC_CTRL = ctrl | RTC_UTI;
log(LOG_INFO, "RTC Disabled");
logmsg(LOG_INFO, "RTC Disabled");
log_num(LOG_INFO, "RTC Rates: ", *RTC_RATES);
log_num(LOG_INFO, "RTC Enables: ", *RTC_ENABLES);
log_num(LOG_INFO, "RTC Flags: ", *RTC_FLAGS);
@ -222,7 +221,7 @@ void rtc_get_time(p_time time) {
/* Re-enable updates to the clock */
*RTC_CTRL = (ctrl & 0x07) | RTC_STOP;
log(LOG_INFO, "RTC Enabled");
logmsg(LOG_INFO, "RTC Enabled");
log_num(LOG_INFO, "RTC Rates: ", *RTC_RATES);
log_num(LOG_INFO, "RTC Enables: ", *RTC_ENABLES);
log_num(LOG_INFO, "RTC Flags: ", *RTC_FLAGS);
@ -260,3 +259,4 @@ void rtc_get_time(p_time time) {
long rtc_get_jiffies() {
return timers_jiffies();
}

17
src/dev/sdc.c
View file

@ -72,11 +72,7 @@ short sdc_protected() {
// is_on = if 0, turn the LED off, otherwise turn the LED on
//
void sdc_set_led(short is_on) {
if (is_on) {
*GABE_CTRL_REG = *GABE_CTRL_REG | SDCARD_LED;
} else {
*GABE_CTRL_REG = *GABE_CTRL_REG & ~SDCARD_LED;
}
ind_set(IND_SDC, is_on);
}
//
@ -87,7 +83,6 @@ void sdc_set_led(short is_on) {
//
short sdc_wait_busy() {
long timer_ticks;
int retry_count = MAX_TRIES_BUSY;
unsigned char status;
timer_ticks = rtc_get_jiffies() + SDC_TIMEOUT_JF;
@ -126,18 +121,18 @@ short sdc_init() {
if (sdc_wait_busy() == 0) { // Wait for it to complete
g_sdc_error = *SDC_TRANS_ERROR_REG; // Check for any error condition
if (g_sdc_error == 0) {
log(LOG_INFO, "sdc_init: SUCCESS");
logmsg(LOG_INFO, "sdc_init: SUCCESS");
g_sdc_status = 0; // Flag that the SD has been initialized
return 0;
} else {
log(LOG_ERROR, "sdc_init: DEV_CANNOT_INIT");
logmsg(LOG_ERROR, "sdc_init: DEV_CANNOT_INIT");
g_sdc_status = SDC_STAT_NOINIT;
return DEV_CANNOT_INIT;
}
} else {
log(LOG_ERROR, "sdc_init: DEV_TIMEOUT");
logmsg(LOG_ERROR, "sdc_init: DEV_TIMEOUT");
g_sdc_status = SDC_STAT_NOINIT;
return DEV_TIMEOUT;
}
@ -414,8 +409,10 @@ short sdc_ioctrl(short command, unsigned char * buffer, short size) {
break;
default:
return 0;
break;
}
return 0;
}
//

237
src/dev/superio.c Normal file
View file

@ -0,0 +1,237 @@
/* Functions for the SuperIO */
#include "features.h"
#include "superio.h"
#if HAS_SUPERIO
static void configure_zones(void);
/*
* Initialize the SuperIO registers
*/
void superio_init(void) {
#if MODEL == MODEL_FOENIX_A2560X || MODEL == MODEL_FOENIX_GENX
// This initialization used to be done by the FPGA.
// Other machines A2560K/C256FMX will have this change soon to.
configure_zones();
#endif
*GP10_REG = 0x01;
*GP11_REG = 0x01;
*GP12_REG = 0x01;
*GP13_REG = 0x01;
*GP14_REG = 0x05;
*GP15_REG = 0x05;
*GP16_REG = 0x05;
*GP17_REG = 0x05;
*GP20_REG = 0x00;
*GP24_REG = 0x01;
*GP25_REG = 0x05;
*GP26_REG = 0x84;
*GP30_REG = 0x01;
*GP31_REG = 0x01;
*GP32_REG = 0x01;
*GP33_REG = 0x04; // FAN1 GPIO Config
*GP34_REG = 0x01;
*GP35_REG = 0x01;
*GP36_REG = 0x01;
*GP37_REG = 0x01;
*GP42_REG = 0x01;
*GP43_REG = 0x01;
*GP50_REG = 0x05;
*GP51_REG = 0x05;
*GP52_REG = 0x05;
*GP53_REG = 0x04;
*GP54_REG = 0x05;
*GP55_REG = 0x04;
*GP56_REG = 0x05;
*GP57_REG = 0x04;
*GP60_REG = 0x84;
*GP61_REG = 0x84;
*GP1_REG = 0x00;
*GP2_REG = 0x01;
*GP3_REG = 0x00;
*GP4_REG = 0x00;
*GP5_REG = 0x00;
*GP6_REG = 0x00;
*LED1_REG = 0x01;
*LED2_REG = 0x02;
*FAN1_REG = 0xE0; // <= Value to change to Get the Fan running.
// See doc for more options, need to set $80 to get it started and use other bits to change the PWN...
*FAN_CTRL_REG = 0x01;
}
static void configure_zones(void) {
// First step is to get into the Configuration Mode
*CONFIG_0x2E_REG = 0x55; // We need to Get into the Config Mode with 0x55
// Setting Up Device 0 - Floppy
// {8'h06,16'h03F0,8'h00};
// LD
*CONFIG_0x2E_REG = 0x07;
*CONFIG_0x2F_REG = 0x00;
// BA_H (Base address)
*CONFIG_0x2E_REG = 0x60;
*CONFIG_0x2F_REG = 0x03;
// BA_L
*CONFIG_0x2E_REG = 0x61;
*CONFIG_0x2F_REG = 0xF0;
// INT
*CONFIG_0x2E_REG = 0x70;
*CONFIG_0x2F_REG = 0x06;
// Enable the Zone
*CONFIG_0x2E_REG = 0x30;
*CONFIG_0x2F_REG = 0x01;
// Setting Up Device 3 - Parallel Port
// {8'h07,16'h0378,8'h03};
// LD
*CONFIG_0x2E_REG = 0x07;
*CONFIG_0x2F_REG = 0x03;
// BA_H (Base address)
*CONFIG_0x2E_REG = 0x60;
*CONFIG_0x2F_REG = 0x03;
// BA_L
*CONFIG_0x2E_REG = 0x61;
*CONFIG_0x2F_REG = 0x78;
// INT0
*CONFIG_0x2E_REG = 0x70;
*CONFIG_0x2F_REG = 0x07;
// Parallel Mode
*CONFIG_0x2E_REG = 0xF0;
*CONFIG_0x2F_REG = 0x3A;
// Enable the Zone
*CONFIG_0x2E_REG = 0x30;
*CONFIG_0x2F_REG = 0x01;
// Setting Up Device 4 - Serial Port 1
// {8'h04,16'h03F8,8'h04};
// LD
*CONFIG_0x2E_REG = 0x07;
*CONFIG_0x2F_REG = 0x04;
// BA_H (Base address)
*CONFIG_0x2E_REG = 0x60;
*CONFIG_0x2F_REG = 0x03;
// BA_L
*CONFIG_0x2E_REG = 0x61;
*CONFIG_0x2F_REG = 0xF8;
// INT0
*CONFIG_0x2E_REG = 0x70;
*CONFIG_0x2F_REG = 0x04;
// Enable the Zone
*CONFIG_0x2E_REG = 0x30;
*CONFIG_0x2F_REG = 0x01;
// Setting Up Device 5 - Serial Port 2
// {8'h03,16'h02F8,8'h05};
// LD
*CONFIG_0x2E_REG = 0x07;
*CONFIG_0x2F_REG = 0x05;
// BA_H (Base address)
*CONFIG_0x2E_REG = 0x60;
*CONFIG_0x2F_REG = 0x02;
// BA_L
*CONFIG_0x2E_REG = 0x61;
*CONFIG_0x2F_REG = 0xF8;
// INT0
*CONFIG_0x2E_REG = 0x70;
*CONFIG_0x2F_REG = 0x03;
// Enable the Zone
*CONFIG_0x2E_REG = 0x30;
*CONFIG_0x2F_REG = 0x01;
// Setting Up Device 7 - Keyboard
// {8'h01, 16'h0060,8'h07};
// LD
*CONFIG_0x2E_REG = 0x07;
*CONFIG_0x2F_REG = 0x07;
// BA_H (Base address)
*CONFIG_0x2E_REG = 0x60;
*CONFIG_0x2F_REG = 0x00;
// BA_L
*CONFIG_0x2E_REG = 0x61;
*CONFIG_0x2F_REG = 0x60;
// INT0 (Keyboard)
*CONFIG_0x2E_REG = 0x70;
*CONFIG_0x2F_REG = 0x01;
// INT1 (mouse)
*CONFIG_0x2E_REG = 0x72;
*CONFIG_0x2F_REG = 0x02;
// Enable the Zone
*CONFIG_0x2E_REG = 0x30;
*CONFIG_0x2F_REG = 0x01;
// Setting Up Device 9 - Game Port
// {8'h00, 16'h0200,8'h09};
// LD
*CONFIG_0x2E_REG = 0x07;
*CONFIG_0x2F_REG = 0x09;
// BA_H (Base address)
*CONFIG_0x2E_REG = 0x60;
*CONFIG_0x2F_REG = 0x02;
// BA_L
*CONFIG_0x2E_REG = 0x61;
*CONFIG_0x2F_REG = 0x00;
// INT0
*CONFIG_0x2E_REG = 0x70;
*CONFIG_0x2F_REG = 0x00;
// Enable the Zone
*CONFIG_0x2E_REG = 0x30;
*CONFIG_0x2F_REG = 0x01;
// Setting Up Device 10 - PME (Power Management)
// {8'h00, 16'h0100,8'h0A};
// LD
*CONFIG_0x2E_REG = 0x07;
*CONFIG_0x2F_REG = 0x0A;
// BA_H (Base address)
*CONFIG_0x2E_REG = 0x60;
*CONFIG_0x2F_REG = 0x01;
// BA_L
*CONFIG_0x2E_REG = 0x61;
*CONFIG_0x2F_REG = 0x00;
// INT0
*CONFIG_0x2E_REG = 0x70;
*CONFIG_0x2F_REG = 0x00;
// Enable the Zone
*CONFIG_0x2E_REG = 0x30;
*CONFIG_0x2F_REG = 0x01;
// Setting Up Device 11 - PME (Power Management)
// {8'h05,16'h0330,8'h0B};
// LD
*CONFIG_0x2E_REG = 0x07;
*CONFIG_0x2F_REG = 0x0B;
// BA_H (Base address)
*CONFIG_0x2E_REG = 0x60;
*CONFIG_0x2F_REG = 0x03;
// BA_L
*CONFIG_0x2E_REG = 0x61;
*CONFIG_0x2F_REG = 0x30;
// INT0
*CONFIG_0x2E_REG = 0x70;
*CONFIG_0x2F_REG = 0x05;
// Enable the Zone
*CONFIG_0x2E_REG = 0x30;
*CONFIG_0x2F_REG = 0x01;
// Supplemental Settings
// Power On Device
*CONFIG_0x2E_REG = 0x22;
*CONFIG_0x2F_REG = 0xFF;
// We are done with config.
*CONFIG_0x2E_REG = 0xAA; // We need to Get into the Config Mode with 0x55
*GP60_REG = 0x84; // THis is to replicate the FPGA behavior when it did the config.
*LED1_REG = 0x01; // THis is to replace the FPGA behavior when it did the config in hardware.
}
#endif

58
src/dev/timers_c256.c Normal file
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@ -0,0 +1,58 @@
#include <stdint.h>
#include "interrupt.h"
#include "timers.h"
#include "gabe_reg.h"
#include "timers_reg.h"
long jiffy_count;
/**
* @brief Interrupt handler for the timer 0 interrupt... counts jiffies since boot
*
*/
void timer_0_handler() {
jiffy_count++;
}
/*
* Initialize the timers and their interrupts
*/
void timers_init() {
// Number of system clock ticks per second
const uint32_t sys_clock = 14318180;
// Number of system clocks per jiffy
const uint32_t jiffy_target = sys_clock / (uint32_t)60;
jiffy_count = 0;
// Disable all timers
*TIMER_CTRL_0 = 0;
*TIMER_CTRL_1 = 0;
*TIMER_CTRL_2 = 0;
// Register our timer 0 interrupt handler
int_register(INT_SOF_A, timer_0_handler);
int_enable(INT_SOF_A);
// Set timer 0 to tick every jiffy
// *TIMER_CHG_L_0 = jiffy_target & 0xff;
// *TIMER_CHG_M_0 = (jiffy_target >> 8) & 0xff;
// *TIMER_CHG_H_0 = (jiffy_target >> 16) & 0xff;
// *TIMER_CMP_L_0 = 0;
// *TIMER_CMP_M_0 = 0;
// *TIMER_CMP_H_0 = 0;
// *TIMER_CMPC_0 = TIMER_CMP_RELOAD;
// *TIMER_CTRL_0 = TIMER_CTRL_EN | TIMER_CTRL_SLOAD;
}
/*
* Return the number of jiffies (1/60 of a second) since last reset time
*/
long timers_jiffies() {
return jiffy_count;
}

70
src/dev/txt_a2560u.c
View file

@ -132,20 +132,33 @@ static void txt_a2560u_get_sizes(p_extent text_size, p_extent pixel_size) {
*/
static short txt_a2560u_set_mode(short mode) {
/* Turn off anything not set */
msr_shadow &= ~(TXT_MODE_SLEEP | TXT_MODE_TEXT);
uint32_t old_msr = *MasterControlReg_A;
uint32_t new_msr = old_msr & ~(VKY3_MCR_BLANK_EN|VKY3_MCR_TEXT_EN|VKY3_MCR_TEXT_OVRLY|VKY3_MCR_GRAPH_EN|VKY3_MCR_BITMAP_EN); // Mask out bits we'll set here
if (mode & TXT_MODE_SLEEP) {
/* Put the monitor to sleep */
msr_shadow |= VKY3_MCR_BLANK_EN;
/* Put the monitor to sleep (preserve settings) */
new_msr |= VKY3_MCR_BLANK_EN;
} else {
if (mode & TXT_MODE_TEXT) {
new_msr |= VKY3_MCR_TEXT_EN;
} else if (mode & TXT_MODE_BITMAP) {
new_msr |= VKY3_MCR_BITMAP_EN|VKY3_MCR_GRAPH_EN/*Is this really required?*/;
// Disable gamma (as I'm not sure it functional, but I may as well not understand it)
new_msr |= VKY3_MCR_GAMMA_EN;
new_msr &= ~VKY3_MCR_MANUAL_GAMMA_EN;
}
/* If we want text and graphics, enable the overlay mode */
if ((mode & (TXT_MODE_BITMAP|TXT_MODE_TEXT)) == (TXT_MODE_BITMAP|TXT_MODE_TEXT)) {
// It seems just doing 'new_msr |= VKY3_MCR_TEXT_OVRLY' doesn't work
new_msr |= (VKY3_MCR_TEXT_EN|VKY3_MCR_TEXT_OVRLY|VKY3_MCR_GRAPH_EN|VKY3_MCR_BITMAP_EN);
}
}
if (new_msr != old_msr) {
msr_shadow = new_msr;
*MasterControlReg_A = msr_shadow;
return 0;
} else if (mode & TXT_MODE_TEXT) {
/* Put on text mode */
msr_shadow |= VKY3_MCR_TEXT_EN;
*MasterControlReg_A = msr_shadow;
return 0;
} else {
/* Unsupported mode */
return -1;
@ -172,11 +185,7 @@ static short txt_a2560u_set_resolution(short width, short height) {
}
}
{
char msg[80];
sprintf(msg, "Setting resolution %dx%d", width, height);
DEBUG(msg);
}
DEBUG2("Setting resolution %dx%d", width, height);
/* Turn off resolution bits */
/* TODO: there gotta be a better way to do that */
@ -321,11 +330,7 @@ static short txt_a2560u_get_region(p_rect region) {
region->size.width = a2560u_region.size.width;
region->size.height = a2560u_region.size.height;
{
char msg[80];
sprintf(msg,"txt_a2560u_get_region %p: x:%d, y:%d, w:%d, h:%d", region, region->origin.x, region->origin.y, region->size.width, region->size.height);
DEBUG(msg);
}
DEBUG5("txt_a2560u_get_region %p: x:%d, y:%d, w:%d, h:%d", region, region->origin.x, region->origin.y, region->size.width, region->size.height);
return 0;
}
@ -339,10 +344,7 @@ static short txt_a2560u_get_region(p_rect region) {
* @return 0 on success, any other number means the region was invalid
*/
static short txt_a2560u_set_region(const p_rect region) {
char msg[80];
sprintf(msg,"SET REGION %p x:%d, y:%d, w:%d, h:%d (visible:%d,%d)",
region, region->origin.x, region->origin.y, region->size.width, region->size.height, a2560u_visible_size.width, a2560u_visible_size.height);
DEBUG(msg);
DEBUG7("SET REGION %p x:%d, y:%d, w:%d, h:%d (visible:%d,%d)", region, region->origin.x, region->origin.y, region->size.width, region->size.height, a2560u_visible_size.width, a2560u_visible_size.height);
if ((region->size.width == 0) || (region->size.height == 0)) {
/* Set the region to the default (full screen) */
@ -360,11 +362,7 @@ static short txt_a2560u_set_region(const p_rect region) {
//DEBUG(msg);
}
{
sprintf(msg,"txt_a2560u_set_region: NEW REGION %p x:%d, y:%d, w:%d, h:%d (visible:%d,%d)",
region, region->origin.x, region->origin.y, region->size.width, region->size.height, a2560u_visible_size.width, a2560u_visible_size.height);
//DEBUG(msg);
}
DEBUG7("txt_a2560u_set_region: NEW REGION %p x:%d, y:%d, w:%d, h:%d (visible:%d,%d)", region, region->origin.x, region->origin.y, region->size.width, region->size.height, a2560u_visible_size.width, a2560u_visible_size.height);
return 0;
}
@ -394,17 +392,17 @@ static short txt_a2560u_set_color(unsigned char foreground, unsigned char backgr
/* This works around a bug in the A2560U's FPGA where reading bytes of text memory
* (possibly color as well ?) are inverted. Ie if the memory contains AB, A beint on an
* (possibly color as well ?) are inverted. Ie if the memory contains AB, A being on an
* even address, then when reading A you'll get B and reading B you'll get A. This
* functions can be removed if the FPGA is corrected. */
static char read_swapped_byte(char *addr) {
static char read_swapped_byte(const uint8_t *addr) {
if ((long)addr & 1) {
short w = *(short*)(addr-1);
uint16_t w = *(uint16_t*)(addr-1);
return (char)w;
}
else {
short w = *(short*)(addr);
return ((char*)&w)[0];
uint16_t w = *(uint16_t*)(addr);
return ((uint8_t*)&w)[0];
}
}
@ -462,8 +460,8 @@ static void txt_a2560u_scroll(short horizontal, short vertical) {
}
/* Copy the rectangle. We can't copy byte by byte, they get swapped (FPGA bug) */
char * const text_mem = (char*)ScreenText_A;
char * const color_mem = (char*)ColorText_A;
volatile uint8_t * const text_mem = ScreenText_A;
volatile uint8_t * const color_mem = ColorText_A;
int delta_y = dy * a2560u_max_size.width;
int row_dst = y0 * a2560u_max_size.width - delta_y;

694
src/dev/txt_c256.c Normal file
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@ -0,0 +1,694 @@
/** @file txt_c256.c
*
* Text screen driver for c256
*/
#include <string.h>
#include <stdio.h>
#include "log.h"
#include "C256/vicky_ii.h"
#include "dev/txt_c256.h"
#include "dev/txt_screen.h"
extern const unsigned char MSX_CP437_8x8_bin[];
const t_color4 c256_clut[] = {
{0, 0, 0}, // 0: Black
{0, 0, 128}, // 1: Red
{0, 128, 0}, // 2: Green
{0, 128, 128}, // 3: Yellow
{128, 0, 0}, // 4: Blue
{128, 0, 128}, // 5: Magenta
{128, 128, 0}, // 6: Cyan
{192, 192, 192}, // 7: White
{128, 128, 128}, // 8: Bright Gray
{0, 0, 255}, // 9: Bright Red
{0, 255, 0}, // A: Bright Green
{0, 255, 255}, // B: Bright Yellow
{255, 0, 0}, // C: Bright Blue
{255, 0, 255}, // D: Bright Magenta
{255, 255, 0}, // E: Bright Cyan
{255, 255, 255} // F: Bright White
};
/*
* Driver level variables for the screen
*/
unsigned char c256_enable_set_sizes; /* Flag to enable set_sizes to actually do its computation */
t_txt_capabilities c256_caps; /* The capabilities of Channel A */
t_extent c256_resolutions[] = { /* The list of display resolutions */
{ 800, 600 },
{ 400, 300 },
{ 640, 480 },
{ 320, 240 }
};
t_extent c256_fonts[] = { /* The list of supported font resolutions */
{ 8, 8 }
};
t_rect c256_region; /* The current region */
t_point c256_cursor; /* The current cursor position */
t_extent c256_resolution; /* The current display resolution */
t_extent c256_font_size; /* The current font size */
t_extent c256_max_size; /* The size of the screen in characters (without border removed) */
t_extent c256_visible_size; /* The size of the visible screen in characters (with border removed) */
short c256_border_width; /* Width of the border on one side */
short c256_border_height; /* Height of the border on one side */
unsigned char c256_color; /* The current color */
unsigned long msr_shadow; /* A shadow register for the Master Control Register */
/**
* Gets the description of a screen's capabilities
*
* @return a pointer to the read-only description (0 on error)
*/
const p_txt_capabilities txt_c256_get_capabilities() {
return &c256_caps;
}
/**
* Calculate the size of the text screen in rows and columns so that
* the kernel printing routines can work correctly.
*
* NOTE: this should be called whenever the VKY3 registers are changed
*/
static void txt_c256_set_sizes() {
TRACE("txt_c256_set_sizes");
if (c256_enable_set_sizes) {
/* Only recalculate after initialization is mostly completed */
/*
* Calculate the maximum number of characters visible on the screen
* This controls text layout in memory
*/
c256_max_size.width = c256_resolution.width / c256_font_size.width;
c256_max_size.height = c256_resolution.height / c256_font_size.height;
/*
* Calculate the characters that are visible in whole or in part
*/
if ((c256_border_width != 0) && (c256_border_height != 0)) {
short border_width = (2 * c256_border_width) / c256_font_size.width;
short border_height = (2 * c256_border_height) / c256_font_size.height;
c256_visible_size.width = c256_max_size.width - border_width;
c256_visible_size.height = c256_max_size.height - border_height;
} else {
c256_visible_size.width = c256_max_size.width;
c256_visible_size.height = c256_max_size.height;
}
DEBUG4("txt_c256_set_sizes max:%d,%d, visible:%d,%d", c256_max_size.width, c256_max_size.height, c256_visible_size.width, c256_visible_size.height);
}
}
/**
* Get the display resolutions
*
* @param text_size the size of the screen in visible characters (may be null)
* @param pixel_size the size of the screen in pixels (may be null)
*/
static void txt_c256_get_sizes(p_extent text_size, p_extent pixel_size) {
if (text_size) {
text_size->width = c256_visible_size.width;
text_size->height = c256_visible_size.height;
}
if (pixel_size) {
pixel_size->width = c256_resolution.width;
pixel_size->height = c256_resolution.height;
}
}
/**
* Set the display mode for the screen
*
* @param mode a bitfield of desired display mode options
*
* @return 0 on success, any other number means the mode is invalid for the screen
*/
static short txt_c256_set_mode(short mode) {
/* Turn off anything not set */
msr_shadow &= ~(TXT_MODE_SLEEP | TXT_MODE_TEXT);
if (mode & TXT_MODE_SLEEP) {
/* Put the monitor to sleep */
msr_shadow |= VKY_MCR_DISABLE;
tvky_mstr_ctrl->raw = msr_shadow;
return 0;
} else if (mode & TXT_MODE_TEXT) {
/* Put on text mode */
msr_shadow |= VKY_MCR_TEXT;
tvky_mstr_ctrl->raw = msr_shadow;
return 0;
} else {
/* Unsupported mode */
return -1;
}
}
/**
* Set the display resolution of the screen
*
* @param width the desired horizontal resolution in pixels
* @param height the desired veritical resolution in pixels
*
* @return 0 on success, any other number means the resolution is unsupported
*/
static short txt_c256_set_resolution(short width, short height) {
// TODO: If no size specified, set it based on the DIP switch
/* Turn off resolution bits */
/* TODO: there gotta be a better way to do that */
msr_shadow &= ~(VKY_MCR_RES_MASK);
if ((width == 800) && (height == 600)) {
msr_shadow |= VKY_MCR_RES_800x600;
c256_resolution.width = width;
c256_resolution.height = height;
// Recalculate the size of the screen
txt_c256_set_sizes();
tvky_mstr_ctrl->raw = msr_shadow;
return 0;
} else if ((width == 640) && (height == 480)) {
msr_shadow |= VKY_MCR_RES_640x480;
c256_resolution.width = width;
c256_resolution.height = height;
// Recalculate the size of the screen
txt_c256_set_sizes();
tvky_mstr_ctrl->raw = msr_shadow;
return 0;
}
else if ((width == 320) && (height == 240)) {
msr_shadow |= VKY_MCR_RES_320x240;
c256_resolution.width = width;
c256_resolution.height = height;
// Recalculate the size of the screen
txt_c256_set_sizes();
tvky_mstr_ctrl->raw = msr_shadow;
return 0;
}
else if ((width == 400) && (height == 300)) {
msr_shadow |= VKY_MCR_RES_400x300;
c256_resolution.width = width;
c256_resolution.height = height;
// Recalculate the size of the screen
txt_c256_set_sizes();
tvky_mstr_ctrl->raw = msr_shadow;
return 0;
}
else {
/* Unsupported resolution */
return -1;
}
}
/**
* Set the size of the border of the screen (if supported)
*
* @param width the horizontal size of one side of the border (0 - 32 pixels)
* @param height the vertical size of one side of the border (0 - 32 pixels)
*/
static void txt_c256_set_border(short width, short height) {
if ((width > 0) || (height > 0)) {
c256_border_width = width;
c256_border_height = height;
tvky_brdr_ctrl->control = 0x01;
tvky_brdr_ctrl->size_x = width;
tvky_brdr_ctrl->sizy_y = height;
} else {
tvky_brdr_ctrl->control = 0;
tvky_brdr_ctrl->size_x = 0;
tvky_brdr_ctrl->sizy_y = 0;
}
// Recalculate the size of the screen
txt_c256_set_sizes();
}
/**
* Set the size of the border of the screen (if supported)
*
* @param red the red component of the color (0 - 255)
* @param green the green component of the color (0 - 255)
* @param blue the blue component of the color (0 - 255)
*/
static void txt_c256_set_border_color(unsigned char red, unsigned char green, unsigned char blue) {
tvky_brdr_ctrl->color.red = red;
tvky_brdr_ctrl->color.green = green;
tvky_brdr_ctrl->color.blue = blue;
}
/**
* Load a font as the current font for the screen
*
* @param width width of a character in pixels
* @param height of a character in pixels
* @param data pointer to the raw font data to be loaded
*/
static short txt_c256_set_font(short width, short height, const unsigned char * data) {
if (width == 8 && height == 8) {
int i;
/* The size is valid... set the font */
c256_font_size.width = width;
c256_font_size.height = height;
/* Copy the font data... this assumes a width of one byte! */
/* TODO: generalize this for all possible font sizes */
for (i = 0; i < 256 * height; i++) {
tvky_font_set_0[i] = data[i];
}
// Recalculate the size of the screen
txt_c256_set_sizes();
return 0;
} else {
return -1;
}
}
/**
* Set the appearance of the cursor
*
* @param enable 0 to hide, any other number to make visible
* @param rate the blink rate for the cursor (0=1s, 1=0.5s, 2=0.25s, 3=1/5s)
* @param c the character in the current font to use as a cursor
*/
static void txt_c256_set_cursor(short enable, short rate, char c) {
tvky_crsr_ctrl->control = ((rate & 0x03) << 1) | ((enable) ? 1 : 0);
tvky_crsr_ctrl->character = c;
}
/**
* Set if the cursor is visible or not
*
* @param enable 0 to hide, any other number to make visible
*/
static void txt_c256_set_cursor_visible(short enable) {
if (enable) {
tvky_crsr_ctrl->control |= 0x01;
} else {
tvky_crsr_ctrl->control &= ~0x01;
}
}
/**
* get the current region
*
* @param region pointer to a t_rect describing the rectangular region (using character cells for size and size)
*
* @return 0 on success, any other number means the region was invalid
*/
static short txt_c256_get_region(p_rect region) {
region->origin.x = c256_region.origin.x;
region->origin.y = c256_region.origin.y;
region->size.width = c256_region.size.width;
region->size.height = c256_region.size.height;
{
char msg[80];
sprintf(msg,"txt_c256_get_region %p: x:%d, y:%d, w:%d, h:%d", region, region->origin.x, region->origin.y, region->size.width, region->size.height);
DEBUG(msg);
}
return 0;
}
/**
* Set a region to restrict further character display, scrolling, etc.
* Note that a region of zero size will reset the region to the full size of the screen.
*
* @param region pointer to a t_rect describing the rectangular region (using character cells for size and size)
*
* @return 0 on success, any other number means the region was invalid
*/
static short txt_c256_set_region(const p_rect region) {
// char msg[80];
// sprintf(msg,"SET REGION %p x:%d, y:%d, w:%d, h:%d (visible:%d,%d)",
// region, region->origin.x, region->origin.y, region->size.width, region->size.height, c256_visible_size.width, c256_visible_size.height);
// DEBUG(msg);
if ((region->size.width == 0) || (region->size.height == 0)) {
/* Set the region to the default (full screen) */
c256_region.origin.x = 0;
c256_region.origin.y = 0;
c256_region.size.width = c256_visible_size.width;
c256_region.size.height = c256_visible_size.height;
} else {
c256_region.origin.x = region->origin.x;
c256_region.origin.y = region->origin.y;
c256_region.size.width = region->size.width;
c256_region.size.height = region->size.height;
//sprintf(msg,"specific region %d %d %d %d", region->origin.x, region->origin.y, region->size.width, region->size.height);
//DEBUG(msg);
}
//sprintf(msg,"txt_c256_set_region: NEW REGION %p x:%d, y:%d, w:%d, h:%d (visible:%d,%d)",
//region, region->origin.x, region->origin.y, region->size.width, region->size.height, c256_visible_size.width, c256_visible_size.height);
//DEBUG(msg);
return 0;
}
/**
* Get the default foreground and background colors for printing
*
* @param pointer to the foreground the Text LUT index of the new current foreground color (0 - 15)
* @param pointer to the background the Text LUT index of the new current background color (0 - 15)
*/
static short txt_c256_get_color(unsigned char * foreground, unsigned char * background) {
*foreground = (c256_color & 0xf0) >> 4;
*background = c256_color & 0x0f;
return 0;
}
/**
* Set the default foreground and background colors for printing
*
* @param foreground the Text LUT index of the new current foreground color (0 - 15)
* @param background the Text LUT index of the new current background color (0 - 15)
*/
static short txt_c256_set_color(unsigned char foreground, unsigned char background) {
c256_color = ((foreground & 0x0f) << 4) + (background & 0x0f);
return 0;
}
/**
* Scroll the text in the current region
*
* @param screen the number of the text device
* @param horizontal the number of columns to scroll (negative is left, positive is right)
* @param vertical the number of rows to scroll (negative is down, positive is up)
*/
static void txt_c256_scroll(short horizontal, short vertical) {
short x, x0, x1, x2, x3, dx;
short y, y0, y1, y2, y3, dy;
/*
* Determine limits of rectangles to move and fill and directions of loops
* x0 and y0 are the positions of the first cell to be over-written
* x1 and y1 are the positions of the first cell to be copied... TEXT[x0,y0] := TEXT[x1,y1]
* x2 and y2 are the position of the last cell to be over-written
* x3 and y3 are the position of the last cell to be copied... TEXT[x2,y2] := TEXT[x3,y3]
*
* When blanking, the rectangles (x2,y0) - (x3,y3) and (x0,y2) - (x2,y3) are cleared
*/
// Determine the row limits
if (vertical >= 0) {
y0 = c256_region.origin.y;
y1 = y0 + vertical;
y3 = c256_region.origin.y + c256_region.size.height;
y2 = y3 - vertical;
dy = 1;
} else {
y0 = c256_region.origin.y + c256_region.size.height - 1;
y1 = y0 + vertical;
y3 = c256_region.origin.y - 1;
y2 = y3 - vertical;
dy = -1;
}
// Determine the column limits
if (horizontal >= 0) {
x0 = c256_region.origin.x;
x1 = x0 + horizontal;
x3 = c256_region.origin.x + c256_region.size.width;
x2 = x3 - horizontal;
dx = 1;
} else {
x0 = c256_region.origin.x + c256_region.size.width - 1;
x1 = x0 + horizontal;
x3 = c256_region.origin.x - 1;
x2 = x3 - horizontal;
dx = -1;
}
/* Copy the rectangle. */
int delta_y = dy * c256_max_size.width;
int row_dst = y0 * c256_max_size.width - delta_y;
int row_src = y0 * c256_max_size.width + vertical * c256_max_size.width - delta_y;
for (y = y0; y != y2; y += dy) {
row_dst += delta_y;
row_src += delta_y;
int offset_dst = row_dst + x0 - dx;
int offset_src = row_src + horizontal + x0 - dx;
for (x = x0; x != x2; x += dx) {
offset_dst += dx;
offset_src += dx;
tvky_text_matrix[offset_dst] = tvky_text_matrix[offset_src];
tvky_color_matrix[offset_dst] = tvky_color_matrix[offset_src];
}
}
/* Clear the rectangles */
if (horizontal != 0) {
row_dst = y0 * c256_max_size.width - delta_y;
for (y = y0; y != y3; y += dy) {
row_dst += delta_y;
for (x = x2; x != x3; x += dx) {
tvky_text_matrix[row_dst + x] = ' ';
tvky_color_matrix[row_dst + x] = c256_color;
}
}
}
if (vertical != 0) {
row_dst = y2 * c256_max_size.width - delta_y;
for (y = y2; y != y3; y += dy) {
row_dst += delta_y;
for (x = x0; x != x3; x += dx) {
tvky_text_matrix[row_dst + x] = ' ';
tvky_color_matrix[row_dst + x] = c256_color;
}
}
}
}
/**
* Fill the current region with a character in the current color
*
* @param screen the number of the text device
* @param c the character to fill the region with
*/
static void txt_c256_fill(char c) {
int x;
int y;
for (y = 0; y < c256_region.size.height; y++) {
int offset_row = (c256_region.origin.y + y) * c256_max_size.width;
for (x = 0; x < c256_region.size.width; x++) {
int offset = offset_row + c256_region.origin.x + x;
tvky_text_matrix[offset] = c;
tvky_color_matrix[offset] = c256_color;
}
}
}
/**
* Set the position of the cursor to (x, y) relative to the current region
* If the (x, y) coordinate is outside the region, it will be clipped to the region.
* If y is greater than the height of the region, the region will scroll until that relative
* position would be within view.
*
* @param x the column for the cursor
* @param y the row for the cursor
*/
static void txt_c256_set_xy(short x, short y) {
/* Make sure X is within range for the current region... "print" a newline if not */
if (x < 0) {
x = 0;
} else if (x >= c256_region.size.width) {
x = 0;
y++;
}
/* Make sure Y is within range for the current region... scroll if not */
if (y < 0) {
y = 0;
} else if (y >= c256_region.size.height) {
txt_c256_scroll(0, y - c256_region.size.height + 1);
y = c256_region.size.height - 1;
}
c256_cursor.x = x;
c256_cursor.y = y;
/* Set register */
tvky_crsr_ctrl->column = c256_region.origin.x + x;
tvky_crsr_ctrl->row = c256_region.origin.y + y;
}
/**
* Get the position of the cursor (x, y) relative to the current region
*
* @param screen the number of the text device
* @param position pointer to a t_point record to fill out
*/
static void txt_c256_get_xy(p_point position) {
position->x = c256_cursor.x;
position->y = c256_cursor.y;
}
/**
* Print a character to the current cursor position in the current color
*
* @param c the character to print
*/
static void txt_c256_put(char c) {
short x;
short y;
unsigned int offset;
x = c256_region.origin.x + c256_cursor.x;
y = c256_region.origin.y + c256_cursor.y;
offset = y * c256_max_size.width + x;
tvky_text_matrix[offset] = c;
tvky_color_matrix[offset] = c256_color;
txt_c256_set_xy(c256_cursor.x + 1, c256_cursor.y);
}
/**
* Initialize the screen
*/
static void txt_c256_init() {
char buffer[255];
t_rect region;
int i;
DEBUG("txt_c256_init");
c256_resolution.width = 0;
c256_resolution.height = 0;
c256_visible_size.width = 0;
c256_visible_size.height = 0;
c256_font_size.width = 0;
c256_font_size.height = 0;
/* Disable the set_sizes call for now, to avoid computing transcient unnecessary values */
c256_enable_set_sizes = 0;
/* Start with nothing on */
msr_shadow = 0;
/* Define the capabilities */
/* Specify the screen number. We have only one so... */
c256_caps.number = TXT_SCREEN_C256;
/* This screen can be text, bitmap or can be put to sleep */
c256_caps.supported_modes = TXT_MODE_TEXT | TXT_MODE_SPRITE | TXT_MODE_BITMAP | TXT_MODE_TILE | TXT_MODE_SLEEP;
/* Supported resolutions */
c256_caps.resolution_count = sizeof(c256_resolutions) / sizeof(t_extent);
c256_caps.resolutions = c256_resolutions;
/* Only 8x8 on the U */
c256_caps.font_size_count = sizeof(c256_fonts) / sizeof(t_extent);
c256_caps.font_sizes = c256_fonts;
/* Initialize the color lookup tables */
for (i = 0; i < sizeof(c256_clut)/sizeof(t_color4); i++) {
tvky_text_fg_color[i] = c256_clut[i];
tvky_text_bg_color[i] = c256_clut[i];
}
/* Set the mode to text */
txt_c256_set_mode(TXT_MODE_TEXT);
/* Set the resolution */
txt_c256_set_resolution(640, 480);
/* Set the default color: light grey on blue */
txt_c256_set_color(0x07, 0x04);
/* Set the font */
txt_c256_set_font(8, 8, MSX_CP437_8x8_bin); /* Use 8x8 font */
/* Set the cursor */
txt_c256_set_cursor(1, 0, 0xB1);
/* Set the border */
txt_c256_set_border(0, 0); /* Set up the border */
txt_c256_set_border_color(0, 0, 0x3f);
/*
* Enable set_sizes, now that everything is set up initially
* And calculate the size of the screen
*/
c256_enable_set_sizes = 1;
txt_c256_set_sizes();
/* Set region to default */
region.origin.x = 0;
region.origin.y = 0;
region.size.width = 0;
region.size.height = 0;
txt_c256_set_region(&region);
/* Home the cursor */
txt_c256_set_xy(0, 0);
/* Clear the screen */
txt_c256_fill(' ');
}
/**
* Initialize and install the driver
*
* @return 0 on success, any other number is an error
*/
short txt_c256_install() {
t_txt_device device;
device.number = TXT_SCREEN_C256;
device.name = "SCREEN";
device.init = txt_c256_init;
device.get_capabilities = txt_c256_get_capabilities;
device.set_mode = txt_c256_set_mode;
device.set_sizes = txt_c256_set_sizes;
device.set_resolution = txt_c256_set_resolution;
device.set_border = txt_c256_set_border;
device.set_border_color = txt_c256_set_border_color;
device.set_font = txt_c256_set_font;
device.set_cursor = txt_c256_set_cursor;
device.set_cursor_visible = txt_c256_set_cursor_visible;
device.get_region = txt_c256_get_region;
device.set_region = txt_c256_set_region;
device.get_color = txt_c256_get_color;
device.set_color = txt_c256_set_color;
device.set_xy = txt_c256_set_xy;
device.get_xy = txt_c256_get_xy;
device.put = txt_c256_put;
device.scroll = txt_c256_scroll;
device.fill = txt_c256_fill;
device.get_sizes = txt_c256_get_sizes;
return txt_register(&device);
}

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/** @file txt_c2560.h
*
* Text screen driver for the C256
*/
#ifndef __TXT_C256_H
#define __TXT_C256_H
/* We only have one screen */
#define TXT_SCREEN_C256 0
/**
* Initialize and install the driver
*
* @return 0 on success, any other number is an error
*/
extern short txt_c256_install();
#endif

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/**
* @file txt_evid.c
* @brief Low level FoenixMCP driver for the C200 EVID expansion card for the C256 computers
* @version 0.1
* @date 2023-08-09
*
*/
#include <stdlib.h>
#include <stdint.h>
#include "log.h"
#include "C256/exp_c256.h"
#include "C256/vicky_ii.h"
#include "dev/txt_evid.h"
#include "dev/txt_screen.h"
#define evid_font_set ((volatile __attribute__((far)) uint8_t *)0xae1000)
#define evid_fg_clut ((volatile __attribute__((far)) t_color4 *)0xae1b00)
#define evid_bg_clut ((volatile __attribute__((far)) t_color4 *)0xae1b40)
#define evid_mstr_ctrl ((volatile __attribute__((far)) uint16_t *)0xae1e00)
#define EVID_MCR_TEXT 0x0001
#define EVID_MCR_RES_800x600 0x0100
#define evid_brdr_ctrl ((volatile __attribute__((far)) uint8_t *)0xae1e04)
#define evid_brdr_color ((volatile __attribute__((far)) t_color4 *)0xae1e05)
#define evid_brdr_size_x ((volatile __attribute__((far)) uint16_t *)0xae1e08)
#define evid_brdr_size_y ((volatile __attribute__((far)) uint16_t *)0xae1e09)
#define evid_crsr_ctrl ((volatile __attribute__((far)) uint8_t *)0xae1e10)
#define evid_crsr_char ((volatile __attribute__((far)) uint8_t *)0xae1e12)
#define evid_crsr_color ((volatile __attribute__((far)) uint8_t *)0xae1e13)
#define evid_crsr_column ((volatile __attribute__((far)) uint16_t *)0xae1e14)
#define evid_crsr_row ((volatile __attribute__((far)) uint16_t *)0xae1e16)
#define evid_text_matrix ((volatile __attribute__((far)) uint8_t *)0xae2000)
#define evid_color_matrix ((volatile __attribute__((far)) uint8_t *)0xae4000)
extern const unsigned char MSX_CP437_8x8_bin[];
const t_color4 evid_clut[] = {
{0, 0, 0}, // 0: Black
{0, 0, 128}, // 1: Red
{0, 128, 0}, // 2: Green
{0, 128, 128}, // 3: Yellow
{128, 0, 0}, // 4: Blue
{128, 0, 128}, // 5: Magenta
{128, 128, 0}, // 6: Cyan
{192, 192, 192}, // 7: White
{128, 128, 128}, // 8: Bright Gray
{0, 0, 255}, // 9: Bright Red
{0, 255, 0}, // A: Bright Green
{0, 255, 255}, // B: Bright Yellow
{255, 0, 0}, // C: Bright Blue
{255, 0, 255}, // D: Bright Magenta
{255, 255, 0}, // E: Bright Cyan
{255, 255, 255} // F: Bright White
};
/*
* Driver level variables for the screen
*/
unsigned char evid_enable_set_sizes; /* Flag to enable set_sizes to actually do its computation */
t_txt_capabilities evid_caps; /* The capabilities of the EVID */
t_extent evid_resolutions[] = { /* The list of display resolutions */
{ 800, 600 },
{ 640, 480 }
};
t_extent evid_fonts[] = { /* The list of supported font resolutions */
{ 8, 8 }
};
t_rect evid_region; /* The current region */
t_point evid_cursor; /* The current cursor position */
t_extent evid_resolution; /* The current display resolution */
t_extent evid_font_size; /* The current font size */
t_extent evid_max_size; /* The size of the screen in characters (without border removed) */
t_extent evid_visible_size; /* The size of the visible screen in characters (with border removed) */
short evid_border_width; /* Width of the border on one side */
short evid_border_height; /* Height of the border on one side */
unsigned char evid_color; /* The current color */
unsigned long evid_msr_shadow; /* A shadow register for the Master Control Register */
/**
* @brief Return TRUE if the C200 EVID card is present
*
* @return short 0 if not present, any other value means the card is present
*/
short txt_evid_present() {
if ((EXP_CARD_INFO->vendor_id == EXP_VENDOR_FOENIX) && (EXP_CARD_INFO->card_id == EXP_CARD_C200_EVID)) {
return 1;
} else {
return 0;
}
}
/**
* Gets the description of a screen's capabilities
*
* @return a pointer to the read-only description (0 on error)
*/
const p_txt_capabilities txt_evid_get_capabilities() {
return &evid_caps;
}
/**
* Calculate the size of the text screen in rows and columns so that
* the kernel printing routines can work correctly.
*
* NOTE: this should be called whenever the VKY3 registers are changed
*/
static void txt_evid_set_sizes() {
TRACE("txt_evid_set_sizes");
if (evid_enable_set_sizes) {
/* Only recalculate after initialization is mostly completed */
/*
* Calculate the maximum number of characters visible on the screen
* This controls text layout in memory
*/
evid_max_size.width = evid_resolution.width / evid_font_size.width;
evid_max_size.height = evid_resolution.height / evid_font_size.height;
/*
* Calculate the characters that are visible in whole or in part
*/
if ((evid_border_width != 0) && (evid_border_height != 0)) {
short border_width = (2 * evid_border_width) / evid_font_size.width;
short border_height = (2 * evid_border_height) / evid_font_size.height;
evid_visible_size.width = evid_max_size.width - border_width;
evid_visible_size.height = evid_max_size.height - border_height;
} else {
evid_visible_size.width = evid_max_size.width;
evid_visible_size.height = evid_max_size.height;
}
DEBUG4("txt_evid_set_sizes max:%d,%d, visible:%d,%d", evid_max_size.width, evid_max_size.height, evid_visible_size.width, evid_visible_size.height);
}
}
/**
* Get the display resolutions
*
* @param text_size the size of the screen in visible characters (may be null)
* @param pixel_size the size of the screen in pixels (may be null)
*/
static void txt_evid_get_sizes(p_extent text_size, p_extent pixel_size) {
if (text_size) {
text_size->width = evid_visible_size.width;
text_size->height = evid_visible_size.height;
}
if (pixel_size) {
pixel_size->width = evid_resolution.width;
pixel_size->height = evid_resolution.height;
}
}
/**
* Set the display mode for the screen
*
* @param mode a bitfield of desired display mode options
*
* @return 0 on success, any other number means the mode is invalid for the screen
*/
static short txt_evid_set_mode(short mode) {
/* Turn off anything not set */
evid_msr_shadow &= ~(TXT_MODE_TEXT);
if (mode & TXT_MODE_TEXT) {
/* Put on text mode */
evid_msr_shadow |= EVID_MCR_TEXT;
*evid_mstr_ctrl = evid_msr_shadow;
return 0;
} else {
/* Unsupported mode */
return -1;
}
}
/**
* Set the display resolution of the screen
*
* @param width the desired horizontal resolution in pixels
* @param height the desired veritical resolution in pixels
*
* @return 0 on success, any other number means the resolution is unsupported
*/
static short txt_evid_set_resolution(short width, short height) {
// TODO: If no size specified, set it based on the DIP switch
/* Turn off resolution bits */
/* TODO: there gotta be a better way to do that */
evid_msr_shadow &= ~(EVID_MCR_RES_800x600);
if ((width == 800) && (height == 600)) {
evid_msr_shadow |= EVID_MCR_RES_800x600;
evid_resolution.width = width;
evid_resolution.height = height;
// Recalculate the size of the screen
txt_evid_set_sizes();
*evid_mstr_ctrl = evid_msr_shadow;
return 0;
} else if ((width == 640) && (height == 480)) {
evid_resolution.width = width;
evid_resolution.height = height;
// Recalculate the size of the screen
txt_evid_set_sizes();
*evid_mstr_ctrl = evid_msr_shadow;
return 0;
}
else {
/* Unsupported resolution */
return -1;
}
}
/**
* Set the size of the border of the screen (if supported)
*
* @param width the horizontal size of one side of the border (0 - 32 pixels)
* @param height the vertical size of one side of the border (0 - 32 pixels)
*/
static void txt_evid_set_border(short width, short height) {
if ((width > 0) || (height > 0)) {
evid_border_width = width;
evid_border_height = height;
*evid_brdr_ctrl = 0x01;
*evid_brdr_size_x = width;
*evid_brdr_size_y = height;
} else {
*evid_brdr_ctrl = 0;
*evid_brdr_size_x = 0;
*evid_brdr_size_y = 0;
}
// Recalculate the size of the screen
txt_evid_set_sizes();
}
/**
* Set the size of the border of the screen (if supported)
*
* @param red the red component of the color (0 - 255)
* @param green the green component of the color (0 - 255)
* @param blue the blue component of the color (0 - 255)
*/
static void txt_evid_set_border_color(unsigned char red, unsigned char green, unsigned char blue) {
evid_brdr_color->red = red;
evid_brdr_color->green = green;
evid_brdr_color->blue = blue;
}
/**
* Load a font as the current font for the screen
*
* @param width width of a character in pixels
* @param height of a character in pixels
* @param data pointer to the raw font data to be loaded
*/
static short txt_evid_set_font(short width, short height, const unsigned char * data) {
if (width == 8 && height == 8) {
int i;
/* The size is valid... set the font */
evid_font_size.width = width;
evid_font_size.height = height;
/* Copy the font data... this assumes a width of one byte! */
/* TODO: generalize this for all possible font sizes */
for (i = 0; i < 256 * height; i++) {
evid_font_set[i] = data[i];
}
// Recalculate the size of the screen
txt_evid_set_sizes();
return 0;
} else {
return -1;
}
}
/**
* Set the appearance of the cursor
*
* @param enable 0 to hide, any other number to make visible
* @param rate the blink rate for the cursor (0=1s, 1=0.5s, 2=0.25s, 3=1/5s)
* @param c the character in the current font to use as a cursor
*/
static void txt_evid_set_cursor(short enable, short rate, char c) {
*evid_crsr_ctrl = ((rate & 0x03) << 1) | ((enable) ? 1 : 0);
*evid_crsr_char = c;
}
/**
* Set if the cursor is visible or not
*
* @param enable 0 to hide, any other number to make visible
*/
static void txt_evid_set_cursor_visible(short enable) {
if (enable) {
*evid_crsr_ctrl|= 0x01;
} else {
*evid_crsr_ctrl &= ~0x01;
}
}
/**
* get the current region
*
* @param region pointer to a t_rect describing the rectangular region (using character cells for size and size)
*
* @return 0 on success, any other number means the region was invalid
*/
static short txt_evid_get_region(p_rect region) {
region->origin.x = evid_region.origin.x;
region->origin.y = evid_region.origin.y;
region->size.width = evid_region.size.width;
region->size.height = evid_region.size.height;
// {
// char msg[80];
// sprintf(msg,"txt_evid_get_region %p: x:%d, y:%d, w:%d, h:%d", region, region->origin.x, region->origin.y, region->size.width, region->size.height);
// DEBUG(msg);
// }
return 0;
}
/**
* Set a region to restrict further character display, scrolling, etc.
* Note that a region of zero size will reset the region to the full size of the screen.
*
* @param region pointer to a t_rect describing the rectangular region (using character cells for size and size)
*
* @return 0 on success, any other number means the region was invalid
*/
static short txt_evid_set_region(const p_rect region) {
// char msg[80];
// sprintf(msg,"SET REGION %p x:%d, y:%d, w:%d, h:%d (visible:%d,%d)",
// region, region->origin.x, region->origin.y, region->size.width, region->size.height, evid_visible_size.width, evid_visible_size.height);
// DEBUG(msg);
if ((region->size.width == 0) || (region->size.height == 0)) {
/* Set the region to the default (full screen) */
evid_region.origin.x = 0;
evid_region.origin.y = 0;
evid_region.size.width = evid_visible_size.width;
evid_region.size.height = evid_visible_size.height;
} else {
evid_region.origin.x = region->origin.x;
evid_region.origin.y = region->origin.y;
evid_region.size.width = region->size.width;
evid_region.size.height = region->size.height;
//sprintf(msg,"specific region %d %d %d %d", region->origin.x, region->origin.y, region->size.width, region->size.height);
//DEBUG(msg);
}
//sprintf(msg,"txt_evid_set_region: NEW REGION %p x:%d, y:%d, w:%d, h:%d (visible:%d,%d)",
//region, region->origin.x, region->origin.y, region->size.width, region->size.height, evid_visible_size.width, evid_visible_size.height);
//DEBUG(msg);
return 0;
}
/**
* Get the default foreground and background colors for printing
*
* @param pointer to the foreground the Text LUT index of the new current foreground color (0 - 15)
* @param pointer to the background the Text LUT index of the new current background color (0 - 15)
*/
static short txt_evid_get_color(unsigned char * foreground, unsigned char * background) {
*foreground = (evid_color & 0xf0) >> 4;
*background = evid_color & 0x0f;
return 0;
}
/**
* Set the default foreground and background colors for printing
*
* @param foreground the Text LUT index of the new current foreground color (0 - 15)
* @param background the Text LUT index of the new current background color (0 - 15)
*/
static short txt_evid_set_color(unsigned char foreground, unsigned char background) {
evid_color = ((foreground & 0x0f) << 4) + (background & 0x0f);
return 0;
}
/**
* Scroll the text in the current region
*
* @param screen the number of the text device
* @param horizontal the number of columns to scroll (negative is left, positive is right)
* @param vertical the number of rows to scroll (negative is down, positive is up)
*/
static void txt_evid_scroll(short horizontal, short vertical) {
short x, x0, x1, x2, x3, dx;
short y, y0, y1, y2, y3, dy;
/*
* Determine limits of rectangles to move and fill and directions of loops
* x0 and y0 are the positions of the first cell to be over-written
* x1 and y1 are the positions of the first cell to be copied... TEXT[x0,y0] := TEXT[x1,y1]
* x2 and y2 are the position of the last cell to be over-written
* x3 and y3 are the position of the last cell to be copied... TEXT[x2,y2] := TEXT[x3,y3]
*
* When blanking, the rectangles (x2,y0) - (x3,y3) and (x0,y2) - (x2,y3) are cleared
*/
// Determine the row limits
if (vertical >= 0) {
y0 = evid_region.origin.y;
y1 = y0 + vertical;
y3 = evid_region.origin.y + evid_region.size.height;
y2 = y3 - vertical;
dy = 1;
} else {
y0 = evid_region.origin.y + evid_region.size.height - 1;
y1 = y0 + vertical;
y3 = evid_region.origin.y - 1;
y2 = y3 - vertical;
dy = -1;
}
// Determine the column limits
if (horizontal >= 0) {
x0 = evid_region.origin.x;
x1 = x0 + horizontal;
x3 = evid_region.origin.x + evid_region.size.width;
x2 = x3 - horizontal;
dx = 1;
} else {
x0 = evid_region.origin.x + evid_region.size.width - 1;
x1 = x0 + horizontal;
x3 = evid_region.origin.x - 1;
x2 = x3 - horizontal;
dx = -1;
}
/* Copy the rectangle. */
int delta_y = dy * evid_max_size.width;
int row_dst = y0 * evid_max_size.width - delta_y;
int row_src = y0 * evid_max_size.width + vertical * evid_max_size.width - delta_y;
for (y = y0; y != y2; y += dy) {
row_dst += delta_y;
row_src += delta_y;
int offset_dst = row_dst + x0 - dx;
int offset_src = row_src + horizontal + x0 - dx;
for (x = x0; x != x2; x += dx) {
offset_dst += dx;
offset_src += dx;
evid_text_matrix[offset_dst] = evid_text_matrix[offset_src];
evid_color_matrix[offset_dst] = evid_color_matrix[offset_src];
}
}
/* Clear the rectangles */
if (horizontal != 0) {
row_dst = y0 * evid_max_size.width - delta_y;
for (y = y0; y != y3; y += dy) {
row_dst += delta_y;
for (x = x2; x != x3; x += dx) {
evid_text_matrix[row_dst + x] = ' ';
evid_color_matrix[row_dst + x] = evid_color;
}
}
}
if (vertical != 0) {
row_dst = y2 * evid_max_size.width - delta_y;
for (y = y2; y != y3; y += dy) {
row_dst += delta_y;
for (x = x0; x != x3; x += dx) {
evid_text_matrix[row_dst + x] = ' ';
evid_color_matrix[row_dst + x] = evid_color;
}
}
}
}
/**
* Fill the current region with a character in the current color
*
* @param screen the number of the text device
* @param c the character to fill the region with
*/
static void txt_evid_fill(char c) {
int x;
int y;
for (y = 0; y < evid_region.size.height; y++) {
int offset_row = (evid_region.origin.y + y) * evid_max_size.width;
for (x = 0; x < evid_region.size.width; x++) {
int offset = offset_row + evid_region.origin.x + x;
evid_text_matrix[offset] = c;
evid_color_matrix[offset] = evid_color;
}
}
}
/**
* Set the position of the cursor to (x, y) relative to the current region
* If the (x, y) coordinate is outside the region, it will be clipped to the region.
* If y is greater than the height of the region, the region will scroll until that relative
* position would be within view.
*
* @param x the column for the cursor
* @param y the row for the cursor
*/
static void txt_evid_set_xy(short x, short y) {
/* Make sure X is within range for the current region... "print" a newline if not */
if (x < 0) {
x = 0;
} else if (x >= evid_region.size.width) {
x = 0;
y++;
}
/* Make sure Y is within range for the current region... scroll if not */
if (y < 0) {
y = 0;
} else if (y >= evid_region.size.height) {
txt_evid_scroll(0, y - evid_region.size.height + 1);
y = evid_region.size.height - 1;
}
evid_cursor.x = x;
evid_cursor.y = y;
/* Set register */
*evid_crsr_column = evid_region.origin.x + x;
*evid_crsr_row = evid_region.origin.y + y;
}
/**
* Get the position of the cursor (x, y) relative to the current region
*
* @param screen the number of the text device
* @param position pointer to a t_point record to fill out
*/
static void txt_evid_get_xy(p_point position) {
position->x = evid_cursor.x;
position->y = evid_cursor.y;
}
/**
* Print a character to the current cursor position in the current color
*
* @param c the character to print
*/
static void txt_evid_put(char c) {
short x;
short y;
unsigned int offset;
x = evid_region.origin.x + evid_cursor.x;
y = evid_region.origin.y + evid_cursor.y;
offset = y * evid_max_size.width + x;
evid_text_matrix[offset] = c;
evid_color_matrix[offset] = evid_color;
txt_evid_set_xy(evid_cursor.x + 1, evid_cursor.y);
}
/**
* Initialize the screen
*/
static void txt_evid_init() {
char buffer[255];
t_rect region;
int i;
DEBUG("txt_evid_init");
evid_resolution.width = 0;
evid_resolution.height = 0;
evid_visible_size.width = 0;
evid_visible_size.height = 0;
evid_font_size.width = 0;
evid_font_size.height = 0;
/* Disable the set_sizes call for now, to avoid computing transcient unnecessary values */
evid_enable_set_sizes = 0;
/* Start with nothing on */
evid_msr_shadow = 0;
/* Define the capabilities */
/* Specify the screen number. We have only one so... */
evid_caps.number = TXT_SCREEN_EVID;
/* This screen can be text, bitmap or can be put to sleep */
evid_caps.supported_modes = TXT_MODE_TEXT;
/* Supported resolutions */
evid_caps.resolution_count = sizeof(evid_resolutions) / sizeof(t_extent);
evid_caps.resolutions = evid_resolutions;
/* Only 8x8 on the U */
evid_caps.font_size_count = sizeof(evid_fonts) / sizeof(t_extent);
evid_caps.font_sizes = evid_fonts;
/* Initialize the color lookup tables */
for (i = 0; i < sizeof(evid_clut)/sizeof(t_color4); i++) {
evid_fg_clut[i] = evid_clut[i];
evid_bg_clut[i] = evid_clut[i];
}
/* Set the mode to text */
txt_evid_set_mode(TXT_MODE_TEXT);
/* Set the resolution */
txt_evid_set_resolution(640, 480);
/* Set the default color: light grey on blue */
txt_evid_set_color(0x07, 0x04);
/* Set the font */
txt_evid_set_font(8, 8, MSX_CP437_8x8_bin); /* Use 8x8 font */
/* Set the cursor */
txt_evid_set_cursor(1, 0, 0xB1);
/* Set the border */
txt_evid_set_border(16, 16); /* Set up the border */
txt_evid_set_border_color(0, 0, 0x3f);
/*
* Enable set_sizes, now that everything is set up initially
* And calculate the size of the screen
*/
evid_enable_set_sizes = 1;
txt_evid_set_sizes();
/* Set region to default */
region.origin.x = 0;
region.origin.y = 0;
region.size.width = 0;
region.size.height = 0;
txt_evid_set_region(&region);
/* Home the cursor */
txt_evid_set_xy(0, 0);
/* Clear the screen */
txt_evid_fill(' ');
}
t_txt_device device;
/**
* Initialize and install the driver
*
* @return 0 on success, any other number is an error
*/
short txt_evid_install() {
if (txt_evid_present()) {
// Only register the EVID driver if the EVID is installed
device.number = TXT_SCREEN_EVID;
device.name = "EVID";
device.init = txt_evid_init;
device.get_capabilities = txt_evid_get_capabilities;
device.set_mode = txt_evid_set_mode;
device.set_sizes = txt_evid_set_sizes;
device.set_resolution = txt_evid_set_resolution;
device.set_border = txt_evid_set_border;
device.set_border_color = txt_evid_set_border_color;
device.set_font = txt_evid_set_font;
device.set_cursor = txt_evid_set_cursor;
device.set_cursor_visible = txt_evid_set_cursor_visible;
device.get_region = txt_evid_get_region;
device.set_region = txt_evid_set_region;
device.get_color = txt_evid_get_color;
device.set_color = txt_evid_set_color;
device.set_xy = txt_evid_set_xy;
device.get_xy = txt_evid_get_xy;
device.put = txt_evid_put;
device.scroll = txt_evid_scroll;
device.fill = txt_evid_fill;
device.get_sizes = txt_evid_get_sizes;
return txt_register(&device);
} else {
// Return an error if the EVID is not present
return -1;
}
}

22
src/dev/txt_evid.h Normal file
View file

@ -0,0 +1,22 @@
/**
* @file txt_evid.c
* @brief Low level FoenixMCP driver for the C200 EVID expansion card for the C256 computers
* @version 0.1
* @date 2023-08-09
*
*/
#ifndef __txt_evid_h__
#define __txt_evid_h__
/* If installed, the EVID is the second screen on the C256. */
#define TXT_SCREEN_EVID 1
/**
* Initialize and install the driver
*
* @return 0 on success, any other number is an error
*/
extern short txt_evid_install();
#endif

26
src/dev/uart.c
View file

@ -211,7 +211,7 @@ short uart_status(p_channel chan) {
* @param mode an unused parameter
* @return 0 on success, any other number is an error
*/
short uart_open(p_channel chan, const char * spec, short mode) {
short uart_open(p_channel chan, const uint8_t * spec, short mode) {
unsigned short bps = 0, lcr = 0;
char * saveptr;
char spec_copy[80];
@ -297,7 +297,7 @@ short uart_open(p_channel chan, const char * spec, short mode) {
break;
default:
log(LOG_ERROR, "uart_open: Bad data word length");
logmsg(LOG_ERROR, "uart_open: Bad data word length");
return ERR_BAD_ARGUMENT;
}
@ -311,7 +311,7 @@ short uart_open(p_channel chan, const char * spec, short mode) {
} else if (i == 2) {
lcr_code |= LCR_STOPBIT_2;
} else {
log(LOG_ERROR, "uart_open: Bad stop bits");
logmsg(LOG_ERROR, "uart_open: Bad stop bits");
return ERR_BAD_ARGUMENT;
}
@ -330,7 +330,7 @@ short uart_open(p_channel chan, const char * spec, short mode) {
} else if (strcmp(token, "SPACE") == 0) {
lcr_code |= LCR_PARITY_SPACE;
} else {
log(LOG_ERROR, "uart_open: Bad parity");
logmsg(LOG_ERROR, "uart_open: Bad parity");
return ERR_BAD_ARGUMENT;
}
@ -339,19 +339,19 @@ short uart_open(p_channel chan, const char * spec, short mode) {
return 0;
} else {
log(LOG_ERROR, "uart_open: no parity token");
logmsg(LOG_ERROR, "uart_open: no parity token");
return ERR_BAD_ARGUMENT;
}
} else {
log(LOG_ERROR, "uart_open: no stop bit token");
logmsg(LOG_ERROR, "uart_open: no stop bit token");
return ERR_BAD_ARGUMENT;
}
} else {
log(LOG_ERROR, "uart_open: no data length token");
logmsg(LOG_ERROR, "uart_open: no data length token");
return ERR_BAD_ARGUMENT;
}
} else {
log(LOG_ERROR, "uart_open: no BPS token");
logmsg(LOG_ERROR, "uart_open: no BPS token");
return ERR_BAD_ARGUMENT;
}
@ -376,7 +376,7 @@ short uart_read_b(p_channel chan) {
* @param size the size of the buffer.
* @return number of bytes read, any negative number is an error code
*/
short uart_read(p_channel chan, char * buffer, short size) {
short uart_read(p_channel chan, uint8_t * buffer, short size) {
short i = 0, count = 0;
for (i = 0; i < size; i++) {
buffer[i] = uart_get(cdev_to_uart(chan->dev));
@ -394,7 +394,7 @@ short uart_read(p_channel chan, char * buffer, short size) {
* @param size the size of the buffer.
* @returns number of bytes read, any negative number is an error code
*/
short uart_readline(p_channel chan, char * buffer, short size) {
short uart_readline(p_channel chan, uint8_t * buffer, short size) {
short i = 0, count = 0;
for (i = 0; i < size; i++) {
char c = uart_get(cdev_to_uart(chan->dev));
@ -428,7 +428,7 @@ short uart_write_b(p_channel chan, unsigned char c) {
* @param size the size of the buffer.
* @return number of bytes written, any negative number is an error code
*/
short uart_write(p_channel chan, const char * buffer, short size) {
short uart_write(p_channel chan, const uint8_t * buffer, short size) {
int i;
for (i = 0; i < size; i++) {
uart_put(cdev_to_uart(chan->dev), buffer[i]);
@ -460,7 +460,7 @@ short uart_install() {
result = cdev_register(&dev);
if (result) {
if (result != E_OK) {
return result;
}
@ -469,7 +469,5 @@ short uart_install() {
result = cdev_register(&dev);
if (result) {
return result;
}
}

63
src/fatfs/Makefile
View file

@ -1,13 +1,60 @@
csources = $(wildcard *.c)
cobjects = $(subst .c,.o,$(csources))
.PHONY: all
all: $(cobjects)
UNIT := C256U_PLUS
# Define OS-dependent variables
ifeq ($(OS),Windows_NT)
RM = del /F/Q
else
RM = rm -f
endif
# Define model-specific variables, including tools, source files, compiler flags, etc.
ifeq ($(UNIT),C256U)
CPU=w65816
SRCS_FOR_UNIT=
CFLAGS_FOR_UNIT=-DMODEL=1 -DCPU=255 --target Foenix --code-model large --data-model large
LDFLAGS_FOR_UNIT=C256/ld_lc_c256_u.scm clib-lc-ld.a
else ifeq ($(UNIT),C256U_PLUS)
CPU=w65816
SRCS_FOR_UNIT=
CFLAGS_FOR_UNIT=-DMODEL=5 -DCPU=255 --target Foenix --code-model large --data-model large
LDFLAGS_FOR_UNIT=C256/ld_lc_c256_fmx.scm clib-lc-ld.a --rtattr printf=medium
else ifeq ($(UNIT),C256_FMX)
CPU=w65816
SRCS_FOR_UNIT=
CFLAGS_FOR_UNIT=-DMODEL=0 -DCPU=255 --target Foenix --code-model large --data-model large
LDFLAGS_FOR_UNIT=C256/ld_lc_c256_fmx.scm clib-lc-ld.a
endif
ifeq ($(CPU),w65816)
CC=cc65816
AS=as65816
LD=ln65816
AR=nlib
endif
INCLUDES=-I.. -I../include
CFLAGS=$(INCLUDES) $(CFLAGS_FOR_UNIT) -l
ASFLAGS=$(INCLUDES)
SRCS = c256_diskio.c ff.c ffsystem.c ffunicode.c $(SRCS_FOR_UNIT)
OBJS = $(patsubst %.c,%.o,$(SRCS))
OBJS4RM = $(subst /,\\,$(OBJS))
.PHONY: all clean
all: fatfs.a
# Build the devices library file for this model
fatfs.a: $(OBJS)
$(AR) $@ $^
# Build the object files from C
%.o: %.c
$(CC) -c -o $@ $< $(CFLAGS) $(DEFINES)
.PHONY: clean
$(CC) $(CFLAGS) -o $@ $^
# Clean up after a build
clean:
$(RM) $(aobjects) $(cobjects) *.asm
$(RM) $(OBJS4RM) fatfs.a *.lst

4
src/fatfs/c256_diskio.c
View file

@ -78,10 +78,10 @@ DRESULT disk_read (
if (result < 0) {
log_num(LOG_ERROR, "disk_read error: ", result);
if (result == ERR_MEDIA_CHANGE) {
log(LOG_ERROR, "disk changed.");
logmsg(LOG_ERROR, "disk changed.");
return RES_NOTRDY;
} else {
log(LOG_ERROR, "gerneral error");
logmsg(LOG_ERROR, "gerneral error");
return RES_PARERR;
}
} else {

796
src/fatfs/diskio.lst
View file

@ -1,796 +0,0 @@
Thu May 20 2021 21:34 Page 1
***************************************
** WDC 65C816 Macro Assembler **
** **
** Version 3.49.1- Feb 6 2006 **
***************************************
1 ;:ts=8
2 00000001 R0 equ 1
3 00000005 R1 equ 5
4 00000009 R2 equ 9
5 0000000D R3 equ 13
6 ;/*-----------------------------------------------
------------------------*/
7 ;/* Low level disk I/O module SKELETON for FatFs
(C)ChaN, 2019 */
8 ;/*-----------------------------------------------
------------------------*/
9 ;/* If a working storage control module is availab
le, it should be */
10 ;/* attached to the FatFs via a glue function rath
er than modifying it. */
11 ;/* This is an example of glue functions to attach
various exsisting */
12 ;/* storage control modules to the FatFs module wi
th a defined API. */
13 ;/*-----------------------------------------------
------------------------*/
14 ;
15 ;#include "ff.h" /* Obtains integ
er types */
16 ;#include "diskio.h" /* Declarations
of disk functions */
17 ;
18 ;/* Definitions of physical drive number for each
drive */
19 ;#define DEV_SDC 0 /* Example: Map
Ramdisk to physical drive 0 */
20 ;
21 ;
22 ;/*-----------------------------------------------
------------------------*/
23 ;/* Get Drive Status
*/
24 ;/*-----------------------------------------------
------------------------*/
25 ;
26 ;DSTATUS disk_status (
27 ; BYTE pdrv /* Physical drive nmuber
to identify the drive */
28 ;)
29 ;{
30 code
31 xdef ~~disk_status
32 func
33 ~~disk_status:
34 longa on
35 longi on
36 00:0000: 3B tsc
Thu May 20 2021 21:34 Page 2
37 00:0001: 38 sec
38 00:0002: E9 03 00 sbc #L2
39 00:0005: 1B tcs
40 00:0006: 0B phd
41 00:0007: 5B tcd
42 00000004 pdrv_0 set 4
43 ; DSTATUS stat;
44 ; int result;
45 ;
46 ; k_prints("disk_status\r");
47 00000000 stat_1 set 0
48 00000001 result_1 set 1
49 00:0008: F4 xx xx pea #^L1
50 00:000B: F4 xx xx pea #<L1
51 00:000E: 22 xx xx xx jsl ~~k_prints
52 ;
53 ; switch (pdrv) {
54 00:0012: A5 07 lda <L2+pdrv_0
55 00:0014: 29 FF 00 and #$ff
56 00:0017: 82 15 00 brl L10001
57 ; case DEV_SDC:
58 L10003:
59 ;
60 ; // translate the reslut code here
61 ;
62 ; return 0;
63 00:001A: A9 00 00 lda #$0
64 L4:
65 00:001D: A8 tay
66 00:001E: A5 05 lda <L2+2
67 00:0020: 85 07 sta <L2+2+2
68 00:0022: A5 04 lda <L2+1
69 00:0024: 85 06 sta <L2+1+2
70 00:0026: 2B pld
71 00:0027: 3B tsc
72 00:0028: 18 clc
73 00:0029: 69 05 00 adc #L2+2
74 00:002C: 1B tcs
75 00:002D: 98 tya
76 00:002E: 6B rtl
77 ;
78 ; }
79 L10001:
80 xref ~~~swt
81 00:002F: 22 xx xx xx jsl ~~~swt
82 00:0033: 01 00 dw 1
83 00:0035: 00 00 dw 0
84 00:0037: xx xx dw L10003-1
85 00:0039: xx xx dw L10002-1
86 L10002:
87 ; return STA_NOINIT;
88 00:003B: A9 01 00 lda #$1
89 00:003E: 82 DC FF brl L4
90 ;}
91 00000003 L2 equ 3
92 00000001 L3 equ 1
93 ends
94 efunc
Thu May 20 2021 21:34 Page 3
95 data
96 L1:
97 00:0000: 64 69 73 6B db $64,$69,$73,$6B,$5F,$73,$74,$61,$74,$75,
$73,$0D,$00
00:0004: 5F 73 74 61
00:0008: 74 75 73 0D
00:000C: 00
98 00:000D: ends
99 ;
100 ;
101 ;
102 ;/*-----------------------------------------------
------------------------*/
103 ;/* Inidialize a Drive
*/
104 ;/*-----------------------------------------------
------------------------*/
105 ;
106 ;DSTATUS disk_initialize (
107 ; BYTE pdrv /* Physi
cal drive nmuber to identify the drive */
108 ;)
109 ;{
110 code
111 xdef ~~disk_initialize
112 func
113 ~~disk_initialize:
114 longa on
115 longi on
116 00:0041: 3B tsc
117 00:0042: 38 sec
118 00:0043: E9 03 00 sbc #L6
119 00:0046: 1B tcs
120 00:0047: 0B phd
121 00:0048: 5B tcd
122 00000004 pdrv_0 set 4
123 ; DSTATUS stat;
124 ; int result;
125 ;
126 ; k_prints("disk_initialize\r");
127 00000000 stat_1 set 0
128 00000001 result_1 set 1
129 00:0049: F4 xx xx pea #^L5
130 00:004C: F4 xx xx pea #<L5
131 00:004F: 22 xx xx xx jsl ~~k_prints
132 ;
133 ; switch (pdrv) {
134 00:0053: A5 07 lda <L6+pdrv_0
135 00:0055: 29 FF 00 and #$ff
136 00:0058: 82 28 00 brl L10004
137 ; case DEV_SDC :
138 L10006:
139 ; if (bios_mount(2)) {
140 00:005B: F4 02 00 pea #<$2
141 00:005E: 22 xx xx xx jsl ~~bios_mount
142 00:0062: AA tax
143 00:0063: D0 03 bne L8
144 00:0065: 82 15 00 brl L10007
Thu May 20 2021 21:34 Page 4
145 L8:
146 ; return STA_NOINIT;
147 00:0068: A9 01 00 lda #$1
148 L9:
149 00:006B: A8 tay
150 00:006C: A5 05 lda <L6+2
151 00:006E: 85 07 sta <L6+2+2
152 00:0070: A5 04 lda <L6+1
153 00:0072: 85 06 sta <L6+1+2
154 00:0074: 2B pld
155 00:0075: 3B tsc
156 00:0076: 18 clc
157 00:0077: 69 05 00 adc #L6+2
158 00:007A: 1B tcs
159 00:007B: 98 tya
160 00:007C: 6B rtl
161 ; } else {
162 L10007:
163 ; return 0;
164 00:007D: A9 00 00 lda #$0
165 00:0080: 82 E8 FF brl L9
166 ; }
167 ; }
168 L10004:
169 xref ~~~swt
170 00:0083: 22 xx xx xx jsl ~~~swt
171 00:0087: 01 00 dw 1
172 00:0089: 00 00 dw 0
173 00:008B: xx xx dw L10006-1
174 00:008D: xx xx dw L10005-1
175 L10005:
176 ; return STA_NOINIT;
177 00:008F: A9 01 00 lda #$1
178 00:0092: 82 D6 FF brl L9
179 ;}
180 00000003 L6 equ 3
181 00000001 L7 equ 1
182 ends
183 efunc
184 data
185 L5:
186 00:000D: 64 69 73 6B db $64,$69,$73,$6B,$5F,$69,$6E,$69,$74,$69,
$61,$6C,$69,$7A,$65
00:0011: 5F 69 6E 69
00:0015: 74 69 61 6C
00:0019: 69 7A 65
187 00:001C: 0D 00 db $0D,$00
188 00:001E: ends
189 ;
190 ;
191 ;
192 ;/*-----------------------------------------------
------------------------*/
193 ;/* Read Sector(s)
*/
194 ;/*-----------------------------------------------
------------------------*/
195 ;
Thu May 20 2021 21:34 Page 5
196 ;DRESULT disk_read (
197 ; BYTE pdrv, /* Physical drive nmuber
to identify the drive */
198 ; BYTE *buff, /* Data buffer to store
read data */
199 ; LBA_t sector, /* Start sector in LBA */
200 ; UINT count /* Number of sectors to
read */
201 ;)
202 ;{
203 code
204 xdef ~~disk_read
205 func
206 ~~disk_read:
207 longa on
208 longi on
209 00:0095: 3B tsc
210 00:0096: 38 sec
211 00:0097: E9 04 00 sbc #L11
212 00:009A: 1B tcs
213 00:009B: 0B phd
214 00:009C: 5B tcd
215 00000004 pdrv_0 set 4
216 00000006 buff_0 set 6
217 0000000A sector_0 set 10
218 0000000E count_0 set 14
219 ; DRESULT res;
220 ; int result;
221 ;
222 ; k_prints("disk_read\r");
223 00000000 res_1 set 0
224 00000002 result_1 set 2
225 00:009D: F4 xx xx pea #^L10
226 00:00A0: F4 xx xx pea #<L10
227 00:00A3: 22 xx xx xx jsl ~~k_prints
228 ;
229 ; switch (pdrv) {
230 00:00A7: A5 08 lda <L11+pdrv_0
231 00:00A9: 29 FF 00 and #$ff
232 00:00AC: 82 21 00 brl L10008
233 ; case DEV_SDC:
234 L10010:
235 ; // translate the arguments here
236 ;
237 ; return bios_getblock(2, sector, buff);
238 00:00AF: D4 0C pei <L11+buff_0+2
239 00:00B1: D4 0A pei <L11+buff_0
240 00:00B3: D4 10 pei <L11+sector_0+2
241 00:00B5: D4 0E pei <L11+sector_0
242 00:00B7: F4 02 00 pea #<$2
243 00:00BA: 22 xx xx xx jsl ~~bios_getblock
244 L13:
245 00:00BE: A8 tay
246 00:00BF: A5 06 lda <L11+2
247 00:00C1: 85 12 sta <L11+2+12
248 00:00C3: A5 05 lda <L11+1
249 00:00C5: 85 11 sta <L11+1+12
250 00:00C7: 2B pld
Thu May 20 2021 21:34 Page 6
251 00:00C8: 3B tsc
252 00:00C9: 18 clc
253 00:00CA: 69 10 00 adc #L11+12
254 00:00CD: 1B tcs
255 00:00CE: 98 tya
256 00:00CF: 6B rtl
257 ; }
258 L10008:
259 xref ~~~swt
260 00:00D0: 22 xx xx xx jsl ~~~swt
261 00:00D4: 01 00 dw 1
262 00:00D6: 00 00 dw 0
263 00:00D8: xx xx dw L10010-1
264 00:00DA: xx xx dw L10009-1
265 L10009:
266 ;
267 ; return RES_PARERR;
268 00:00DC: A9 04 00 lda #$4
269 00:00DF: 82 DC FF brl L13
270 ;}
271 00000004 L11 equ 4
272 00000001 L12 equ 1
273 ends
274 efunc
275 data
276 L10:
277 00:001E: 64 69 73 6B db $64,$69,$73,$6B,$5F,$72,$65,$61,$64,$0D,
$00
00:0022: 5F 72 65 61
00:0026: 64 0D 00
278 00:0029: ends
279 ;
280 ;
281 ;
282 ;/*-----------------------------------------------
------------------------*/
283 ;/* Write Sector(s)
*/
284 ;/*-----------------------------------------------
------------------------*/
285 ;
286 ;#if FF_FS_READONLY == 0
287 ;
288 ;DRESULT disk_write (
289 ; BYTE pdrv, /* Physical driv
e nmuber to identify the drive */
290 ; const BYTE *buff, /* Data to be written */
291 ; LBA_t sector, /* Start sector in LBA *
/
292 ; UINT count /* Number of sec
tors to write */
293 ;)
294 ;{
295 code
296 xdef ~~disk_write
297 func
298 ~~disk_write:
299 longa on
Thu May 20 2021 21:34 Page 7
300 longi on
301 00:00E2: 3B tsc
302 00:00E3: 38 sec
303 00:00E4: E9 04 00 sbc #L15
304 00:00E7: 1B tcs
305 00:00E8: 0B phd
306 00:00E9: 5B tcd
307 00000004 pdrv_0 set 4
308 00000006 buff_0 set 6
309 0000000A sector_0 set 10
310 0000000E count_0 set 14
311 ; DRESULT res;
312 ; int result;
313 ;
314 ; k_prints("disk_write\r");
315 00000000 res_1 set 0
316 00000002 result_1 set 2
317 00:00EA: F4 xx xx pea #^L14
318 00:00ED: F4 xx xx pea #<L14
319 00:00F0: 22 xx xx xx jsl ~~k_prints
320 ;
321 ; switch (pdrv) {
322 00:00F4: A5 08 lda <L15+pdrv_0
323 00:00F6: 29 FF 00 and #$ff
324 00:00F9: 82 15 00 brl L10011
325 ; case DEV_SDC:
326 L10013:
327 ; // translate the arguments here
328 ;
329 ;
330 ; // translate the reslut code here
331 ;
332 ; return 0;
333 00:00FC: A9 00 00 lda #$0
334 L17:
335 00:00FF: A8 tay
336 00:0100: A5 06 lda <L15+2
337 00:0102: 85 12 sta <L15+2+12
338 00:0104: A5 05 lda <L15+1
339 00:0106: 85 11 sta <L15+1+12
340 00:0108: 2B pld
341 00:0109: 3B tsc
342 00:010A: 18 clc
343 00:010B: 69 10 00 adc #L15+12
344 00:010E: 1B tcs
345 00:010F: 98 tya
346 00:0110: 6B rtl
347 ; }
348 L10011:
349 xref ~~~swt
350 00:0111: 22 xx xx xx jsl ~~~swt
351 00:0115: 01 00 dw 1
352 00:0117: 00 00 dw 0
353 00:0119: xx xx dw L10013-1
354 00:011B: xx xx dw L10012-1
355 L10012:
356 ;
357 ; return RES_PARERR;
Thu May 20 2021 21:34 Page 8
358 00:011D: A9 04 00 lda #$4
359 00:0120: 82 DC FF brl L17
360 ;}
361 00000004 L15 equ 4
362 00000001 L16 equ 1
363 ends
364 efunc
365 data
366 L14:
367 00:0029: 64 69 73 6B db $64,$69,$73,$6B,$5F,$77,$72,$69,$74,$65,
$0D,$00
00:002D: 5F 77 72 69
00:0031: 74 65 0D 00
368 00:0035: ends
369 ;
370 ;#endif
371 ;
372 ;
373 ;/*-----------------------------------------------
------------------------*/
374 ;/* Miscellaneous Functions
*/
375 ;/*-----------------------------------------------
------------------------*/
376 ;
377 ;DRESULT disk_ioctl (
378 ; BYTE pdrv, /* Physical drive nmuber
(0..) */
379 ; BYTE cmd, /* Control code */
380 ; void *buff /* Buffer to send/receiv
e control data */
381 ;)
382 ;{
383 code
384 xdef ~~disk_ioctl
385 func
386 ~~disk_ioctl:
387 longa on
388 longi on
389 00:0123: 3B tsc
390 00:0124: 38 sec
391 00:0125: E9 04 00 sbc #L19
392 00:0128: 1B tcs
393 00:0129: 0B phd
394 00:012A: 5B tcd
395 00000004 pdrv_0 set 4
396 00000006 cmd_0 set 6
397 00000008 buff_0 set 8
398 ; DRESULT res;
399 ; int result;
400 ;
401 ; k_prints("disk_ioctl\r");
402 00000000 res_1 set 0
403 00000002 result_1 set 2
404 00:012B: F4 xx xx pea #^L18
405 00:012E: F4 xx xx pea #<L18
406 00:0131: 22 xx xx xx jsl ~~k_prints
407 ;
Thu May 20 2021 21:34 Page 9
408 ; switch (pdrv) {
409 00:0135: A5 08 lda <L19+pdrv_0
410 00:0137: 29 FF 00 and #$ff
411 00:013A: 82 15 00 brl L10014
412 ; case DEV_SDC:
413 L10016:
414 ;
415 ; // Process of the command for the RAM dr
ive
416 ;
417 ; return 0;
418 00:013D: A9 00 00 lda #$0
419 L21:
420 00:0140: A8 tay
421 00:0141: A5 06 lda <L19+2
422 00:0143: 85 0E sta <L19+2+8
423 00:0145: A5 05 lda <L19+1
424 00:0147: 85 0D sta <L19+1+8
425 00:0149: 2B pld
426 00:014A: 3B tsc
427 00:014B: 18 clc
428 00:014C: 69 0C 00 adc #L19+8
429 00:014F: 1B tcs
430 00:0150: 98 tya
431 00:0151: 6B rtl
432 ; }
433 L10014:
434 xref ~~~swt
435 00:0152: 22 xx xx xx jsl ~~~swt
436 00:0156: 01 00 dw 1
437 00:0158: 00 00 dw 0
438 00:015A: xx xx dw L10016-1
439 00:015C: xx xx dw L10015-1
440 L10015:
441 ;
442 ; return RES_PARERR;
443 00:015E: A9 04 00 lda #$4
444 00:0161: 82 DC FF brl L21
445 ;}
446 00000004 L19 equ 4
447 00000001 L20 equ 1
448 ends
449 efunc
450 data
451 L18:
452 00:0035: 64 69 73 6B db $64,$69,$73,$6B,$5F,$69,$6F,$63,$74,$6C,
$0D,$00
00:0039: 5F 69 6F 63
00:003D: 74 6C 0D 00
453 00:0041: ends
454 ;
455 ;#define BIOS_STATUS ((volatile char *)0x000320)
456 ;#define BIOS_DEV ((volatile char *)0x000321)
457 ;#define BIOS_LBA ((volatile long *)0x000322)
458 ;#define BIOS_BUFFER ((volatile long *)0x000326)
459 ;
460 ;/**
461 ; * Call the C256 F_MOUNT kernel routine
Thu May 20 2021 21:34 Page 10
462 ; */
463 ;int bios_mount(char dev) {
464 code
465 xdef ~~bios_mount
466 func
467 ~~bios_mount:
468 longa on
469 longi on
470 00:0164: 3B tsc
471 00:0165: 38 sec
472 00:0166: E9 00 00 sbc #L23
473 00:0169: 1B tcs
474 00:016A: 0B phd
475 00:016B: 5B tcd
476 00000004 dev_0 set 4
477 ; asm {
478 ; LDA %%dev
479 ; jsl $001128
480 ; }
481 asmstart
482 00:016C: A5 04 LDA <L23+dev_0
483 00:016E: 22 28 11 00 jsl $001128
484 asmend
485 ;
486 ; if ((*BIOS_STATUS & 0x80) != 0) {
487 00:0172: E2 20 sep #$20
488 longa off
489 00:0174: AF 20 03 00 lda >800 ; volatile
490 00:0178: 29 80 and #<$80
491 00:017A: C2 20 rep #$20
492 longa on
493 00:017C: D0 03 bne L25
494 00:017E: 82 15 00 brl L10017
495 L25:
496 ; return RES_ERROR;
497 00:0181: A9 01 00 lda #$1
498 L26:
499 00:0184: A8 tay
500 00:0185: A5 02 lda <L23+2
501 00:0187: 85 04 sta <L23+2+2
502 00:0189: A5 01 lda <L23+1
503 00:018B: 85 03 sta <L23+1+2
504 00:018D: 2B pld
505 00:018E: 3B tsc
506 00:018F: 18 clc
507 00:0190: 69 02 00 adc #L23+2
508 00:0193: 1B tcs
509 00:0194: 98 tya
510 00:0195: 6B rtl
511 ; } else {
512 L10017:
513 ; return RES_OK;
514 00:0196: A9 00 00 lda #$0
515 00:0199: 82 E8 FF brl L26
516 ; }
517 ;}
518 00000000 L23 equ 0
519 00000001 L24 equ 1
Thu May 20 2021 21:34 Page 11
520 ends
521 efunc
522 ;
523 ;/**
524 ; * Call the C256 GETBLOCK kernel routine
525 ; */
526 ;int bios_getblock(char dev, long lba, char * buff
er) {
527 code
528 xdef ~~bios_getblock
529 func
530 ~~bios_getblock:
531 longa on
532 longi on
533 00:019C: 3B tsc
534 00:019D: 38 sec
535 00:019E: E9 04 00 sbc #L27
536 00:01A1: 1B tcs
537 00:01A2: 0B phd
538 00:01A3: 5B tcd
539 00000004 dev_0 set 4
540 00000006 lba_0 set 6
541 0000000A buffer_0 set 10
542 ; *BIOS_DEV = dev;
543 00:01A4: E2 20 sep #$20
544 longa off
545 00:01A6: A5 08 lda <L27+dev_0
546 00:01A8: 8F 21 03 00 sta >801 ; volatile
547 00:01AC: C2 20 rep #$20
548 longa on
549 ; *BIOS_LBA = lba;
550 00:01AE: A5 0A lda <L27+lba_0
551 00:01B0: 8F 22 03 00 sta >802 ; volatile
552 00:01B4: A5 0C lda <L27+lba_0+2
553 00:01B6: 8F 24 03 00 sta >802+2 ; volatile
554 ; *BIOS_BUFFER = (long)buffer;
555 00:01BA: A5 0E lda <L27+buffer_0
556 00:01BC: 8F 26 03 00 sta >806 ; volatile
557 00:01C0: A5 10 lda <L27+buffer_0+2
558 00:01C2: 8F 28 03 00 sta >806+2 ; volatile
559 ; k_prints("getblock: ");
560 00:01C6: F4 xx xx pea #^L22
561 00:01C9: F4 xx xx pea #<L22
562 00:01CC: 22 xx xx xx jsl ~~k_prints
563 ; k_printh(dev);
564 00:01D0: A5 08 lda <L27+dev_0
565 00:01D2: 29 FF 00 and #$ff
566 00:01D5: 48 pha
567 00:01D6: 22 xx xx xx jsl ~~k_printh
568 ; k_prints(" ");
569 00:01DA: F4 xx xx pea #^L22+11
570 00:01DD: F4 xx xx pea #<L22+11
571 00:01E0: 22 xx xx xx jsl ~~k_prints
572 ; k_printh(lba >> 16);
573 00:01E4: D4 0C pei <L27+lba_0+2
574 00:01E6: D4 0A pei <L27+lba_0
575 00:01E8: A9 10 00 lda #$10
576 xref ~~~lasr
Thu May 20 2021 21:34 Page 12
577 00:01EB: 22 xx xx xx jsl ~~~lasr
578 00:01EF: 85 01 sta <R0
579 00:01F1: 86 03 stx <R0+2
580 00:01F3: D4 03 pei <R0+2
581 00:01F5: D4 01 pei <R0
582 00:01F7: 22 xx xx xx jsl ~~k_printh
583 ; k_printh(lba & 0xffff);
584 00:01FB: A5 0A lda <L27+lba_0
585 00:01FD: 85 01 sta <R0
586 00:01FF: 64 03 stz <R0+2
587 00:0201: D4 03 pei <R0+2
588 00:0203: D4 01 pei <R0
589 00:0205: 22 xx xx xx jsl ~~k_printh
590 ; asm {
591 ; jsl $001044
592 ; };
593 asmstart
594 00:0209: 22 44 10 00 jsl $001044
595 asmend
596 ;
597 ; if ((*BIOS_STATUS & 0x80) != 0) {
598 00:020D: E2 20 sep #$20
599 longa off
600 00:020F: AF 20 03 00 lda >800 ; volatile
601 00:0213: 29 80 and #<$80
602 00:0215: C2 20 rep #$20
603 longa on
604 00:0217: D0 03 bne L29
605 00:0219: 82 36 00 brl L10018
606 L29:
607 ; k_prints(" Error: ");
608 00:021C: F4 xx xx pea #^L22+13
609 00:021F: F4 xx xx pea #<L22+13
610 00:0222: 22 xx xx xx jsl ~~k_prints
611 ; k_printh(*BIOS_STATUS);
612 00:0226: E2 20 sep #$20
613 longa off
614 00:0228: AF 20 03 00 lda >800 ; volatile
615 00:022C: C2 20 rep #$20
616 longa on
617 00:022E: 29 FF 00 and #$ff
618 00:0231: 48 pha
619 00:0232: 22 xx xx xx jsl ~~k_printh
620 ; k_putc('\r');
621 00:0236: F4 0D 00 pea #<$d
622 00:0239: 22 xx xx xx jsl ~~k_putc
623 ; return RES_ERROR;
624 00:023D: A9 01 00 lda #$1
625 L30:
626 00:0240: A8 tay
627 00:0241: A5 06 lda <L27+2
628 00:0243: 85 10 sta <L27+2+10
629 00:0245: A5 05 lda <L27+1
630 00:0247: 85 0F sta <L27+1+10
631 00:0249: 2B pld
632 00:024A: 3B tsc
633 00:024B: 18 clc
634 00:024C: 69 0E 00 adc #L27+10
Thu May 20 2021 21:34 Page 13
635 00:024F: 1B tcs
636 00:0250: 98 tya
637 00:0251: 6B rtl
638 ; } else {
639 L10018:
640 ; k_prints(" OK\r");
641 00:0252: F4 xx xx pea #^L22+22
642 00:0255: F4 xx xx pea #<L22+22
643 00:0258: 22 xx xx xx jsl ~~k_prints
644 ; return RES_OK;
645 00:025C: A9 00 00 lda #$0
646 00:025F: 82 DE FF brl L30
647 ; }
648 ;}
649 00000004 L27 equ 4
650 00000005 L28 equ 5
651 ends
652 efunc
653 data
654 L22:
655 00:0041: 67 65 74 62 db $67,$65,$74,$62,$6C,$6F,$63,$6B,$3A,$20,
$00,$20,$00,$20,$45
00:0045: 6C 6F 63 6B
00:0049: 3A 20 00 20
00:004D: 00 20 45
656 00:0050: 72 72 6F 72 db $72,$72,$6F,$72,$3A,$20,$00,$20,$4F,$4B,
$0D,$00
00:0054: 3A 20 00 20
00:0058: 4F 4B 0D 00
657 00:005C: ends
658 ;
659 ;/**
660 ; * Call the C256 PUTBLOCK kernel routine
661 ; */
662 ;// int bios_putblock(char dev, long lba, char * b
uffer) {
663 ;// *BIOS_DEV = dev;
664 ;// *BIOS_LBA = lba;
665 ;// *BIOS_BUFFER = (long)buffer;
666 ;// asm {
667 ;// jsl $001024
668 ;// };
669 ;
670 ;// if (*BIOS_STATUS != 0) {
671 ;// return RES_ERROR;
672 ;// } else {
673 ;// return RES_OK;
674 ;// }
675 ;// }
676 ;
677 xref ~~k_putc
678 xref ~~k_printh
679 xref ~~k_prints
680 end
Lines assembled: 680
Errors: 0
Thu May 20 2021 21:34 Page 14

602
src/foenixmcp.c
View file

@ -7,7 +7,6 @@
#define DEFAULT_LOG_LEVEL LOG_TRACE
#endif
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
@ -31,11 +30,15 @@
#include "dev/txt_a2560k_b.h"
#elif MODEL == MODEL_FOENIX_A2560U || MODEL == MODEL_FOENIX_A2560U_PLUS
#include "dev/txt_a2560u.h"
#elif MODEL == MODEL_FOENIX_C256U || MODEL == MODEL_FOENIX_C256U_PLUS || MODEL == MODEL_FOENIX_FMX
#include "dev/txt_c256.h"
#include "dev/txt_evid.h"
#endif
#include "syscalls.h"
#include "timers.h"
#include "boot.h"
#include "dev/bitmap.h"
#include "memory.h"
#include "dev/block.h"
#include "dev/channel.h"
@ -59,253 +62,109 @@
#include "fatfs/ff.h"
#include "cli/cli.h"
#include "rsrc/font/MSX_CP437_8x8.h"
//#include "rsrc/bitmaps/image.h"
/* Performs all hardware initializations */
static void hw_initialize(void);
/* Install OS drivers */
static void os_devices_initialize(void);
void mcp_init(void) {
hw_initialize();
os_devices_initialize();
}
int main(int argc, char * argv[]) {
short result;
short i;
mcp_init();
buzzer_off();
// At this point, we should be able to call into to console to print to the screens
/* Play the SID test bong on the Gideon SID implementation */
sid_test_internal();
TRACE("Internal SID tested");
if (result = cli_init()) {
ERROR1("FAILED: CLI initialization (%d)", result);
} else {
INFO("CLI initialized.");
}
#if MODEL == MODEL_FOENIX_A2560U || MODEL == MODEL_FOENIX_A2560U_PLUS || MODEL == MODEL_FOENIX_A2560X
// Make sure the command path is set to the default before we get started
cli_command_set("");
TRACE("Calling boot_screen()");
// Display the splash screen and wait for user input
short boot_dev = boot_screen();
TRACE1("Booting from device %d",boot_dev);
// Start the boot process
boot_from_bdev(boot_dev);
INFO("Stopping.");
#elif MODEL == MODEL_FOENIX_C256U || MODEL == MODEL_FOENIX_C256U_PLUS || MODEL == MODEL_FOENIX_FMX
printf("\n\nSDC directory:\n");
int directory = fsys_opendir("/sd/");
while (fsys_readdir(directory, &file) == 0) {
if (file.name[0] == 0) {
break;
}
printf("%s\n", file.name);
}
fsys_closedir(directory);
printf("\n\nHDC directory:\n");
directory = fsys_opendir("/hd/");
while (fsys_readdir(directory, &file) == 0) {
if (file.name[0] == 0) {
break;
}
printf("%s\n", file.name);
}
fsys_closedir(directory);
txt_clear(0, 2);
bm_fill((uint8_t *)0xb00000, 0, 640, 480);
bm_load_clut(0, splashscreen_lut);
bm_load_rle((uint8_t *)0xb00000, splashscreen_pix, 640, 480);
bm_set_data(0, (uint8_t *)0xb00000);
bm_set_visibility(0, 0, 1);
#endif
/* Infinite loop... TODO: we could STOP the processor. */
while (1) {
};
}
const char* VolumeStr[FF_VOLUMES] = { "sd", "fd", "hd" };
extern unsigned long __memory_start;
#if HAS_SUPERIO
/*
* Initialize the SuperIO registers
*/
void init_superio(void) {
*GP10_REG = 0x01;
*GP11_REG = 0x01;
*GP12_REG = 0x01;
*GP13_REG = 0x01;
*GP14_REG = 0x05;
*GP15_REG = 0x05;
*GP16_REG = 0x05;
*GP17_REG = 0x05;
*GP20_REG = 0x00;
*GP24_REG = 0x01;
*GP25_REG = 0x05;
*GP26_REG = 0x84;
*GP30_REG = 0x01;
*GP31_REG = 0x01;
*GP32_REG = 0x01;
*GP33_REG = 0x04; // FAN1 GPIO Config
*GP34_REG = 0x01;
*GP35_REG = 0x01;
*GP36_REG = 0x01;
*GP37_REG = 0x01;
*GP42_REG = 0x01;
*GP43_REG = 0x01;
*GP50_REG = 0x05;
*GP51_REG = 0x05;
*GP52_REG = 0x05;
*GP53_REG = 0x04;
*GP54_REG = 0x05;
*GP55_REG = 0x04;
*GP56_REG = 0x05;
*GP57_REG = 0x04;
*GP60_REG = 0x84;
*GP61_REG = 0x84;
*GP1_REG = 0x00;
*GP2_REG = 0x01;
*GP3_REG = 0x00;
*GP4_REG = 0x00;
*GP5_REG = 0x00;
*GP6_REG = 0x00;
*LED1_REG = 0x01;
*LED2_REG = 0x02;
*FAN1_REG = 0xE0; // <= Value to change to Get the Fan running.
// See doc for more options, need to set $80 to get it started and use other bits to change the PWN...
*FAN_CTRL_REG = 0x01;
}
void init_SuperIO_config_zones(void) {
// First step is to get into the Configuration Mode
*CONFIG_0x2E_REG = 0x55; // We need to Get into the Config Mode with 0x55
// Setting Up Device 0 - Floppy
// {8'h06,16'h03F0,8'h00};
// LD
*CONFIG_0x2E_REG = 0x07;
*CONFIG_0x2F_REG = 0x00;
// BA_H (Base address)
*CONFIG_0x2E_REG = 0x60;
*CONFIG_0x2F_REG = 0x03;
// BA_L
*CONFIG_0x2E_REG = 0x61;
*CONFIG_0x2F_REG = 0xF0;
// INT
*CONFIG_0x2E_REG = 0x70;
*CONFIG_0x2F_REG = 0x06;
// Enable the Zone
*CONFIG_0x2E_REG = 0x30;
*CONFIG_0x2F_REG = 0x01;
// Setting Up Device 3 - Parallel Port
// {8'h07,16'h0378,8'h03};
// LD
*CONFIG_0x2E_REG = 0x07;
*CONFIG_0x2F_REG = 0x03;
// BA_H (Base address)
*CONFIG_0x2E_REG = 0x60;
*CONFIG_0x2F_REG = 0x03;
// BA_L
*CONFIG_0x2E_REG = 0x61;
*CONFIG_0x2F_REG = 0x78;
// INT0
*CONFIG_0x2E_REG = 0x70;
*CONFIG_0x2F_REG = 0x07;
// Parallel Mode
*CONFIG_0x2E_REG = 0xF0;
*CONFIG_0x2F_REG = 0x3A;
// Enable the Zone
*CONFIG_0x2E_REG = 0x30;
*CONFIG_0x2F_REG = 0x01;
// Setting Up Device 4 - Serial Port 1
// {8'h04,16'h03F8,8'h04};
// LD
*CONFIG_0x2E_REG = 0x07;
*CONFIG_0x2F_REG = 0x04;
// BA_H (Base address)
*CONFIG_0x2E_REG = 0x60;
*CONFIG_0x2F_REG = 0x03;
// BA_L
*CONFIG_0x2E_REG = 0x61;
*CONFIG_0x2F_REG = 0xF8;
// INT0
*CONFIG_0x2E_REG = 0x70;
*CONFIG_0x2F_REG = 0x04;
// Enable the Zone
*CONFIG_0x2E_REG = 0x30;
*CONFIG_0x2F_REG = 0x01;
// Setting Up Device 5 - Serial Port 2
// {8'h03,16'h02F8,8'h05};
// LD
*CONFIG_0x2E_REG = 0x07;
*CONFIG_0x2F_REG = 0x05;
// BA_H (Base address)
*CONFIG_0x2E_REG = 0x60;
*CONFIG_0x2F_REG = 0x02;
// BA_L
*CONFIG_0x2E_REG = 0x61;
*CONFIG_0x2F_REG = 0xF8;
// INT0
*CONFIG_0x2E_REG = 0x70;
*CONFIG_0x2F_REG = 0x03;
// Enable the Zone
*CONFIG_0x2E_REG = 0x30;
*CONFIG_0x2F_REG = 0x01;
// Setting Up Device 7 - Keyboard
// {8'h01, 16'h0060,8'h07};
// LD
*CONFIG_0x2E_REG = 0x07;
*CONFIG_0x2F_REG = 0x07;
// BA_H (Base address)
*CONFIG_0x2E_REG = 0x60;
*CONFIG_0x2F_REG = 0x00;
// BA_L
*CONFIG_0x2E_REG = 0x61;
*CONFIG_0x2F_REG = 0x60;
// INT0 (Keyboard)
*CONFIG_0x2E_REG = 0x70;
*CONFIG_0x2F_REG = 0x01;
// INT1 (mouse)
*CONFIG_0x2E_REG = 0x72;
*CONFIG_0x2F_REG = 0x02;
// Enable the Zone
*CONFIG_0x2E_REG = 0x30;
*CONFIG_0x2F_REG = 0x01;
// Setting Up Device 9 - Game Port
// {8'h00, 16'h0200,8'h09};
// LD
*CONFIG_0x2E_REG = 0x07;
*CONFIG_0x2F_REG = 0x09;
// BA_H (Base address)
*CONFIG_0x2E_REG = 0x60;
*CONFIG_0x2F_REG = 0x02;
// BA_L
*CONFIG_0x2E_REG = 0x61;
*CONFIG_0x2F_REG = 0x00;
// INT0
*CONFIG_0x2E_REG = 0x70;
*CONFIG_0x2F_REG = 0x00;
// Enable the Zone
*CONFIG_0x2E_REG = 0x30;
*CONFIG_0x2F_REG = 0x01;
// Setting Up Device 10 - PME (Power Management)
// {8'h00, 16'h0100,8'h0A};
// LD
*CONFIG_0x2E_REG = 0x07;
*CONFIG_0x2F_REG = 0x0A;
// BA_H (Base address)
*CONFIG_0x2E_REG = 0x60;
*CONFIG_0x2F_REG = 0x01;
// BA_L
*CONFIG_0x2E_REG = 0x61;
*CONFIG_0x2F_REG = 0x00;
// INT0
*CONFIG_0x2E_REG = 0x70;
*CONFIG_0x2F_REG = 0x00;
// Enable the Zone
*CONFIG_0x2E_REG = 0x30;
*CONFIG_0x2F_REG = 0x01;
// Setting Up Device 11 - PME (Power Management)
// {8'h05,16'h0330,8'h0B};
// LD
*CONFIG_0x2E_REG = 0x07;
*CONFIG_0x2F_REG = 0x0B;
// BA_H (Base address)
*CONFIG_0x2E_REG = 0x60;
*CONFIG_0x2F_REG = 0x03;
// BA_L
*CONFIG_0x2E_REG = 0x61;
*CONFIG_0x2F_REG = 0x30;
// INT0
*CONFIG_0x2E_REG = 0x70;
*CONFIG_0x2F_REG = 0x05;
// Enable the Zone
*CONFIG_0x2E_REG = 0x30;
*CONFIG_0x2F_REG = 0x01;
// Supplemental Settings
// Power On Device
*CONFIG_0x2E_REG = 0x22;
*CONFIG_0x2F_REG = 0xFF;
// We are done with config.
*CONFIG_0x2E_REG = 0xAA; // We need to Get into the Config Mode with 0x55
*GP60_REG = 0x84; // THis is to replicate the FPGA behavior when it did the config.
*LED1_REG = 0x01; // THis is to replace the FPGA behavior when it did the config in hardware.
}
#endif
void print_error(short channel, char * message, short code) {
print(channel, message);
print(channel, ": ");
print_hex_16(channel, code);
print(channel, "\n");
}
t_sys_info info;
/*
* Initialize the kernel systems.
* Initialize the hardware.
*/
void initialize() {
long target_jiffies;
static void hw_initialize(void) {
int i;
short res;
/* Setup logging early */
/* Setup logging early to facilitate troubleshooting. This may require the UART to be
* functional (e.g. if debugging to the serial port) so it may call uart_init. */
#if HAS_SUPERIO
/* Initialize the SuperIO chip. We do this early so to have the UARTs available for debug output */
superio_init();
INFO("SuperIO initialized");
#endif
log_init();
/* Fill out the system information */
sys_get_information(&info);
#if 0
char msg[] = "This is some text to test that the debug to UART works ok\r\n";
{
@ -319,178 +178,171 @@ void initialize() {
//DEBUG("This is some text to test that the debug to UART works ok");
#endif
/* Initialize the memory system */
/* Initialize the memory system.
* TODO: The amount of RAM should depend on the machine! E.g; U only has 2MB. */
mem_init(0x3d0000);
/* Hide the mouse */
mouse_set_visible(0);
/* Initialize the variable system */
var_init();
/* Initialize the text channels */
txt_init();
#if HAS_DUAL_SCREEN
txt_a2560k_a_install();
txt_a2560k_b_install();
log(LOG_INFO, "Initializing screens...");
txt_init_screen(TXT_SCREEN_A2560K_A);
txt_init_screen(TXT_SCREEN_A2560K_B);
#elif MODEL == MODEL_FOENIX_A2560U || MODEL == MODEL_FOENIX_A2560U_PLUS
txt_a2560u_install();
txt_init_screen(TXT_SCREEN_A2560U);
#else
#error Cannot identify screen setup
#endif
log(LOG_INFO, "Text system initialized");
/* Initialize the indicators */
ind_init();
log(LOG_INFO, "Indicators initialized");
INFO("Indicators initialized");
/* Initialize the interrupt system */
int_init();
#if HAS_SUPERIO
/* Initialize the SuperIO chip */
init_SuperIO_config_zones(); // This Init used to be done by the FPGA.
init_superio();
#endif
/* Mute the PSG */
psg_mute_all();
/* Initialize and mute the SID chips */
sid_init_all();
/* Initialize the Yamaha sound chips (well, turn their volume down at least) */
ym_init();
/* Initialize the CODEC */
init_codec();
cdev_init_system(); // Initialize the channel device system
INFO("Channel device system ready.");
bdev_init_system(); // Initialize the channel device system
INFO("Block device system ready.");
if (res = con_install()) {
log_num(LOG_ERROR, "FAILED: Console installation", res);
} else {
INFO("Console installed.");
}
INFO("Interrupts initialized");
/* Initialize the timers the MCP uses */
timers_init();
INFO("Timers initialized");
/* Initialize the real time clock */
rtc_init();
INFO("Real time clock initialized");
target_jiffies = sys_time_jiffies() + 300; /* 5 seconds minimum */
DEBUG1("target_jiffies assigned: %d", target_jiffies);
/* Mute the PSG */
psg_mute_all();
INFO("PSGs muted");
/* Initialize and mute the SID chips */
sid_init_all();
INFO("SIDs initialized");
/* Initialize the Yamaha sound chips (well, turn their volume down at least) */
ym_init();
INFO("Yamaha soundchips initialized");
/* Initialize the CODEC (mixer chip) */
init_codec();
/* PS/2 keyboard and mouse */
if ((res = ps2_init())) {
ERROR1("FAILED: PS/2 keyboard initialization (%d)", res);
} else {
INFO("PS/2 keyboard initialized.");
}
#if MODEL == MODEL_FOENIX_A2560K
/* A2560K's special keyboard controller */
if ((res = kbdmo_init())) {
ERROR1("FAILED: A2560K built-in keyboard initialization (%d)", res);
} else {
INFO("A2560K built-in keyboard initialized.");
}
#endif
#if MODEL == MODEL_FOENIX_C256U || MODEL == MODEL_FOENIX_C256U_PLUS || MODEL == MODEL_FOENIX_FMX
// Initialize the bitmap system
bm_init();
INFO("Bitmap system initialized...");
#endif
/* Initialize the text channels */
txt_init();
/* Enable all interrupts */
int_enable_all();
TRACE("Interrupts enabled");
/* Play the SID test bong on the Gideon SID implementation */
sid_test_internal();
/* Hide the mouse */
mouse_set_visible(0);
if (res = pata_install()) {
log_num(LOG_ERROR, "FAILED: PATA driver installation", res);
/* Other devices are not directly initialized. They are initialized through their OS "device",
* either eagerly or lazyly (i.e whenever the device opened). */
}
/* Install OS devices */
static void os_devices_initialize(void) {
short res;
#if HAS_PARALLEL_PORT
/* Parallel port */
if ((res = lpt_install())) {
ERROR1("FAILED: LPT installation (%d)", res);
} else {
INFO("LPT installed.");
}
#endif
#if HAS_MIDI_PORTS
/* MIDI ports */
if ((res = midi_install())) {
ERROR1("FAILED: MIDI installation (%d)", res);
} else {
INFO("MIDI installed.");
}
#endif
if (res = uart_install()) {
ERROR1("FAILED: serial port initialization (%d)", res);
} else {
INFO("Serial ports initialized.");
}
/* Initialize the variable system */
var_init();
/* Initialize the text channels: register the driver for the screens, then use txt_init_screen. */
#if HAS_DUAL_SCREEN
txt_a2560k_a_install();
txt_a2560k_b_install();
INFO("Initializing screens...");
txt_init_screen(TXT_SCREEN_A2560K_A);
txt_init_screen(TXT_SCREEN_A2560K_B);
#elif MODEL == MODEL_FOENIX_A2560U || MODEL == MODEL_FOENIX_A2560U_PLUS
txt_a2560u_install();
txt_init_screen(TXT_SCREEN_A2560U);
#elif MODEL == MODEL_FOENIX_C256U || MODEL == MODEL_FOENIX_C256U_PLUS || MODEL == MODEL_FOENIX_FMX
// Install and initialize the main screen text driver
txt_c256_install();
txt_init_screen(TXT_SCREEN_C256);
// If the EVID card is plugged in, install and initialize the EVID driver
if (info.screens > 1) {
short result = txt_evid_install();
txt_init_screen(TXT_SCREEN_EVID);
}
#else
#error Cannot identify screen setup
#endif
INFO("Text system initialized...");
cdev_init_system(); // Initialize the channel device system
INFO("Channel device system ready.");
bdev_init_system(); // Initialize the block device system
INFO("Block device system ready.");
if ((res = con_install())) {
ERROR1("FAILED: Console installation (%d)", res);
} else {
INFO("Console installed.");
}
if ((res = pata_install())) {
ERROR1("FAILED: PATA driver installation (%d)", res);
} else {
INFO("PATA driver installed.");
}
if (res = sdc_install()) {
ERROR1("FAILED: SDC driver installation %d", res);
if ((res = sdc_install())) {
ERROR1("FAILED: SDC driver installation (%d)", res);
} else {
INFO("SDC driver installed.");
}
#if HAS_FLOPPY
if (res = fdc_install()) {
ERROR1("FAILED: Floppy drive initialization %d", res);
if ((res = fdc_install())) {
ERROR1("FAILED: Floppy drive initialization (%d)", res);
} else {
INFO("Floppy drive initialized.");
}
#endif
// At this point, we should be able to call into to console to print to the screens
if (res = ps2_init()) {
print_error(0, "FAILED: PS/2 keyboard initialization", res);
} else {
log(LOG_INFO, "PS/2 keyboard initialized.");
}
#if MODEL == MODEL_FOENIX_A2560K
if (res = kbdmo_init()) {
log_num(LOG_ERROR, "FAILED: A2560K built-in keyboard initialization", res);
} else {
log(LOG_INFO, "A2560K built-in keyboard initialized.");
}
#endif
#if HAS_PARALLEL_PORT
if (res = lpt_install()) {
log_num(LOG_ERROR, "FAILED: LPT installation", res);
} else {
log(LOG_INFO, "LPT installed.");
}
#endif
#if HAS_MIDI_PORTS
if (res = midi_install()) {
log_num(LOG_ERROR, "FAILED: MIDI installation", res);
} else {
log(LOG_INFO, "MIDI installed.");
}
#endif
if (res = uart_install()) {
log_num(LOG_ERROR, "FAILED: serial port initialization", res);
} else {
log(LOG_INFO, "Serial ports initialized.");
}
if (res = cli_init()) {
log_num(LOG_ERROR, "FAILED: CLI initialization", res);
} else {
INFO("CLI initialized.");
}
if (res = fsys_init()) {
log_num(LOG_ERROR, "FAILED: file system initialization", res);
if ((res = fsys_init())) {
ERROR1("FAILED: file system initialization (%d)", res);
} else {
INFO("File system initialized.");
}
}
#define BOOT_DEFAULT -1 // User chose default, or the time to over-ride has passed
int main(int argc, char * argv[]) {
short result;
short i;
//*((volatile uint32_t*const)0xfec80008) = 0xff99ff22L;
initialize();
//*((volatile uint32_t*const)0xfec00000) = 0x16;
// Make sure the command path is set to the default before we get started
cli_command_set("");
// Display the splash screen and wait for user input
short boot_dev = boot_screen();
// Start the boot process
boot_from_bdev(boot_dev);
log(LOG_INFO, "Stopping.");
/* Infinite loop... */
while (1) {};
}

946
src/include/A2560K/YM2151.h
View file

@ -1,496 +1,498 @@
#ifndef YM2151_H_ /* Include guard */
#define YM2151_H_
//;--------------------------------------------------------------------------------------
//;--------------------------------------------------------------------------------------
//;--------------------------------------------------------------------------------------
// External OPM
unsigned char * EXT_OPM_01_TEST = (void *) 0xFEC20601;
unsigned char * EXT_OPM_08_KEY_ON_OFF = (void *) 0xFEC20608;
unsigned char * EXT_OPM_0F_NE_NFREQ = (void *) 0xFEC2060F;
unsigned char * EXT_OPM_10_CLK_A1 = (void *) 0xFEC20610;
unsigned char * EXT_OPM_11_CLK_A2 = (void *) 0xFEC20611;
unsigned char * EXT_OPM_12_CLK_B = (void *) 0xFEC20612;
unsigned char * EXT_OPM_14_CMS_FLAG_RST_IRQEN_LD = (void *) 0xFEC20614;
unsigned char * EXT_OPM_18_LFRQ = (void *) 0xFEC20618;
unsigned char * EXT_OPM_19_PMD_AMD = (void *) 0xFEC20619;
unsigned char * EXT_OPM_1B_CT_W = (void *) 0xFEC2061B;
#include <stdint.h>
unsigned char * EXT_OPM_20_A_RL_FR_CONNECT = (void *) 0xFEC20620;
unsigned char * EXT_OPM_21_B_RL_FR_CONNECT = (void *) 0xFEC20621;
unsigned char * EXT_OPM_22_C_RL_FR_CONNECT = (void *) 0xFEC20622;
unsigned char * EXT_OPM_23_D_RL_FR_CONNECT = (void *) 0xFEC20623;
unsigned char * EXT_OPM_24_E_RL_FR_CONNECT = (void *) 0xFEC20624;
unsigned char * EXT_OPM_25_F_RL_FR_CONNECT = (void *) 0xFEC20625;
unsigned char * EXT_OPM_26_G_RL_FR_CONNECT = (void *) 0xFEC20626;
unsigned char * EXT_OPM_27_H_RL_FR_CONNECT = (void *) 0xFEC20627;
unsigned char * EXT_OPM_28_A_KC = (void *) 0xFEC20628;
unsigned char * EXT_OPM_29_B_KC = (void *) 0xFEC20629;
unsigned char * EXT_OPM_2A_C_KC = (void *) 0xFEC2062A;
unsigned char * EXT_OPM_2B_D_KC = (void *) 0xFEC2062B;
unsigned char * EXT_OPM_2C_E_KC = (void *) 0xFEC2062C;
unsigned char * EXT_OPM_2D_F_KC = (void *) 0xFEC2062D;
unsigned char * EXT_OPM_2E_G_KC = (void *) 0xFEC2062E;
unsigned char * EXT_OPM_2F_H_KC = (void *) 0xFEC2062F;
unsigned char * EXT_OPM_30_A_KF = (void *) 0xFEC20630;
unsigned char * EXT_OPM_31_B_KF = (void *) 0xFEC20631;
unsigned char * EXT_OPM_32_C_KF = (void *) 0xFEC20632;
unsigned char * EXT_OPM_33_D_KF = (void *) 0xFEC20633;
unsigned char * EXT_OPM_34_E_KF = (void *) 0xFEC20634;
unsigned char * EXT_OPM_35_F_KF = (void *) 0xFEC20635;
unsigned char * EXT_OPM_36_G_KF = (void *) 0xFEC20636;
unsigned char * EXT_OPM_37_H_KF = (void *) 0xFEC20637;
unsigned char * EXT_OPM_38_A_PMS_AMS = (void *) 0xFEC20638;
unsigned char * EXT_OPM_39_B_PMS_AMS = (void *) 0xFEC20639;
unsigned char * EXT_OPM_3A_C_PMS_AMS = (void *) 0xFEC2063A;
unsigned char * EXT_OPM_3B_D_PMS_AMS = (void *) 0xFEC2063B;
unsigned char * EXT_OPM_3C_E_PMS_AMS = (void *) 0xFEC2063C;
unsigned char * EXT_OPM_3D_F_PMS_AMS = (void *) 0xFEC2063D;
unsigned char * EXT_OPM_3E_G_PMS_AMS = (void *) 0xFEC2063E;
unsigned char * EXT_OPM_3F_H_PMS_AMS = (void *) 0xFEC2063F;
unsigned char * EXT_OPM_40_A_M1_DT1_MUL = (void *) 0xFEC20640;
unsigned char * EXT_OPM_41_B_M1_DT1_MUL = (void *) 0xFEC20641;
unsigned char * EXT_OPM_42_C_M1_DT1_MUL = (void *) 0xFEC20642;
unsigned char * EXT_OPM_43_D_M1_DT1_MUL = (void *) 0xFEC20643;
unsigned char * EXT_OPM_44_E_M1_DT1_MUL = (void *) 0xFEC20644;
unsigned char * EXT_OPM_45_F_M1_DT1_MUL = (void *) 0xFEC20645;
unsigned char * EXT_OPM_46_G_M1_DT1_MUL = (void *) 0xFEC20646;
unsigned char * EXT_OPM_47_H_M1_DT1_MUL = (void *) 0xFEC20647;
unsigned char * EXT_OPM_48_A_M2_DT1_MUL = (void *) 0xFEC20648;
unsigned char * EXT_OPM_49_B_M2_DT1_MUL = (void *) 0xFEC20649;
unsigned char * EXT_OPM_4A_C_M2_DT1_MUL = (void *) 0xFEC2064A;
unsigned char * EXT_OPM_4B_D_M2_DT1_MUL = (void *) 0xFEC2064B;
unsigned char * EXT_OPM_4C_E_M2_DT1_MUL = (void *) 0xFEC2064C;
unsigned char * EXT_OPM_4D_F_M2_DT1_MUL = (void *) 0xFEC2064D;
unsigned char * EXT_OPM_4E_G_M2_DT1_MUL = (void *) 0xFEC2064E;
unsigned char * EXT_OPM_4F_H_M2_DT1_MUL = (void *) 0xFEC2064F;
unsigned char * EXT_OPM_50_A_C1_DT1_MUL = (void *) 0xFEC20650;
unsigned char * EXT_OPM_51_B_C1_DT1_MUL = (void *) 0xFEC20651;
unsigned char * EXT_OPM_52_C_C1_DT1_MUL = (void *) 0xFEC20652;
unsigned char * EXT_OPM_53_D_C1_DT1_MUL = (void *) 0xFEC20653;
unsigned char * EXT_OPM_54_E_C1_DT1_MUL = (void *) 0xFEC20654;
unsigned char * EXT_OPM_55_F_C1_DT1_MUL = (void *) 0xFEC20655;
unsigned char * EXT_OPM_56_G_C1_DT1_MUL = (void *) 0xFEC20656;
unsigned char * EXT_OPM_57_H_C1_DT1_MUL = (void *) 0xFEC20657;
unsigned char * EXT_OPM_58_A_C2_DT1_MUL = (void *) 0xFEC20658;
unsigned char * EXT_OPM_59_B_C2_DT1_MUL = (void *) 0xFEC20659;
unsigned char * EXT_OPM_5A_C_C2_DT1_MUL = (void *) 0xFEC2065A;
unsigned char * EXT_OPM_5B_D_C2_DT1_MUL = (void *) 0xFEC2065B;
unsigned char * EXT_OPM_5C_E_C2_DT1_MUL = (void *) 0xFEC2065C;
unsigned char * EXT_OPM_5D_F_C2_DT1_MUL = (void *) 0xFEC2065D;
unsigned char * EXT_OPM_5E_G_C2_DT1_MUL = (void *) 0xFEC2065E;
unsigned char * EXT_OPM_5F_H_C2_DT1_MUL = (void *) 0xFEC2065F;
unsigned char * EXT_OPM_60_A_M1_TL = (void *) 0xFEC20660;
unsigned char * EXT_OPM_61_B_M1_TL = (void *) 0xFEC20661;
unsigned char * EXT_OPM_62_C_M1_TL = (void *) 0xFEC20662;
unsigned char * EXT_OPM_63_D_M1_TL = (void *) 0xFEC20663;
unsigned char * EXT_OPM_64_E_M1_TL = (void *) 0xFEC20664;
unsigned char * EXT_OPM_65_F_M1_TL = (void *) 0xFEC20665;
unsigned char * EXT_OPM_66_G_M1_TL = (void *) 0xFEC20666;
unsigned char * EXT_OPM_67_H_M1_TL = (void *) 0xFEC20667;
unsigned char * EXT_OPM_68_A_M2_TL = (void *) 0xFEC20668;
unsigned char * EXT_OPM_69_B_M2_TL = (void *) 0xFEC20669;
unsigned char * EXT_OPM_6A_C_M2_TL = (void *) 0xFEC2066A;
unsigned char * EXT_OPM_6B_D_M2_TL = (void *) 0xFEC2066B;
unsigned char * EXT_OPM_6C_E_M2_TL = (void *) 0xFEC2066C;
unsigned char * EXT_OPM_6D_F_M2_TL = (void *) 0xFEC2066D;
unsigned char * EXT_OPM_6E_G_M2_TL = (void *) 0xFEC2066E;
unsigned char * EXT_OPM_6F_H_M2_TL = (void *) 0xFEC2066F;
unsigned char * EXT_OPM_70_A_C1_TL = (void *) 0xFEC20670;
unsigned char * EXT_OPM_71_B_C1_TL = (void *) 0xFEC20671;
unsigned char * EXT_OPM_72_C_C1_TL = (void *) 0xFEC20672;
unsigned char * EXT_OPM_73_D_C1_TL = (void *) 0xFEC20673;
unsigned char * EXT_OPM_74_E_C1_TL = (void *) 0xFEC20674;
unsigned char * EXT_OPM_75_F_C1_TL = (void *) 0xFEC20675;
unsigned char * EXT_OPM_76_G_C1_TL = (void *) 0xFEC20676;
unsigned char * EXT_OPM_77_H_C1_TL = (void *) 0xFEC20677;
unsigned char * EXT_OPM_78_A_C2_TL = (void *) 0xFEC20678;
unsigned char * EXT_OPM_79_B_C2_TL = (void *) 0xFEC20679;
unsigned char * EXT_OPM_7A_C_C2_TL = (void *) 0xFEC2067A;
unsigned char * EXT_OPM_7B_D_C2_TL = (void *) 0xFEC2067B;
unsigned char * EXT_OPM_7C_E_C2_TL = (void *) 0xFEC2067C;
unsigned char * EXT_OPM_7D_F_C2_TL = (void *) 0xFEC2067D;
unsigned char * EXT_OPM_7E_G_C2_TL = (void *) 0xFEC2067E;
unsigned char * EXT_OPM_7F_H_C2_TL = (void *) 0xFEC2067F;
unsigned char * EXT_OPM_80_A_M1_KS_AR = (void *) 0xFEC20680;
unsigned char * EXT_OPM_81_B_M1_KS_AR = (void *) 0xFEC20681;
unsigned char * EXT_OPM_82_C_M1_KS_AR = (void *) 0xFEC20682;
unsigned char * EXT_OPM_83_D_M1_KS_AR = (void *) 0xFEC20683;
unsigned char * EXT_OPM_84_E_M1_KS_AR = (void *) 0xFEC20684;
unsigned char * EXT_OPM_85_F_M1_KS_AR = (void *) 0xFEC20685;
unsigned char * EXT_OPM_86_G_M1_KS_AR = (void *) 0xFEC20686;
unsigned char * EXT_OPM_87_H_M1_KS_AR = (void *) 0xFEC20687;
unsigned char * EXT_OPM_88_A_M2_KS_AR = (void *) 0xFEC20688;
unsigned char * EXT_OPM_89_B_M2_KS_AR = (void *) 0xFEC20689;
unsigned char * EXT_OPM_8A_C_M2_KS_AR = (void *) 0xFEC2068A;
unsigned char * EXT_OPM_8B_D_M2_KS_AR = (void *) 0xFEC2068B;
unsigned char * EXT_OPM_8C_E_M2_KS_AR = (void *) 0xFEC2068C;
unsigned char * EXT_OPM_8D_F_M2_KS_AR = (void *) 0xFEC2068D;
unsigned char * EXT_OPM_8E_G_M2_KS_AR = (void *) 0xFEC2068E;
unsigned char * EXT_OPM_8F_H_M2_KS_AR = (void *) 0xFEC2068F;
unsigned char * EXT_OPM_90_A_C1_KS_AR = (void *) 0xFEC20690;
unsigned char * EXT_OPM_91_B_C1_KS_AR = (void *) 0xFEC20691;
unsigned char * EXT_OPM_92_C_C1_KS_AR = (void *) 0xFEC20692;
unsigned char * EXT_OPM_93_D_C1_KS_AR = (void *) 0xFEC20693;
unsigned char * EXT_OPM_94_E_C1_KS_AR = (void *) 0xFEC20694;
unsigned char * EXT_OPM_95_F_C1_KS_AR = (void *) 0xFEC20695;
unsigned char * EXT_OPM_96_G_C1_KS_AR = (void *) 0xFEC20696;
unsigned char * EXT_OPM_97_H_C1_KS_AR = (void *) 0xFEC20697;
unsigned char * EXT_OPM_98_A_C2_KS_AR = (void *) 0xFEC20698;
unsigned char * EXT_OPM_99_B_C2_KS_AR = (void *) 0xFEC20699;
unsigned char * EXT_OPM_9A_C_C2_KS_AR = (void *) 0xFEC2069A;
unsigned char * EXT_OPM_9B_D_C2_KS_AR = (void *) 0xFEC2069B;
unsigned char * EXT_OPM_9C_E_C2_KS_AR = (void *) 0xFEC2069C;
unsigned char * EXT_OPM_9D_F_C2_KS_AR = (void *) 0xFEC2069D;
unsigned char * EXT_OPM_9E_G_C2_KS_AR = (void *) 0xFEC2069E;
unsigned char * EXT_OPM_9F_H_C2_KS_AR = (void *) 0xFEC2069F;
unsigned char * EXT_OPM_A0_A_M1_AMS_EN_D1R = (void *) 0xFEC206A0;
unsigned char * EXT_OPM_A1_B_M1_AMS_EN_D1R = (void *) 0xFEC206A1;
unsigned char * EXT_OPM_A2_C_M1_AMS_EN_D1R = (void *) 0xFEC206A2;
unsigned char * EXT_OPM_A3_D_M1_AMS_EN_D1R = (void *) 0xFEC206A3;
unsigned char * EXT_OPM_A4_E_M1_AMS_EN_D1R = (void *) 0xFEC206A4;
unsigned char * EXT_OPM_A5_F_M1_AMS_EN_D1R = (void *) 0xFEC206A5;
unsigned char * EXT_OPM_A6_G_M1_AMS_EN_D1R = (void *) 0xFEC206A6;
unsigned char * EXT_OPM_A7_H_M1_AMS_EN_D1R = (void *) 0xFEC206A7;
unsigned char * EXT_OPM_A8_A_M2_AMS_EN_D1R = (void *) 0xFEC206A8;
unsigned char * EXT_OPM_A9_B_M2_AMS_EN_D1R = (void *) 0xFEC206A9;
unsigned char * EXT_OPM_AA_C_M2_AMS_EN_D1R = (void *) 0xFEC206AA;
unsigned char * EXT_OPM_AB_D_M2_AMS_EN_D1R = (void *) 0xFEC206AB;
unsigned char * EXT_OPM_AC_E_M2_AMS_EN_D1R = (void *) 0xFEC206AC;
unsigned char * EXT_OPM_AD_F_M2_AMS_EN_D1R = (void *) 0xFEC206AD;
unsigned char * EXT_OPM_AE_G_M2_AMS_EN_D1R = (void *) 0xFEC206AE;
unsigned char * EXT_OPM_AF_H_M2_AMS_EN_D1R = (void *) 0xFEC206AF;
unsigned char * EXT_OPM_B0_A_C1_AMS_EN_D1R = (void *) 0xFEC206B0;
unsigned char * EXT_OPM_B1_B_C1_AMS_EN_D1R = (void *) 0xFEC206B1;
unsigned char * EXT_OPM_B2_C_C1_AMS_EN_D1R = (void *) 0xFEC206B2;
unsigned char * EXT_OPM_B3_D_C1_AMS_EN_D1R = (void *) 0xFEC206B3;
unsigned char * EXT_OPM_B4_E_C1_AMS_EN_D1R = (void *) 0xFEC206B4;
unsigned char * EXT_OPM_B5_F_C1_AMS_EN_D1R = (void *) 0xFEC206B5;
unsigned char * EXT_OPM_B6_G_C1_AMS_EN_D1R = (void *) 0xFEC206B6;
unsigned char * EXT_OPM_B7_H_C1_AMS_EN_D1R = (void *) 0xFEC206B7;
unsigned char * EXT_OPM_B8_A_C2_AMS_EN_D1R = (void *) 0xFEC206B8;
unsigned char * EXT_OPM_B9_B_C2_AMS_EN_D1R = (void *) 0xFEC206B9;
unsigned char * EXT_OPM_BA_C_C2_AMS_EN_D1R = (void *) 0xFEC206BA;
unsigned char * EXT_OPM_BB_D_C2_AMS_EN_D1R = (void *) 0xFEC206BB;
unsigned char * EXT_OPM_BC_E_C2_AMS_EN_D1R = (void *) 0xFEC206BC;
unsigned char * EXT_OPM_BD_F_C2_AMS_EN_D1R = (void *) 0xFEC206BD;
unsigned char * EXT_OPM_BE_G_C2_AMS_EN_D1R = (void *) 0xFEC206BE;
unsigned char * EXT_OPM_BF_H_C2_AMS_EN_D1R = (void *) 0xFEC206BF;
unsigned char * EXT_OPM_C0_A_M1_DT2_D2R = (void *) 0xFEC206C0;
unsigned char * EXT_OPM_C1_B_M1_DT2_D2R = (void *) 0xFEC206C1;
unsigned char * EXT_OPM_C2_C_M1_DT2_D2R = (void *) 0xFEC206C2;
unsigned char * EXT_OPM_C3_D_M1_DT2_D2R = (void *) 0xFEC206C3;
unsigned char * EXT_OPM_C4_E_M1_DT2_D2R = (void *) 0xFEC206C4;
unsigned char * EXT_OPM_C5_F_M1_DT2_D2R = (void *) 0xFEC206C5;
unsigned char * EXT_OPM_C6_G_M1_DT2_D2R = (void *) 0xFEC206C6;
unsigned char * EXT_OPM_C7_H_M1_DT2_D2R = (void *) 0xFEC206C7;
unsigned char * EXT_OPM_C8_A_M2_DT2_D2R = (void *) 0xFEC206C8;
unsigned char * EXT_OPM_C9_B_M2_DT2_D2R = (void *) 0xFEC206C9;
unsigned char * EXT_OPM_CA_C_M2_DT2_D2R = (void *) 0xFEC206CA;
unsigned char * EXT_OPM_CB_D_M2_DT2_D2R = (void *) 0xFEC206CB;
unsigned char * EXT_OPM_CC_E_M2_DT2_D2R = (void *) 0xFEC206CC;
unsigned char * EXT_OPM_CD_F_M2_DT2_D2R = (void *) 0xFEC206CD;
unsigned char * EXT_OPM_CE_G_M2_DT2_D2R = (void *) 0xFEC206CE;
unsigned char * EXT_OPM_CF_H_M2_DT2_D2R = (void *) 0xFEC206CF;
unsigned char * EXT_OPM_D0_A_C1_DT2_D2R = (void *) 0xFEC206D0;
unsigned char * EXT_OPM_D1_B_C1_DT2_D2R = (void *) 0xFEC206D1;
unsigned char * EXT_OPM_D2_C_C1_DT2_D2R = (void *) 0xFEC206D2;
unsigned char * EXT_OPM_D3_D_C1_DT2_D2R = (void *) 0xFEC206D3;
unsigned char * EXT_OPM_D4_E_C1_DT2_D2R = (void *) 0xFEC206D4;
unsigned char * EXT_OPM_D5_F_C1_DT2_D2R = (void *) 0xFEC206D5;
unsigned char * EXT_OPM_D6_G_C1_DT2_D2R = (void *) 0xFEC206D6;
unsigned char * EXT_OPM_D7_H_C1_DT2_D2R = (void *) 0xFEC206D7;
unsigned char * EXT_OPM_D8_A_C2_DT2_D2R = (void *) 0xFEC206D8;
unsigned char * EXT_OPM_D9_B_C2_DT2_D2R = (void *) 0xFEC206D9;
unsigned char * EXT_OPM_DA_C_C2_DT2_D2R = (void *) 0xFEC206DA;
unsigned char * EXT_OPM_DB_D_C2_DT2_D2R = (void *) 0xFEC206DB;
unsigned char * EXT_OPM_DC_E_C2_DT2_D2R = (void *) 0xFEC206DC;
unsigned char * EXT_OPM_DD_F_C2_DT2_D2R = (void *) 0xFEC206DD;
unsigned char * EXT_OPM_DE_G_C2_DT2_D2R = (void *) 0xFEC206DE;
unsigned char * EXT_OPM_DF_H_C2_DT2_D2R = (void *) 0xFEC206DF;
unsigned char * EXT_OPM_E0_A_M1_D1L_RR = (void *) 0xFEC206E0;
unsigned char * EXT_OPM_E1_B_M1_D1L_RR = (void *) 0xFEC206E1;
unsigned char * EXT_OPM_E2_C_M1_D1L_RR = (void *) 0xFEC206E2;
unsigned char * EXT_OPM_E3_D_M1_D1L_RR = (void *) 0xFEC206E3;
unsigned char * EXT_OPM_E4_E_M1_D1L_RR = (void *) 0xFEC206E4;
unsigned char * EXT_OPM_E5_F_M1_D1L_RR = (void *) 0xFEC206E5;
unsigned char * EXT_OPM_E6_G_M1_D1L_RR = (void *) 0xFEC206E6;
unsigned char * EXT_OPM_E7_H_M1_D1L_RR = (void *) 0xFEC206E7;
unsigned char * EXT_OPM_E8_A_M2_D1L_RR = (void *) 0xFEC206E8;
unsigned char * EXT_OPM_E9_B_M2_D1L_RR = (void *) 0xFEC206E9;
unsigned char * EXT_OPM_EA_C_M2_D1L_RR = (void *) 0xFEC206EA;
unsigned char * EXT_OPM_EB_D_M2_D1L_RR = (void *) 0xFEC206EB;
unsigned char * EXT_OPM_EC_E_M2_D1L_RR = (void *) 0xFEC206EC;
unsigned char * EXT_OPM_ED_F_M2_D1L_RR = (void *) 0xFEC206ED;
unsigned char * EXT_OPM_EE_G_M2_D1L_RR = (void *) 0xFEC206EE;
unsigned char * EXT_OPM_EF_H_M2_D1L_RR = (void *) 0xFEC206EF;
unsigned char * EXT_OPM_F0_A_C1_D1L_RR = (void *) 0xFEC206F0;
unsigned char * EXT_OPM_F1_B_C1_D1L_RR = (void *) 0xFEC206F1;
unsigned char * EXT_OPM_F2_C_C1_D1L_RR = (void *) 0xFEC206F2;
unsigned char * EXT_OPM_F3_D_C1_D1L_RR = (void *) 0xFEC206F3;
unsigned char * EXT_OPM_F4_E_C1_D1L_RR = (void *) 0xFEC206F4;
unsigned char * EXT_OPM_F5_F_C1_D1L_RR = (void *) 0xFEC206F5;
unsigned char * EXT_OPM_F6_G_C1_D1L_RR = (void *) 0xFEC206F6;
unsigned char * EXT_OPM_F7_H_C1_D1L_RR = (void *) 0xFEC206F7;
unsigned char * EXT_OPM_F8_A_C2_D1L_RR = (void *) 0xFEC206F8;
unsigned char * EXT_OPM_F9_B_C2_D1L_RR = (void *) 0xFEC206F9;
unsigned char * EXT_OPM_FA_C_C2_D1L_RR = (void *) 0xFEC206FA;
unsigned char * EXT_OPM_FB_D_C2_D1L_RR = (void *) 0xFEC206FB;
unsigned char * EXT_OPM_FC_E_C2_D1L_RR = (void *) 0xFEC206FC;
unsigned char * EXT_OPM_FD_F_C2_D1L_RR = (void *) 0xFEC206FD;
unsigned char * EXT_OPM_FE_G_C2_D1L_RR = (void *) 0xFEC206FE;
unsigned char * EXT_OPM_FF_H_C2_D1L_RR = (void *) 0xFEC206FF;
//)--------------------------------------------------------------------------------------
//)--------------------------------------------------------------------------------------
//)--------------------------------------------------------------------------------------
// External OPM
#define EXT_OPM_01_TEST ((uint8_t*) 0xFEC20601)
#define EXT_OPM_08_KEY_ON_OFF ((uint8_t*) 0xFEC20608)
#define EXT_OPM_0F_NE_NFREQ ((uint8_t*) 0xFEC2060F)
#define EXT_OPM_10_CLK_A1 ((uint8_t*) 0xFEC20610)
#define EXT_OPM_11_CLK_A2 ((uint8_t*) 0xFEC20611)
#define EXT_OPM_12_CLK_B ((uint8_t*) 0xFEC20612)
#define EXT_OPM_14_CMS_FLAG_RST_IRQEN_LD ((uint8_t*) 0xFEC20614)
#define EXT_OPM_18_LFRQ ((uint8_t*) 0xFEC20618)
#define EXT_OPM_19_PMD_AMD ((uint8_t*) 0xFEC20619)
#define EXT_OPM_1B_CT_W ((uint8_t*) 0xFEC2061B)
#define EXT_OPM_20_A_RL_FR_CONNECT ((uint8_t*) 0xFEC20620)
#define EXT_OPM_21_B_RL_FR_CONNECT ((uint8_t*) 0xFEC20621)
#define EXT_OPM_22_C_RL_FR_CONNECT ((uint8_t*) 0xFEC20622)
#define EXT_OPM_23_D_RL_FR_CONNECT ((uint8_t*) 0xFEC20623)
#define EXT_OPM_24_E_RL_FR_CONNECT ((uint8_t*) 0xFEC20624)
#define EXT_OPM_25_F_RL_FR_CONNECT ((uint8_t*) 0xFEC20625)
#define EXT_OPM_26_G_RL_FR_CONNECT ((uint8_t*) 0xFEC20626)
#define EXT_OPM_27_H_RL_FR_CONNECT ((uint8_t*) 0xFEC20627)
#define EXT_OPM_28_A_KC ((uint8_t*) 0xFEC20628)
#define EXT_OPM_29_B_KC ((uint8_t*) 0xFEC20629)
#define EXT_OPM_2A_C_KC ((uint8_t*) 0xFEC2062A)
#define EXT_OPM_2B_D_KC ((uint8_t*) 0xFEC2062B)
#define EXT_OPM_2C_E_KC ((uint8_t*) 0xFEC2062C)
#define EXT_OPM_2D_F_KC ((uint8_t*) 0xFEC2062D)
#define EXT_OPM_2E_G_KC ((uint8_t*) 0xFEC2062E)
#define EXT_OPM_2F_H_KC ((uint8_t*) 0xFEC2062F)
#define EXT_OPM_30_A_KF ((uint8_t*) 0xFEC20630)
#define EXT_OPM_31_B_KF ((uint8_t*) 0xFEC20631)
#define EXT_OPM_32_C_KF ((uint8_t*) 0xFEC20632)
#define EXT_OPM_33_D_KF ((uint8_t*) 0xFEC20633)
#define EXT_OPM_34_E_KF ((uint8_t*) 0xFEC20634)
#define EXT_OPM_35_F_KF ((uint8_t*) 0xFEC20635)
#define EXT_OPM_36_G_KF ((uint8_t*) 0xFEC20636)
#define EXT_OPM_37_H_KF ((uint8_t*) 0xFEC20637)
#define EXT_OPM_38_A_PMS_AMS ((uint8_t*) 0xFEC20638)
#define EXT_OPM_39_B_PMS_AMS ((uint8_t*) 0xFEC20639)
#define EXT_OPM_3A_C_PMS_AMS ((uint8_t*) 0xFEC2063A)
#define EXT_OPM_3B_D_PMS_AMS ((uint8_t*) 0xFEC2063B)
#define EXT_OPM_3C_E_PMS_AMS ((uint8_t*) 0xFEC2063C)
#define EXT_OPM_3D_F_PMS_AMS ((uint8_t*) 0xFEC2063D)
#define EXT_OPM_3E_G_PMS_AMS ((uint8_t*) 0xFEC2063E)
#define EXT_OPM_3F_H_PMS_AMS ((uint8_t*) 0xFEC2063F)
#define EXT_OPM_40_A_M1_DT1_MUL ((uint8_t*) 0xFEC20640)
#define EXT_OPM_41_B_M1_DT1_MUL ((uint8_t*) 0xFEC20641)
#define EXT_OPM_42_C_M1_DT1_MUL ((uint8_t*) 0xFEC20642)
#define EXT_OPM_43_D_M1_DT1_MUL ((uint8_t*) 0xFEC20643)
#define EXT_OPM_44_E_M1_DT1_MUL ((uint8_t*) 0xFEC20644)
#define EXT_OPM_45_F_M1_DT1_MUL ((uint8_t*) 0xFEC20645)
#define EXT_OPM_46_G_M1_DT1_MUL ((uint8_t*) 0xFEC20646)
#define EXT_OPM_47_H_M1_DT1_MUL ((uint8_t*) 0xFEC20647)
#define EXT_OPM_48_A_M2_DT1_MUL ((uint8_t*) 0xFEC20648)
#define EXT_OPM_49_B_M2_DT1_MUL ((uint8_t*) 0xFEC20649)
#define EXT_OPM_4A_C_M2_DT1_MUL ((uint8_t*) 0xFEC2064A)
#define EXT_OPM_4B_D_M2_DT1_MUL ((uint8_t*) 0xFEC2064B)
#define EXT_OPM_4C_E_M2_DT1_MUL ((uint8_t*) 0xFEC2064C)
#define EXT_OPM_4D_F_M2_DT1_MUL ((uint8_t*) 0xFEC2064D)
#define EXT_OPM_4E_G_M2_DT1_MUL ((uint8_t*) 0xFEC2064E)
#define EXT_OPM_4F_H_M2_DT1_MUL ((uint8_t*) 0xFEC2064F)
#define EXT_OPM_50_A_C1_DT1_MUL ((uint8_t*) 0xFEC20650)
#define EXT_OPM_51_B_C1_DT1_MUL ((uint8_t*) 0xFEC20651)
#define EXT_OPM_52_C_C1_DT1_MUL ((uint8_t*) 0xFEC20652)
#define EXT_OPM_53_D_C1_DT1_MUL ((uint8_t*) 0xFEC20653)
#define EXT_OPM_54_E_C1_DT1_MUL ((uint8_t*) 0xFEC20654)
#define EXT_OPM_55_F_C1_DT1_MUL ((uint8_t*) 0xFEC20655)
#define EXT_OPM_56_G_C1_DT1_MUL ((uint8_t*) 0xFEC20656)
#define EXT_OPM_57_H_C1_DT1_MUL ((uint8_t*) 0xFEC20657)
#define EXT_OPM_58_A_C2_DT1_MUL ((uint8_t*) 0xFEC20658)
#define EXT_OPM_59_B_C2_DT1_MUL ((uint8_t*) 0xFEC20659)
#define EXT_OPM_5A_C_C2_DT1_MUL ((uint8_t*) 0xFEC2065A)
#define EXT_OPM_5B_D_C2_DT1_MUL ((uint8_t*) 0xFEC2065B)
#define EXT_OPM_5C_E_C2_DT1_MUL ((uint8_t*) 0xFEC2065C)
#define EXT_OPM_5D_F_C2_DT1_MUL ((uint8_t*) 0xFEC2065D)
#define EXT_OPM_5E_G_C2_DT1_MUL ((uint8_t*) 0xFEC2065E)
#define EXT_OPM_5F_H_C2_DT1_MUL ((uint8_t*) 0xFEC2065F)
#define EXT_OPM_60_A_M1_TL ((uint8_t*) 0xFEC20660)
#define EXT_OPM_61_B_M1_TL ((uint8_t*) 0xFEC20661)
#define EXT_OPM_62_C_M1_TL ((uint8_t*) 0xFEC20662)
#define EXT_OPM_63_D_M1_TL ((uint8_t*) 0xFEC20663)
#define EXT_OPM_64_E_M1_TL ((uint8_t*) 0xFEC20664)
#define EXT_OPM_65_F_M1_TL ((uint8_t*) 0xFEC20665)
#define EXT_OPM_66_G_M1_TL ((uint8_t*) 0xFEC20666)
#define EXT_OPM_67_H_M1_TL ((uint8_t*) 0xFEC20667)
#define EXT_OPM_68_A_M2_TL ((uint8_t*) 0xFEC20668)
#define EXT_OPM_69_B_M2_TL ((uint8_t*) 0xFEC20669)
#define EXT_OPM_6A_C_M2_TL ((uint8_t*) 0xFEC2066A)
#define EXT_OPM_6B_D_M2_TL ((uint8_t*) 0xFEC2066B)
#define EXT_OPM_6C_E_M2_TL ((uint8_t*) 0xFEC2066C)
#define EXT_OPM_6D_F_M2_TL ((uint8_t*) 0xFEC2066D)
#define EXT_OPM_6E_G_M2_TL ((uint8_t*) 0xFEC2066E)
#define EXT_OPM_6F_H_M2_TL ((uint8_t*) 0xFEC2066F)
#define EXT_OPM_70_A_C1_TL ((uint8_t*) 0xFEC20670)
#define EXT_OPM_71_B_C1_TL ((uint8_t*) 0xFEC20671)
#define EXT_OPM_72_C_C1_TL ((uint8_t*) 0xFEC20672)
#define EXT_OPM_73_D_C1_TL ((uint8_t*) 0xFEC20673)
#define EXT_OPM_74_E_C1_TL ((uint8_t*) 0xFEC20674)
#define EXT_OPM_75_F_C1_TL ((uint8_t*) 0xFEC20675)
#define EXT_OPM_76_G_C1_TL ((uint8_t*) 0xFEC20676)
#define EXT_OPM_77_H_C1_TL ((uint8_t*) 0xFEC20677)
#define EXT_OPM_78_A_C2_TL ((uint8_t*) 0xFEC20678)
#define EXT_OPM_79_B_C2_TL ((uint8_t*) 0xFEC20679)
#define EXT_OPM_7A_C_C2_TL ((uint8_t*) 0xFEC2067A)
#define EXT_OPM_7B_D_C2_TL ((uint8_t*) 0xFEC2067B)
#define EXT_OPM_7C_E_C2_TL ((uint8_t*) 0xFEC2067C)
#define EXT_OPM_7D_F_C2_TL ((uint8_t*) 0xFEC2067D)
#define EXT_OPM_7E_G_C2_TL ((uint8_t*) 0xFEC2067E)
#define EXT_OPM_7F_H_C2_TL ((uint8_t*) 0xFEC2067F)
#define EXT_OPM_80_A_M1_KS_AR ((uint8_t*) 0xFEC20680)
#define EXT_OPM_81_B_M1_KS_AR ((uint8_t*) 0xFEC20681)
#define EXT_OPM_82_C_M1_KS_AR ((uint8_t*) 0xFEC20682)
#define EXT_OPM_83_D_M1_KS_AR ((uint8_t*) 0xFEC20683)
#define EXT_OPM_84_E_M1_KS_AR ((uint8_t*) 0xFEC20684)
#define EXT_OPM_85_F_M1_KS_AR ((uint8_t*) 0xFEC20685)
#define EXT_OPM_86_G_M1_KS_AR ((uint8_t*) 0xFEC20686)
#define EXT_OPM_87_H_M1_KS_AR ((uint8_t*) 0xFEC20687)
#define EXT_OPM_88_A_M2_KS_AR ((uint8_t*) 0xFEC20688)
#define EXT_OPM_89_B_M2_KS_AR ((uint8_t*) 0xFEC20689)
#define EXT_OPM_8A_C_M2_KS_AR ((uint8_t*) 0xFEC2068A)
#define EXT_OPM_8B_D_M2_KS_AR ((uint8_t*) 0xFEC2068B)
#define EXT_OPM_8C_E_M2_KS_AR ((uint8_t*) 0xFEC2068C)
#define EXT_OPM_8D_F_M2_KS_AR ((uint8_t*) 0xFEC2068D)
#define EXT_OPM_8E_G_M2_KS_AR ((uint8_t*) 0xFEC2068E)
#define EXT_OPM_8F_H_M2_KS_AR ((uint8_t*) 0xFEC2068F)
#define EXT_OPM_90_A_C1_KS_AR ((uint8_t*) 0xFEC20690)
#define EXT_OPM_91_B_C1_KS_AR ((uint8_t*) 0xFEC20691)
#define EXT_OPM_92_C_C1_KS_AR ((uint8_t*) 0xFEC20692)
#define EXT_OPM_93_D_C1_KS_AR ((uint8_t*) 0xFEC20693)
#define EXT_OPM_94_E_C1_KS_AR ((uint8_t*) 0xFEC20694)
#define EXT_OPM_95_F_C1_KS_AR ((uint8_t*) 0xFEC20695)
#define EXT_OPM_96_G_C1_KS_AR ((uint8_t*) 0xFEC20696)
#define EXT_OPM_97_H_C1_KS_AR ((uint8_t*) 0xFEC20697)
#define EXT_OPM_98_A_C2_KS_AR ((uint8_t*) 0xFEC20698)
#define EXT_OPM_99_B_C2_KS_AR ((uint8_t*) 0xFEC20699)
#define EXT_OPM_9A_C_C2_KS_AR ((uint8_t*) 0xFEC2069A)
#define EXT_OPM_9B_D_C2_KS_AR ((uint8_t*) 0xFEC2069B)
#define EXT_OPM_9C_E_C2_KS_AR ((uint8_t*) 0xFEC2069C)
#define EXT_OPM_9D_F_C2_KS_AR ((uint8_t*) 0xFEC2069D)
#define EXT_OPM_9E_G_C2_KS_AR ((uint8_t*) 0xFEC2069E)
#define EXT_OPM_9F_H_C2_KS_AR ((uint8_t*) 0xFEC2069F)
#define EXT_OPM_A0_A_M1_AMS_EN_D1R ((uint8_t*) 0xFEC206A0)
#define EXT_OPM_A1_B_M1_AMS_EN_D1R ((uint8_t*) 0xFEC206A1)
#define EXT_OPM_A2_C_M1_AMS_EN_D1R ((uint8_t*) 0xFEC206A2)
#define EXT_OPM_A3_D_M1_AMS_EN_D1R ((uint8_t*) 0xFEC206A3)
#define EXT_OPM_A4_E_M1_AMS_EN_D1R ((uint8_t*) 0xFEC206A4)
#define EXT_OPM_A5_F_M1_AMS_EN_D1R ((uint8_t*) 0xFEC206A5)
#define EXT_OPM_A6_G_M1_AMS_EN_D1R ((uint8_t*) 0xFEC206A6)
#define EXT_OPM_A7_H_M1_AMS_EN_D1R ((uint8_t*) 0xFEC206A7)
#define EXT_OPM_A8_A_M2_AMS_EN_D1R ((uint8_t*) 0xFEC206A8)
#define EXT_OPM_A9_B_M2_AMS_EN_D1R ((uint8_t*) 0xFEC206A9)
#define EXT_OPM_AA_C_M2_AMS_EN_D1R ((uint8_t*) 0xFEC206AA)
#define EXT_OPM_AB_D_M2_AMS_EN_D1R ((uint8_t*) 0xFEC206AB)
#define EXT_OPM_AC_E_M2_AMS_EN_D1R ((uint8_t*) 0xFEC206AC)
#define EXT_OPM_AD_F_M2_AMS_EN_D1R ((uint8_t*) 0xFEC206AD)
#define EXT_OPM_AE_G_M2_AMS_EN_D1R ((uint8_t*) 0xFEC206AE)
#define EXT_OPM_AF_H_M2_AMS_EN_D1R ((uint8_t*) 0xFEC206AF)
#define EXT_OPM_B0_A_C1_AMS_EN_D1R ((uint8_t*) 0xFEC206B0)
#define EXT_OPM_B1_B_C1_AMS_EN_D1R ((uint8_t*) 0xFEC206B1)
#define EXT_OPM_B2_C_C1_AMS_EN_D1R ((uint8_t*) 0xFEC206B2)
#define EXT_OPM_B3_D_C1_AMS_EN_D1R ((uint8_t*) 0xFEC206B3)
#define EXT_OPM_B4_E_C1_AMS_EN_D1R ((uint8_t*) 0xFEC206B4)
#define EXT_OPM_B5_F_C1_AMS_EN_D1R ((uint8_t*) 0xFEC206B5)
#define EXT_OPM_B6_G_C1_AMS_EN_D1R ((uint8_t*) 0xFEC206B6)
#define EXT_OPM_B7_H_C1_AMS_EN_D1R ((uint8_t*) 0xFEC206B7)
#define EXT_OPM_B8_A_C2_AMS_EN_D1R ((uint8_t*) 0xFEC206B8)
#define EXT_OPM_B9_B_C2_AMS_EN_D1R ((uint8_t*) 0xFEC206B9)
#define EXT_OPM_BA_C_C2_AMS_EN_D1R ((uint8_t*) 0xFEC206BA)
#define EXT_OPM_BB_D_C2_AMS_EN_D1R ((uint8_t*) 0xFEC206BB)
#define EXT_OPM_BC_E_C2_AMS_EN_D1R ((uint8_t*) 0xFEC206BC)
#define EXT_OPM_BD_F_C2_AMS_EN_D1R ((uint8_t*) 0xFEC206BD)
#define EXT_OPM_BE_G_C2_AMS_EN_D1R ((uint8_t*) 0xFEC206BE)
#define EXT_OPM_BF_H_C2_AMS_EN_D1R ((uint8_t*) 0xFEC206BF)
#define EXT_OPM_C0_A_M1_DT2_D2R ((uint8_t*) 0xFEC206C0)
#define EXT_OPM_C1_B_M1_DT2_D2R ((uint8_t*) 0xFEC206C1)
#define EXT_OPM_C2_C_M1_DT2_D2R ((uint8_t*) 0xFEC206C2)
#define EXT_OPM_C3_D_M1_DT2_D2R ((uint8_t*) 0xFEC206C3)
#define EXT_OPM_C4_E_M1_DT2_D2R ((uint8_t*) 0xFEC206C4)
#define EXT_OPM_C5_F_M1_DT2_D2R ((uint8_t*) 0xFEC206C5)
#define EXT_OPM_C6_G_M1_DT2_D2R ((uint8_t*) 0xFEC206C6)
#define EXT_OPM_C7_H_M1_DT2_D2R ((uint8_t*) 0xFEC206C7)
#define EXT_OPM_C8_A_M2_DT2_D2R ((uint8_t*) 0xFEC206C8)
#define EXT_OPM_C9_B_M2_DT2_D2R ((uint8_t*) 0xFEC206C9)
#define EXT_OPM_CA_C_M2_DT2_D2R ((uint8_t*) 0xFEC206CA)
#define EXT_OPM_CB_D_M2_DT2_D2R ((uint8_t*) 0xFEC206CB)
#define EXT_OPM_CC_E_M2_DT2_D2R ((uint8_t*) 0xFEC206CC)
#define EXT_OPM_CD_F_M2_DT2_D2R ((uint8_t*) 0xFEC206CD)
#define EXT_OPM_CE_G_M2_DT2_D2R ((uint8_t*) 0xFEC206CE)
#define EXT_OPM_CF_H_M2_DT2_D2R ((uint8_t*) 0xFEC206CF)
#define EXT_OPM_D0_A_C1_DT2_D2R ((uint8_t*) 0xFEC206D0)
#define EXT_OPM_D1_B_C1_DT2_D2R ((uint8_t*) 0xFEC206D1)
#define EXT_OPM_D2_C_C1_DT2_D2R ((uint8_t*) 0xFEC206D2)
#define EXT_OPM_D3_D_C1_DT2_D2R ((uint8_t*) 0xFEC206D3)
#define EXT_OPM_D4_E_C1_DT2_D2R ((uint8_t*) 0xFEC206D4)
#define EXT_OPM_D5_F_C1_DT2_D2R ((uint8_t*) 0xFEC206D5)
#define EXT_OPM_D6_G_C1_DT2_D2R ((uint8_t*) 0xFEC206D6)
#define EXT_OPM_D7_H_C1_DT2_D2R ((uint8_t*) 0xFEC206D7)
#define EXT_OPM_D8_A_C2_DT2_D2R ((uint8_t*) 0xFEC206D8)
#define EXT_OPM_D9_B_C2_DT2_D2R ((uint8_t*) 0xFEC206D9)
#define EXT_OPM_DA_C_C2_DT2_D2R ((uint8_t*) 0xFEC206DA)
#define EXT_OPM_DB_D_C2_DT2_D2R ((uint8_t*) 0xFEC206DB)
#define EXT_OPM_DC_E_C2_DT2_D2R ((uint8_t*) 0xFEC206DC)
#define EXT_OPM_DD_F_C2_DT2_D2R ((uint8_t*) 0xFEC206DD)
#define EXT_OPM_DE_G_C2_DT2_D2R ((uint8_t*) 0xFEC206DE)
#define EXT_OPM_DF_H_C2_DT2_D2R ((uint8_t*) 0xFEC206DF)
#define EXT_OPM_E0_A_M1_D1L_RR ((uint8_t*) 0xFEC206E0)
#define EXT_OPM_E1_B_M1_D1L_RR ((uint8_t*) 0xFEC206E1)
#define EXT_OPM_E2_C_M1_D1L_RR ((uint8_t*) 0xFEC206E2)
#define EXT_OPM_E3_D_M1_D1L_RR ((uint8_t*) 0xFEC206E3)
#define EXT_OPM_E4_E_M1_D1L_RR ((uint8_t*) 0xFEC206E4)
#define EXT_OPM_E5_F_M1_D1L_RR ((uint8_t*) 0xFEC206E5)
#define EXT_OPM_E6_G_M1_D1L_RR ((uint8_t*) 0xFEC206E6)
#define EXT_OPM_E7_H_M1_D1L_RR ((uint8_t*) 0xFEC206E7)
#define EXT_OPM_E8_A_M2_D1L_RR ((uint8_t*) 0xFEC206E8)
#define EXT_OPM_E9_B_M2_D1L_RR ((uint8_t*) 0xFEC206E9)
#define EXT_OPM_EA_C_M2_D1L_RR ((uint8_t*) 0xFEC206EA)
#define EXT_OPM_EB_D_M2_D1L_RR ((uint8_t*) 0xFEC206EB)
#define EXT_OPM_EC_E_M2_D1L_RR ((uint8_t*) 0xFEC206EC)
#define EXT_OPM_ED_F_M2_D1L_RR ((uint8_t*) 0xFEC206ED)
#define EXT_OPM_EE_G_M2_D1L_RR ((uint8_t*) 0xFEC206EE)
#define EXT_OPM_EF_H_M2_D1L_RR ((uint8_t*) 0xFEC206EF)
#define EXT_OPM_F0_A_C1_D1L_RR ((uint8_t*) 0xFEC206F0)
#define EXT_OPM_F1_B_C1_D1L_RR ((uint8_t*) 0xFEC206F1)
#define EXT_OPM_F2_C_C1_D1L_RR ((uint8_t*) 0xFEC206F2)
#define EXT_OPM_F3_D_C1_D1L_RR ((uint8_t*) 0xFEC206F3)
#define EXT_OPM_F4_E_C1_D1L_RR ((uint8_t*) 0xFEC206F4)
#define EXT_OPM_F5_F_C1_D1L_RR ((uint8_t*) 0xFEC206F5)
#define EXT_OPM_F6_G_C1_D1L_RR ((uint8_t*) 0xFEC206F6)
#define EXT_OPM_F7_H_C1_D1L_RR ((uint8_t*) 0xFEC206F7)
#define EXT_OPM_F8_A_C2_D1L_RR ((uint8_t*) 0xFEC206F8)
#define EXT_OPM_F9_B_C2_D1L_RR ((uint8_t*) 0xFEC206F9)
#define EXT_OPM_FA_C_C2_D1L_RR ((uint8_t*) 0xFEC206FA)
#define EXT_OPM_FB_D_C2_D1L_RR ((uint8_t*) 0xFEC206FB)
#define EXT_OPM_FC_E_C2_D1L_RR ((uint8_t*) 0xFEC206FC)
#define EXT_OPM_FD_F_C2_D1L_RR ((uint8_t*) 0xFEC206FD)
#define EXT_OPM_FE_G_C2_D1L_RR ((uint8_t*) 0xFEC206FE)
#define EXT_OPM_FF_H_C2_D1L_RR ((uint8_t*) 0xFEC206FF)
///////////////////////////////////////////////////
// Internal OPM 0xFEC20C00
unsigned char * INT_OPM_01_TEST = (void *) 0xFEC20C01;
unsigned char * INT_OPM_08_KEY_ON_OFF = (void *) 0xFEC20C08;
unsigned char * INT_OPM_0F_NE_NFREQ = (void *) 0xFEC20C0F;
unsigned char * INT_OPM_10_CLK_A1 = (void *) 0xFEC20C10;
unsigned char * INT_OPM_11_CLK_A2 = (void *) 0xFEC20C11;
unsigned char * INT_OPM_12_CLK_B = (void *) 0xFEC20C12;
unsigned char * INT_OPM_14_CMS_FLAG_RST_IRQEN_LD = (void *) 0xFEC20C14;
unsigned char * INT_OPM_18_LFRQ = (void *) 0xFEC20C18;
unsigned char * INT_OPM_19_PMD_AMD = (void *) 0xFEC20C19;
unsigned char * INT_OPM_1B_CT_W = (void *) 0xFEC20C1B;
#define INT_OPM_01_TEST ((uint8_t*) 0xFEC20C01)
#define INT_OPM_08_KEY_ON_OFF ((uint8_t*) 0xFEC20C08)
#define INT_OPM_0F_NE_NFREQ ((uint8_t*) 0xFEC20C0F)
#define INT_OPM_10_CLK_A1 ((uint8_t*) 0xFEC20C10)
#define INT_OPM_11_CLK_A2 ((uint8_t*) 0xFEC20C11)
#define INT_OPM_12_CLK_B ((uint8_t*) 0xFEC20C12)
#define INT_OPM_14_CMS_FLAG_RST_IRQEN_LD ((uint8_t*) 0xFEC20C14)
#define INT_OPM_18_LFRQ ((uint8_t*) 0xFEC20C18)
#define INT_OPM_19_PMD_AMD ((uint8_t*) 0xFEC20C19)
#define INT_OPM_1B_CT_W ((uint8_t*) 0xFEC20C1B)
unsigned char * INT_OPM_20_A_RL_FR_CONNECT = (void *) 0xFEC20C20;
unsigned char * INT_OPM_21_B_RL_FR_CONNECT = (void *) 0xFEC20C21;
unsigned char * INT_OPM_22_C_RL_FR_CONNECT = (void *) 0xFEC20C22;
unsigned char * INT_OPM_23_D_RL_FR_CONNECT = (void *) 0xFEC20C23;
unsigned char * INT_OPM_24_E_RL_FR_CONNECT = (void *) 0xFEC20C24;
unsigned char * INT_OPM_25_F_RL_FR_CONNECT = (void *) 0xFEC20C25;
unsigned char * INT_OPM_26_G_RL_FR_CONNECT = (void *) 0xFEC20C26;
unsigned char * INT_OPM_27_H_RL_FR_CONNECT = (void *) 0xFEC20C27;
unsigned char * INT_OPM_28_A_KC = (void *) 0xFEC20C28;
unsigned char * INT_OPM_29_B_KC = (void *) 0xFEC20C29;
unsigned char * INT_OPM_2A_C_KC = (void *) 0xFEC20C2A;
unsigned char * INT_OPM_2B_D_KC = (void *) 0xFEC20C2B;
unsigned char * INT_OPM_2C_E_KC = (void *) 0xFEC20C2C;
unsigned char * INT_OPM_2D_F_KC = (void *) 0xFEC20C2D;
unsigned char * INT_OPM_2E_G_KC = (void *) 0xFEC20C2E;
unsigned char * INT_OPM_2F_H_KC = (void *) 0xFEC20C2F;
#define INT_OPM_20_A_RL_FR_CONNECT ((uint8_t*) 0xFEC20C20)
#define INT_OPM_21_B_RL_FR_CONNECT ((uint8_t*) 0xFEC20C21)
#define INT_OPM_22_C_RL_FR_CONNECT ((uint8_t*) 0xFEC20C22)
#define INT_OPM_23_D_RL_FR_CONNECT ((uint8_t*) 0xFEC20C23)
#define INT_OPM_24_E_RL_FR_CONNECT ((uint8_t*) 0xFEC20C24)
#define INT_OPM_25_F_RL_FR_CONNECT ((uint8_t*) 0xFEC20C25)
#define INT_OPM_26_G_RL_FR_CONNECT ((uint8_t*) 0xFEC20C26)
#define INT_OPM_27_H_RL_FR_CONNECT ((uint8_t*) 0xFEC20C27)
#define INT_OPM_28_A_KC ((uint8_t*) 0xFEC20C28)
#define INT_OPM_29_B_KC ((uint8_t*) 0xFEC20C29)
#define INT_OPM_2A_C_KC ((uint8_t*) 0xFEC20C2A)
#define INT_OPM_2B_D_KC ((uint8_t*) 0xFEC20C2B)
#define INT_OPM_2C_E_KC ((uint8_t*) 0xFEC20C2C)
#define INT_OPM_2D_F_KC ((uint8_t*) 0xFEC20C2D)
#define INT_OPM_2E_G_KC ((uint8_t*) 0xFEC20C2E)
#define INT_OPM_2F_H_KC ((uint8_t*) 0xFEC20C2F)
unsigned char * INT_OPM_30_A_KF = (void *) 0xFEC20C30;
unsigned char * INT_OPM_31_B_KF = (void *) 0xFEC20C31;
unsigned char * INT_OPM_32_C_KF = (void *) 0xFEC20C32;
unsigned char * INT_OPM_33_D_KF = (void *) 0xFEC20C33;
unsigned char * INT_OPM_34_E_KF = (void *) 0xFEC20C34;
unsigned char * INT_OPM_35_F_KF = (void *) 0xFEC20C35;
unsigned char * INT_OPM_36_G_KF = (void *) 0xFEC20C36;
unsigned char * INT_OPM_37_H_KF = (void *) 0xFEC20C37;
unsigned char * INT_OPM_38_A_PMS_AMS = (void *) 0xFEC20C38;
unsigned char * INT_OPM_39_B_PMS_AMS = (void *) 0xFEC20C39;
unsigned char * INT_OPM_3A_C_PMS_AMS = (void *) 0xFEC20C3A;
unsigned char * INT_OPM_3B_D_PMS_AMS = (void *) 0xFEC20C3B;
unsigned char * INT_OPM_3C_E_PMS_AMS = (void *) 0xFEC20C3C;
unsigned char * INT_OPM_3D_F_PMS_AMS = (void *) 0xFEC20C3D;
unsigned char * INT_OPM_3E_G_PMS_AMS = (void *) 0xFEC20C3E;
unsigned char * INT_OPM_3F_H_PMS_AMS = (void *) 0xFEC20C3F;
#define INT_OPM_30_A_KF ((uint8_t*) 0xFEC20C30)
#define INT_OPM_31_B_KF ((uint8_t*) 0xFEC20C31)
#define INT_OPM_32_C_KF ((uint8_t*) 0xFEC20C32)
#define INT_OPM_33_D_KF ((uint8_t*) 0xFEC20C33)
#define INT_OPM_34_E_KF ((uint8_t*) 0xFEC20C34)
#define INT_OPM_35_F_KF ((uint8_t*) 0xFEC20C35)
#define INT_OPM_36_G_KF ((uint8_t*) 0xFEC20C36)
#define INT_OPM_37_H_KF ((uint8_t*) 0xFEC20C37)
#define INT_OPM_38_A_PMS_AMS ((uint8_t*) 0xFEC20C38)
#define INT_OPM_39_B_PMS_AMS ((uint8_t*) 0xFEC20C39)
#define INT_OPM_3A_C_PMS_AMS ((uint8_t*) 0xFEC20C3A)
#define INT_OPM_3B_D_PMS_AMS ((uint8_t*) 0xFEC20C3B)
#define INT_OPM_3C_E_PMS_AMS ((uint8_t*) 0xFEC20C3C)
#define INT_OPM_3D_F_PMS_AMS ((uint8_t*) 0xFEC20C3D)
#define INT_OPM_3E_G_PMS_AMS ((uint8_t*) 0xFEC20C3E)
#define INT_OPM_3F_H_PMS_AMS ((uint8_t*) 0xFEC20C3F)
unsigned char * INT_OPM_40_A_M1_DT1_MUL = (void *) 0xFEC20C40;
unsigned char * INT_OPM_41_B_M1_DT1_MUL = (void *) 0xFEC20C41;
unsigned char * INT_OPM_42_C_M1_DT1_MUL = (void *) 0xFEC20C42;
unsigned char * INT_OPM_43_D_M1_DT1_MUL = (void *) 0xFEC20C43;
unsigned char * INT_OPM_44_E_M1_DT1_MUL = (void *) 0xFEC20C44;
unsigned char * INT_OPM_45_F_M1_DT1_MUL = (void *) 0xFEC20C45;
unsigned char * INT_OPM_46_G_M1_DT1_MUL = (void *) 0xFEC20C46;
unsigned char * INT_OPM_47_H_M1_DT1_MUL = (void *) 0xFEC20C47;
unsigned char * INT_OPM_48_A_M2_DT1_MUL = (void *) 0xFEC20C48;
unsigned char * INT_OPM_49_B_M2_DT1_MUL = (void *) 0xFEC20C49;
unsigned char * INT_OPM_4A_C_M2_DT1_MUL = (void *) 0xFEC20C4A;
unsigned char * INT_OPM_4B_D_M2_DT1_MUL = (void *) 0xFEC20C4B;
unsigned char * INT_OPM_4C_E_M2_DT1_MUL = (void *) 0xFEC20C4C;
unsigned char * INT_OPM_4D_F_M2_DT1_MUL = (void *) 0xFEC20C4D;
unsigned char * INT_OPM_4E_G_M2_DT1_MUL = (void *) 0xFEC20C4E;
unsigned char * INT_OPM_4F_H_M2_DT1_MUL = (void *) 0xFEC20C4F;
#define INT_OPM_40_A_M1_DT1_MUL ((uint8_t*) 0xFEC20C40)
#define INT_OPM_41_B_M1_DT1_MUL ((uint8_t*) 0xFEC20C41)
#define INT_OPM_42_C_M1_DT1_MUL ((uint8_t*) 0xFEC20C42)
#define INT_OPM_43_D_M1_DT1_MUL ((uint8_t*) 0xFEC20C43)
#define INT_OPM_44_E_M1_DT1_MUL ((uint8_t*) 0xFEC20C44)
#define INT_OPM_45_F_M1_DT1_MUL ((uint8_t*) 0xFEC20C45)
#define INT_OPM_46_G_M1_DT1_MUL ((uint8_t*) 0xFEC20C46)
#define INT_OPM_47_H_M1_DT1_MUL ((uint8_t*) 0xFEC20C47)
#define INT_OPM_48_A_M2_DT1_MUL ((uint8_t*) 0xFEC20C48)
#define INT_OPM_49_B_M2_DT1_MUL ((uint8_t*) 0xFEC20C49)
#define INT_OPM_4A_C_M2_DT1_MUL ((uint8_t*) 0xFEC20C4A)
#define INT_OPM_4B_D_M2_DT1_MUL ((uint8_t*) 0xFEC20C4B)
#define INT_OPM_4C_E_M2_DT1_MUL ((uint8_t*) 0xFEC20C4C)
#define INT_OPM_4D_F_M2_DT1_MUL ((uint8_t*) 0xFEC20C4D)
#define INT_OPM_4E_G_M2_DT1_MUL ((uint8_t*) 0xFEC20C4E)
#define INT_OPM_4F_H_M2_DT1_MUL ((uint8_t*) 0xFEC20C4F)
unsigned char * INT_OPM_50_A_C1_DT1_MUL = (void *) 0xFEC20C50;
unsigned char * INT_OPM_51_B_C1_DT1_MUL = (void *) 0xFEC20C51;
unsigned char * INT_OPM_52_C_C1_DT1_MUL = (void *) 0xFEC20C52;
unsigned char * INT_OPM_53_D_C1_DT1_MUL = (void *) 0xFEC20C53;
unsigned char * INT_OPM_54_E_C1_DT1_MUL = (void *) 0xFEC20C54;
unsigned char * INT_OPM_55_F_C1_DT1_MUL = (void *) 0xFEC20C55;
unsigned char * INT_OPM_56_G_C1_DT1_MUL = (void *) 0xFEC20C56;
unsigned char * INT_OPM_57_H_C1_DT1_MUL = (void *) 0xFEC20C57;
unsigned char * INT_OPM_58_A_C2_DT1_MUL = (void *) 0xFEC20C58;
unsigned char * INT_OPM_59_B_C2_DT1_MUL = (void *) 0xFEC20C59;
unsigned char * INT_OPM_5A_C_C2_DT1_MUL = (void *) 0xFEC20C5A;
unsigned char * INT_OPM_5B_D_C2_DT1_MUL = (void *) 0xFEC20C5B;
unsigned char * INT_OPM_5C_E_C2_DT1_MUL = (void *) 0xFEC20C5C;
unsigned char * INT_OPM_5D_F_C2_DT1_MUL = (void *) 0xFEC20C5D;
unsigned char * INT_OPM_5E_G_C2_DT1_MUL = (void *) 0xFEC20C5E;
unsigned char * INT_OPM_5F_H_C2_DT1_MUL = (void *) 0xFEC20C5F;
#define INT_OPM_50_A_C1_DT1_MUL ((uint8_t*) 0xFEC20C50)
#define INT_OPM_51_B_C1_DT1_MUL ((uint8_t*) 0xFEC20C51)
#define INT_OPM_52_C_C1_DT1_MUL ((uint8_t*) 0xFEC20C52)
#define INT_OPM_53_D_C1_DT1_MUL ((uint8_t*) 0xFEC20C53)
#define INT_OPM_54_E_C1_DT1_MUL ((uint8_t*) 0xFEC20C54)
#define INT_OPM_55_F_C1_DT1_MUL ((uint8_t*) 0xFEC20C55)
#define INT_OPM_56_G_C1_DT1_MUL ((uint8_t*) 0xFEC20C56)
#define INT_OPM_57_H_C1_DT1_MUL ((uint8_t*) 0xFEC20C57)
#define INT_OPM_58_A_C2_DT1_MUL ((uint8_t*) 0xFEC20C58)
#define INT_OPM_59_B_C2_DT1_MUL ((uint8_t*) 0xFEC20C59)
#define INT_OPM_5A_C_C2_DT1_MUL ((uint8_t*) 0xFEC20C5A)
#define INT_OPM_5B_D_C2_DT1_MUL ((uint8_t*) 0xFEC20C5B)
#define INT_OPM_5C_E_C2_DT1_MUL ((uint8_t*) 0xFEC20C5C)
#define INT_OPM_5D_F_C2_DT1_MUL ((uint8_t*) 0xFEC20C5D)
#define INT_OPM_5E_G_C2_DT1_MUL ((uint8_t*) 0xFEC20C5E)
#define INT_OPM_5F_H_C2_DT1_MUL ((uint8_t*) 0xFEC20C5F)
unsigned char * INT_OPM_60_A_M1_TL = (void *) 0xFEC20C60;
unsigned char * INT_OPM_61_B_M1_TL = (void *) 0xFEC20C61;
unsigned char * INT_OPM_62_C_M1_TL = (void *) 0xFEC20C62;
unsigned char * INT_OPM_63_D_M1_TL = (void *) 0xFEC20C63;
unsigned char * INT_OPM_64_E_M1_TL = (void *) 0xFEC20C64;
unsigned char * INT_OPM_65_F_M1_TL = (void *) 0xFEC20C65;
unsigned char * INT_OPM_66_G_M1_TL = (void *) 0xFEC20C66;
unsigned char * INT_OPM_67_H_M1_TL = (void *) 0xFEC20C67;
unsigned char * INT_OPM_68_A_M2_TL = (void *) 0xFEC20C68;
unsigned char * INT_OPM_69_B_M2_TL = (void *) 0xFEC20C69;
unsigned char * INT_OPM_6A_C_M2_TL = (void *) 0xFEC20C6A;
unsigned char * INT_OPM_6B_D_M2_TL = (void *) 0xFEC20C6B;
unsigned char * INT_OPM_6C_E_M2_TL = (void *) 0xFEC20C6C;
unsigned char * INT_OPM_6D_F_M2_TL = (void *) 0xFEC20C6D;
unsigned char * INT_OPM_6E_G_M2_TL = (void *) 0xFEC20C6E;
unsigned char * INT_OPM_6F_H_M2_TL = (void *) 0xFEC20C6F;
#define INT_OPM_60_A_M1_TL ((uint8_t*) 0xFEC20C60)
#define INT_OPM_61_B_M1_TL ((uint8_t*) 0xFEC20C61)
#define INT_OPM_62_C_M1_TL ((uint8_t*) 0xFEC20C62)
#define INT_OPM_63_D_M1_TL ((uint8_t*) 0xFEC20C63)
#define INT_OPM_64_E_M1_TL ((uint8_t*) 0xFEC20C64)
#define INT_OPM_65_F_M1_TL ((uint8_t*) 0xFEC20C65)
#define INT_OPM_66_G_M1_TL ((uint8_t*) 0xFEC20C66)
#define INT_OPM_67_H_M1_TL ((uint8_t*) 0xFEC20C67)
#define INT_OPM_68_A_M2_TL ((uint8_t*) 0xFEC20C68)
#define INT_OPM_69_B_M2_TL ((uint8_t*) 0xFEC20C69)
#define INT_OPM_6A_C_M2_TL ((uint8_t*) 0xFEC20C6A)
#define INT_OPM_6B_D_M2_TL ((uint8_t*) 0xFEC20C6B)
#define INT_OPM_6C_E_M2_TL ((uint8_t*) 0xFEC20C6C)
#define INT_OPM_6D_F_M2_TL ((uint8_t*) 0xFEC20C6D)
#define INT_OPM_6E_G_M2_TL ((uint8_t*) 0xFEC20C6E)
#define INT_OPM_6F_H_M2_TL ((uint8_t*) 0xFEC20C6F)
unsigned char * INT_OPM_70_A_C1_TL = (void *) 0xFEC20C70;
unsigned char * INT_OPM_71_B_C1_TL = (void *) 0xFEC20C71;
unsigned char * INT_OPM_72_C_C1_TL = (void *) 0xFEC20C72;
unsigned char * INT_OPM_73_D_C1_TL = (void *) 0xFEC20C73;
unsigned char * INT_OPM_74_E_C1_TL = (void *) 0xFEC20C74;
unsigned char * INT_OPM_75_F_C1_TL = (void *) 0xFEC20C75;
unsigned char * INT_OPM_76_G_C1_TL = (void *) 0xFEC20C76;
unsigned char * INT_OPM_77_H_C1_TL = (void *) 0xFEC20C77;
unsigned char * INT_OPM_78_A_C2_TL = (void *) 0xFEC20C78;
unsigned char * INT_OPM_79_B_C2_TL = (void *) 0xFEC20C79;
unsigned char * INT_OPM_7A_C_C2_TL = (void *) 0xFEC20C7A;
unsigned char * INT_OPM_7B_D_C2_TL = (void *) 0xFEC20C7B;
unsigned char * INT_OPM_7C_E_C2_TL = (void *) 0xFEC20C7C;
unsigned char * INT_OPM_7D_F_C2_TL = (void *) 0xFEC20C7D;
unsigned char * INT_OPM_7E_G_C2_TL = (void *) 0xFEC20C7E;
unsigned char * INT_OPM_7F_H_C2_TL = (void *) 0xFEC20C7F;
#define INT_OPM_70_A_C1_TL ((uint8_t*) 0xFEC20C70)
#define INT_OPM_71_B_C1_TL ((uint8_t*) 0xFEC20C71)
#define INT_OPM_72_C_C1_TL ((uint8_t*) 0xFEC20C72)
#define INT_OPM_73_D_C1_TL ((uint8_t*) 0xFEC20C73)
#define INT_OPM_74_E_C1_TL ((uint8_t*) 0xFEC20C74)
#define INT_OPM_75_F_C1_TL ((uint8_t*) 0xFEC20C75)
#define INT_OPM_76_G_C1_TL ((uint8_t*) 0xFEC20C76)
#define INT_OPM_77_H_C1_TL ((uint8_t*) 0xFEC20C77)
#define INT_OPM_78_A_C2_TL ((uint8_t*) 0xFEC20C78)
#define INT_OPM_79_B_C2_TL ((uint8_t*) 0xFEC20C79)
#define INT_OPM_7A_C_C2_TL ((uint8_t*) 0xFEC20C7A)
#define INT_OPM_7B_D_C2_TL ((uint8_t*) 0xFEC20C7B)
#define INT_OPM_7C_E_C2_TL ((uint8_t*) 0xFEC20C7C)
#define INT_OPM_7D_F_C2_TL ((uint8_t*) 0xFEC20C7D)
#define INT_OPM_7E_G_C2_TL ((uint8_t*) 0xFEC20C7E)
#define INT_OPM_7F_H_C2_TL ((uint8_t*) 0xFEC20C7F)
unsigned char * INT_OPM_80_A_M1_KS_AR = (void *) 0xFEC20C80;
unsigned char * INT_OPM_81_B_M1_KS_AR = (void *) 0xFEC20C81;
unsigned char * INT_OPM_82_C_M1_KS_AR = (void *) 0xFEC20C82;
unsigned char * INT_OPM_83_D_M1_KS_AR = (void *) 0xFEC20C83;
unsigned char * INT_OPM_84_E_M1_KS_AR = (void *) 0xFEC20C84;
unsigned char * INT_OPM_85_F_M1_KS_AR = (void *) 0xFEC20C85;
unsigned char * INT_OPM_86_G_M1_KS_AR = (void *) 0xFEC20C86;
unsigned char * INT_OPM_87_H_M1_KS_AR = (void *) 0xFEC20C87;
unsigned char * INT_OPM_88_A_M2_KS_AR = (void *) 0xFEC20C88;
unsigned char * INT_OPM_89_B_M2_KS_AR = (void *) 0xFEC20C89;
unsigned char * INT_OPM_8A_C_M2_KS_AR = (void *) 0xFEC20C8A;
unsigned char * INT_OPM_8B_D_M2_KS_AR = (void *) 0xFEC20C8B;
unsigned char * INT_OPM_8C_E_M2_KS_AR = (void *) 0xFEC20C8C;
unsigned char * INT_OPM_8D_F_M2_KS_AR = (void *) 0xFEC20C8D;
unsigned char * INT_OPM_8E_G_M2_KS_AR = (void *) 0xFEC20C8E;
unsigned char * INT_OPM_8F_H_M2_KS_AR = (void *) 0xFEC20C8F;
#define INT_OPM_80_A_M1_KS_AR ((uint8_t*) 0xFEC20C80)
#define INT_OPM_81_B_M1_KS_AR ((uint8_t*) 0xFEC20C81)
#define INT_OPM_82_C_M1_KS_AR ((uint8_t*) 0xFEC20C82)
#define INT_OPM_83_D_M1_KS_AR ((uint8_t*) 0xFEC20C83)
#define INT_OPM_84_E_M1_KS_AR ((uint8_t*) 0xFEC20C84)
#define INT_OPM_85_F_M1_KS_AR ((uint8_t*) 0xFEC20C85)
#define INT_OPM_86_G_M1_KS_AR ((uint8_t*) 0xFEC20C86)
#define INT_OPM_87_H_M1_KS_AR ((uint8_t*) 0xFEC20C87)
#define INT_OPM_88_A_M2_KS_AR ((uint8_t*) 0xFEC20C88)
#define INT_OPM_89_B_M2_KS_AR ((uint8_t*) 0xFEC20C89)
#define INT_OPM_8A_C_M2_KS_AR ((uint8_t*) 0xFEC20C8A)
#define INT_OPM_8B_D_M2_KS_AR ((uint8_t*) 0xFEC20C8B)
#define INT_OPM_8C_E_M2_KS_AR ((uint8_t*) 0xFEC20C8C)
#define INT_OPM_8D_F_M2_KS_AR ((uint8_t*) 0xFEC20C8D)
#define INT_OPM_8E_G_M2_KS_AR ((uint8_t*) 0xFEC20C8E)
#define INT_OPM_8F_H_M2_KS_AR ((uint8_t*) 0xFEC20C8F)
unsigned char * INT_OPM_90_A_C1_KS_AR = (void *) 0xFEC20C90;
unsigned char * INT_OPM_91_B_C1_KS_AR = (void *) 0xFEC20C91;
unsigned char * INT_OPM_92_C_C1_KS_AR = (void *) 0xFEC20C92;
unsigned char * INT_OPM_93_D_C1_KS_AR = (void *) 0xFEC20C93;
unsigned char * INT_OPM_94_E_C1_KS_AR = (void *) 0xFEC20C94;
unsigned char * INT_OPM_95_F_C1_KS_AR = (void *) 0xFEC20C95;
unsigned char * INT_OPM_96_G_C1_KS_AR = (void *) 0xFEC20C96;
unsigned char * INT_OPM_97_H_C1_KS_AR = (void *) 0xFEC20C97;
unsigned char * INT_OPM_98_A_C2_KS_AR = (void *) 0xFEC20C98;
unsigned char * INT_OPM_99_B_C2_KS_AR = (void *) 0xFEC20C99;
unsigned char * INT_OPM_9A_C_C2_KS_AR = (void *) 0xFEC20C9A;
unsigned char * INT_OPM_9B_D_C2_KS_AR = (void *) 0xFEC20C9B;
unsigned char * INT_OPM_9C_E_C2_KS_AR = (void *) 0xFEC20C9C;
unsigned char * INT_OPM_9D_F_C2_KS_AR = (void *) 0xFEC20C9D;
unsigned char * INT_OPM_9E_G_C2_KS_AR = (void *) 0xFEC20C9E;
unsigned char * INT_OPM_9F_H_C2_KS_AR = (void *) 0xFEC20C9F;
#define INT_OPM_90_A_C1_KS_AR ((uint8_t*) 0xFEC20C90)
#define INT_OPM_91_B_C1_KS_AR ((uint8_t*) 0xFEC20C91)
#define INT_OPM_92_C_C1_KS_AR ((uint8_t*) 0xFEC20C92)
#define INT_OPM_93_D_C1_KS_AR ((uint8_t*) 0xFEC20C93)
#define INT_OPM_94_E_C1_KS_AR ((uint8_t*) 0xFEC20C94)
#define INT_OPM_95_F_C1_KS_AR ((uint8_t*) 0xFEC20C95)
#define INT_OPM_96_G_C1_KS_AR ((uint8_t*) 0xFEC20C96)
#define INT_OPM_97_H_C1_KS_AR ((uint8_t*) 0xFEC20C97)
#define INT_OPM_98_A_C2_KS_AR ((uint8_t*) 0xFEC20C98)
#define INT_OPM_99_B_C2_KS_AR ((uint8_t*) 0xFEC20C99)
#define INT_OPM_9A_C_C2_KS_AR ((uint8_t*) 0xFEC20C9A)
#define INT_OPM_9B_D_C2_KS_AR ((uint8_t*) 0xFEC20C9B)
#define INT_OPM_9C_E_C2_KS_AR ((uint8_t*) 0xFEC20C9C)
#define INT_OPM_9D_F_C2_KS_AR ((uint8_t*) 0xFEC20C9D)
#define INT_OPM_9E_G_C2_KS_AR ((uint8_t*) 0xFEC20C9E)
#define INT_OPM_9F_H_C2_KS_AR ((uint8_t*) 0xFEC20C9F)
unsigned char * INT_OPM_A0_A_M1_AMS_EN_D1R = (void *) 0xFEC20CA0;
unsigned char * INT_OPM_A1_B_M1_AMS_EN_D1R = (void *) 0xFEC20CA1;
unsigned char * INT_OPM_A2_C_M1_AMS_EN_D1R = (void *) 0xFEC20CA2;
unsigned char * INT_OPM_A3_D_M1_AMS_EN_D1R = (void *) 0xFEC20CA3;
unsigned char * INT_OPM_A4_E_M1_AMS_EN_D1R = (void *) 0xFEC20CA4;
unsigned char * INT_OPM_A5_F_M1_AMS_EN_D1R = (void *) 0xFEC20CA5;
unsigned char * INT_OPM_A6_G_M1_AMS_EN_D1R = (void *) 0xFEC20CA6;
unsigned char * INT_OPM_A7_H_M1_AMS_EN_D1R = (void *) 0xFEC20CA7;
unsigned char * INT_OPM_A8_A_M2_AMS_EN_D1R = (void *) 0xFEC20CA8;
unsigned char * INT_OPM_A9_B_M2_AMS_EN_D1R = (void *) 0xFEC20CA9;
unsigned char * INT_OPM_AA_C_M2_AMS_EN_D1R = (void *) 0xFEC20CAA;
unsigned char * INT_OPM_AB_D_M2_AMS_EN_D1R = (void *) 0xFEC20CAB;
unsigned char * INT_OPM_AC_E_M2_AMS_EN_D1R = (void *) 0xFEC20CAC;
unsigned char * INT_OPM_AD_F_M2_AMS_EN_D1R = (void *) 0xFEC20CAD;
unsigned char * INT_OPM_AE_G_M2_AMS_EN_D1R = (void *) 0xFEC20CAE;
unsigned char * INT_OPM_AF_H_M2_AMS_EN_D1R = (void *) 0xFEC20CAF;
#define INT_OPM_A0_A_M1_AMS_EN_D1R ((uint8_t*) 0xFEC20CA0)
#define INT_OPM_A1_B_M1_AMS_EN_D1R ((uint8_t*) 0xFEC20CA1)
#define INT_OPM_A2_C_M1_AMS_EN_D1R ((uint8_t*) 0xFEC20CA2)
#define INT_OPM_A3_D_M1_AMS_EN_D1R ((uint8_t*) 0xFEC20CA3)
#define INT_OPM_A4_E_M1_AMS_EN_D1R ((uint8_t*) 0xFEC20CA4)
#define INT_OPM_A5_F_M1_AMS_EN_D1R ((uint8_t*) 0xFEC20CA5)
#define INT_OPM_A6_G_M1_AMS_EN_D1R ((uint8_t*) 0xFEC20CA6)
#define INT_OPM_A7_H_M1_AMS_EN_D1R ((uint8_t*) 0xFEC20CA7)
#define INT_OPM_A8_A_M2_AMS_EN_D1R ((uint8_t*) 0xFEC20CA8)
#define INT_OPM_A9_B_M2_AMS_EN_D1R ((uint8_t*) 0xFEC20CA9)
#define INT_OPM_AA_C_M2_AMS_EN_D1R ((uint8_t*) 0xFEC20CAA)
#define INT_OPM_AB_D_M2_AMS_EN_D1R ((uint8_t*) 0xFEC20CAB)
#define INT_OPM_AC_E_M2_AMS_EN_D1R ((uint8_t*) 0xFEC20CAC)
#define INT_OPM_AD_F_M2_AMS_EN_D1R ((uint8_t*) 0xFEC20CAD)
#define INT_OPM_AE_G_M2_AMS_EN_D1R ((uint8_t*) 0xFEC20CAE)
#define INT_OPM_AF_H_M2_AMS_EN_D1R ((uint8_t*) 0xFEC20CAF)
unsigned char * INT_OPM_B0_A_C1_AMS_EN_D1R = (void *) 0xFEC20CB0;
unsigned char * INT_OPM_B1_B_C1_AMS_EN_D1R = (void *) 0xFEC20CB1;
unsigned char * INT_OPM_B2_C_C1_AMS_EN_D1R = (void *) 0xFEC20CB2;
unsigned char * INT_OPM_B3_D_C1_AMS_EN_D1R = (void *) 0xFEC20CB3;
unsigned char * INT_OPM_B4_E_C1_AMS_EN_D1R = (void *) 0xFEC20CB4;
unsigned char * INT_OPM_B5_F_C1_AMS_EN_D1R = (void *) 0xFEC20CB5;
unsigned char * INT_OPM_B6_G_C1_AMS_EN_D1R = (void *) 0xFEC20CB6;
unsigned char * INT_OPM_B7_H_C1_AMS_EN_D1R = (void *) 0xFEC20CB7;
unsigned char * INT_OPM_B8_A_C2_AMS_EN_D1R = (void *) 0xFEC20CB8;
unsigned char * INT_OPM_B9_B_C2_AMS_EN_D1R = (void *) 0xFEC20CB9;
unsigned char * INT_OPM_BA_C_C2_AMS_EN_D1R = (void *) 0xFEC20CBA;
unsigned char * INT_OPM_BB_D_C2_AMS_EN_D1R = (void *) 0xFEC20CBB;
unsigned char * INT_OPM_BC_E_C2_AMS_EN_D1R = (void *) 0xFEC20CBC;
unsigned char * INT_OPM_BD_F_C2_AMS_EN_D1R = (void *) 0xFEC20CBD;
unsigned char * INT_OPM_BE_G_C2_AMS_EN_D1R = (void *) 0xFEC20CBE;
unsigned char * INT_OPM_BF_H_C2_AMS_EN_D1R = (void *) 0xFEC20CBF;
#define INT_OPM_B0_A_C1_AMS_EN_D1R ((uint8_t*) 0xFEC20CB0)
#define INT_OPM_B1_B_C1_AMS_EN_D1R ((uint8_t*) 0xFEC20CB1)
#define INT_OPM_B2_C_C1_AMS_EN_D1R ((uint8_t*) 0xFEC20CB2)
#define INT_OPM_B3_D_C1_AMS_EN_D1R ((uint8_t*) 0xFEC20CB3)
#define INT_OPM_B4_E_C1_AMS_EN_D1R ((uint8_t*) 0xFEC20CB4)
#define INT_OPM_B5_F_C1_AMS_EN_D1R ((uint8_t*) 0xFEC20CB5)
#define INT_OPM_B6_G_C1_AMS_EN_D1R ((uint8_t*) 0xFEC20CB6)
#define INT_OPM_B7_H_C1_AMS_EN_D1R ((uint8_t*) 0xFEC20CB7)
#define INT_OPM_B8_A_C2_AMS_EN_D1R ((uint8_t*) 0xFEC20CB8)
#define INT_OPM_B9_B_C2_AMS_EN_D1R ((uint8_t*) 0xFEC20CB9)
#define INT_OPM_BA_C_C2_AMS_EN_D1R ((uint8_t*) 0xFEC20CBA)
#define INT_OPM_BB_D_C2_AMS_EN_D1R ((uint8_t*) 0xFEC20CBB)
#define INT_OPM_BC_E_C2_AMS_EN_D1R ((uint8_t*) 0xFEC20CBC)
#define INT_OPM_BD_F_C2_AMS_EN_D1R ((uint8_t*) 0xFEC20CBD)
#define INT_OPM_BE_G_C2_AMS_EN_D1R ((uint8_t*) 0xFEC20CBE)
#define INT_OPM_BF_H_C2_AMS_EN_D1R ((uint8_t*) 0xFEC20CBF)
unsigned char * INT_OPM_C0_A_M1_DT2_D2R = (void *) 0xFEC20CC0;
unsigned char * INT_OPM_C1_B_M1_DT2_D2R = (void *) 0xFEC20CC1;
unsigned char * INT_OPM_C2_C_M1_DT2_D2R = (void *) 0xFEC20CC2;
unsigned char * INT_OPM_C3_D_M1_DT2_D2R = (void *) 0xFEC20CC3;
unsigned char * INT_OPM_C4_E_M1_DT2_D2R = (void *) 0xFEC20CC4;
unsigned char * INT_OPM_C5_F_M1_DT2_D2R = (void *) 0xFEC20CC5;
unsigned char * INT_OPM_C6_G_M1_DT2_D2R = (void *) 0xFEC20CC6;
unsigned char * INT_OPM_C7_H_M1_DT2_D2R = (void *) 0xFEC20CC7;
unsigned char * INT_OPM_C8_A_M2_DT2_D2R = (void *) 0xFEC20CC8;
unsigned char * INT_OPM_C9_B_M2_DT2_D2R = (void *) 0xFEC20CC9;
unsigned char * INT_OPM_CA_C_M2_DT2_D2R = (void *) 0xFEC20CCA;
unsigned char * INT_OPM_CB_D_M2_DT2_D2R = (void *) 0xFEC20CCB;
unsigned char * INT_OPM_CC_E_M2_DT2_D2R = (void *) 0xFEC20CCC;
unsigned char * INT_OPM_CD_F_M2_DT2_D2R = (void *) 0xFEC20CCD;
unsigned char * INT_OPM_CE_G_M2_DT2_D2R = (void *) 0xFEC20CCE;
unsigned char * INT_OPM_CF_H_M2_DT2_D2R = (void *) 0xFEC20CCF;
#define INT_OPM_C0_A_M1_DT2_D2R ((uint8_t*) 0xFEC20CC0)
#define INT_OPM_C1_B_M1_DT2_D2R ((uint8_t*) 0xFEC20CC1)
#define INT_OPM_C2_C_M1_DT2_D2R ((uint8_t*) 0xFEC20CC2)
#define INT_OPM_C3_D_M1_DT2_D2R ((uint8_t*) 0xFEC20CC3)
#define INT_OPM_C4_E_M1_DT2_D2R ((uint8_t*) 0xFEC20CC4)
#define INT_OPM_C5_F_M1_DT2_D2R ((uint8_t*) 0xFEC20CC5)
#define INT_OPM_C6_G_M1_DT2_D2R ((uint8_t*) 0xFEC20CC6)
#define INT_OPM_C7_H_M1_DT2_D2R ((uint8_t*) 0xFEC20CC7)
#define INT_OPM_C8_A_M2_DT2_D2R ((uint8_t*) 0xFEC20CC8)
#define INT_OPM_C9_B_M2_DT2_D2R ((uint8_t*) 0xFEC20CC9)
#define INT_OPM_CA_C_M2_DT2_D2R ((uint8_t*) 0xFEC20CCA)
#define INT_OPM_CB_D_M2_DT2_D2R ((uint8_t*) 0xFEC20CCB)
#define INT_OPM_CC_E_M2_DT2_D2R ((uint8_t*) 0xFEC20CCC)
#define INT_OPM_CD_F_M2_DT2_D2R ((uint8_t*) 0xFEC20CCD)
#define INT_OPM_CE_G_M2_DT2_D2R ((uint8_t*) 0xFEC20CCE)
#define INT_OPM_CF_H_M2_DT2_D2R ((uint8_t*) 0xFEC20CCF)
unsigned char * INT_OPM_D0_A_C1_DT2_D2R = (void *) 0xFEC20CD0;
unsigned char * INT_OPM_D1_B_C1_DT2_D2R = (void *) 0xFEC20CD1;
unsigned char * INT_OPM_D2_C_C1_DT2_D2R = (void *) 0xFEC20CD2;
unsigned char * INT_OPM_D3_D_C1_DT2_D2R = (void *) 0xFEC20CD3;
unsigned char * INT_OPM_D4_E_C1_DT2_D2R = (void *) 0xFEC20CD4;
unsigned char * INT_OPM_D5_F_C1_DT2_D2R = (void *) 0xFEC20CD5;
unsigned char * INT_OPM_D6_G_C1_DT2_D2R = (void *) 0xFEC20CD6;
unsigned char * INT_OPM_D7_H_C1_DT2_D2R = (void *) 0xFEC20CD7;
unsigned char * INT_OPM_D8_A_C2_DT2_D2R = (void *) 0xFEC20CD8;
unsigned char * INT_OPM_D9_B_C2_DT2_D2R = (void *) 0xFEC20CD9;
unsigned char * INT_OPM_DA_C_C2_DT2_D2R = (void *) 0xFEC20CDA;
unsigned char * INT_OPM_DB_D_C2_DT2_D2R = (void *) 0xFEC20CDB;
unsigned char * INT_OPM_DC_E_C2_DT2_D2R = (void *) 0xFEC20CDC;
unsigned char * INT_OPM_DD_F_C2_DT2_D2R = (void *) 0xFEC20CDD;
unsigned char * INT_OPM_DE_G_C2_DT2_D2R = (void *) 0xFEC20CDE;
unsigned char * INT_OPM_DF_H_C2_DT2_D2R = (void *) 0xFEC20CDF;
#define INT_OPM_D0_A_C1_DT2_D2R ((uint8_t*) 0xFEC20CD0)
#define INT_OPM_D1_B_C1_DT2_D2R ((uint8_t*) 0xFEC20CD1)
#define INT_OPM_D2_C_C1_DT2_D2R ((uint8_t*) 0xFEC20CD2)
#define INT_OPM_D3_D_C1_DT2_D2R ((uint8_t*) 0xFEC20CD3)
#define INT_OPM_D4_E_C1_DT2_D2R ((uint8_t*) 0xFEC20CD4)
#define INT_OPM_D5_F_C1_DT2_D2R ((uint8_t*) 0xFEC20CD5)
#define INT_OPM_D6_G_C1_DT2_D2R ((uint8_t*) 0xFEC20CD6)
#define INT_OPM_D7_H_C1_DT2_D2R ((uint8_t*) 0xFEC20CD7)
#define INT_OPM_D8_A_C2_DT2_D2R ((uint8_t*) 0xFEC20CD8)
#define INT_OPM_D9_B_C2_DT2_D2R ((uint8_t*) 0xFEC20CD9)
#define INT_OPM_DA_C_C2_DT2_D2R ((uint8_t*) 0xFEC20CDA)
#define INT_OPM_DB_D_C2_DT2_D2R ((uint8_t*) 0xFEC20CDB)
#define INT_OPM_DC_E_C2_DT2_D2R ((uint8_t*) 0xFEC20CDC)
#define INT_OPM_DD_F_C2_DT2_D2R ((uint8_t*) 0xFEC20CDD)
#define INT_OPM_DE_G_C2_DT2_D2R ((uint8_t*) 0xFEC20CDE)
#define INT_OPM_DF_H_C2_DT2_D2R ((uint8_t*) 0xFEC20CDF)
unsigned char * INT_OPM_E0_A_M1_D1L_RR = (void *) 0xFEC20CE0;
unsigned char * INT_OPM_E1_B_M1_D1L_RR = (void *) 0xFEC20CE1;
unsigned char * INT_OPM_E2_C_M1_D1L_RR = (void *) 0xFEC20CE2;
unsigned char * INT_OPM_E3_D_M1_D1L_RR = (void *) 0xFEC20CE3;
unsigned char * INT_OPM_E4_E_M1_D1L_RR = (void *) 0xFEC20CE4;
unsigned char * INT_OPM_E5_F_M1_D1L_RR = (void *) 0xFEC20CE5;
unsigned char * INT_OPM_E6_G_M1_D1L_RR = (void *) 0xFEC20CE6;
unsigned char * INT_OPM_E7_H_M1_D1L_RR = (void *) 0xFEC20CE7;
unsigned char * INT_OPM_E8_A_M2_D1L_RR = (void *) 0xFEC20CE8;
unsigned char * INT_OPM_E9_B_M2_D1L_RR = (void *) 0xFEC20CE9;
unsigned char * INT_OPM_EA_C_M2_D1L_RR = (void *) 0xFEC20CEA;
unsigned char * INT_OPM_EB_D_M2_D1L_RR = (void *) 0xFEC20CEB;
unsigned char * INT_OPM_EC_E_M2_D1L_RR = (void *) 0xFEC20CEC;
unsigned char * INT_OPM_ED_F_M2_D1L_RR = (void *) 0xFEC20CED;
unsigned char * INT_OPM_EE_G_M2_D1L_RR = (void *) 0xFEC20CEE;
unsigned char * INT_OPM_EF_H_M2_D1L_RR = (void *) 0xFEC20CEF;
#define INT_OPM_E0_A_M1_D1L_RR ((uint8_t*) 0xFEC20CE0)
#define INT_OPM_E1_B_M1_D1L_RR ((uint8_t*) 0xFEC20CE1)
#define INT_OPM_E2_C_M1_D1L_RR ((uint8_t*) 0xFEC20CE2)
#define INT_OPM_E3_D_M1_D1L_RR ((uint8_t*) 0xFEC20CE3)
#define INT_OPM_E4_E_M1_D1L_RR ((uint8_t*) 0xFEC20CE4)
#define INT_OPM_E5_F_M1_D1L_RR ((uint8_t*) 0xFEC20CE5)
#define INT_OPM_E6_G_M1_D1L_RR ((uint8_t*) 0xFEC20CE6)
#define INT_OPM_E7_H_M1_D1L_RR ((uint8_t*) 0xFEC20CE7)
#define INT_OPM_E8_A_M2_D1L_RR ((uint8_t*) 0xFEC20CE8)
#define INT_OPM_E9_B_M2_D1L_RR ((uint8_t*) 0xFEC20CE9)
#define INT_OPM_EA_C_M2_D1L_RR ((uint8_t*) 0xFEC20CEA)
#define INT_OPM_EB_D_M2_D1L_RR ((uint8_t*) 0xFEC20CEB)
#define INT_OPM_EC_E_M2_D1L_RR ((uint8_t*) 0xFEC20CEC)
#define INT_OPM_ED_F_M2_D1L_RR ((uint8_t*) 0xFEC20CED)
#define INT_OPM_EE_G_M2_D1L_RR ((uint8_t*) 0xFEC20CEE)
#define INT_OPM_EF_H_M2_D1L_RR ((uint8_t*) 0xFEC20CEF)
unsigned char * INT_OPM_F0_A_C1_D1L_RR = (void *) 0xFEC20CF0;
unsigned char * INT_OPM_F1_B_C1_D1L_RR = (void *) 0xFEC20CF1;
unsigned char * INT_OPM_F2_C_C1_D1L_RR = (void *) 0xFEC20CF2;
unsigned char * INT_OPM_F3_D_C1_D1L_RR = (void *) 0xFEC20CF3;
unsigned char * INT_OPM_F4_E_C1_D1L_RR = (void *) 0xFEC20CF4;
unsigned char * INT_OPM_F5_F_C1_D1L_RR = (void *) 0xFEC20CF5;
unsigned char * INT_OPM_F6_G_C1_D1L_RR = (void *) 0xFEC20CF6;
unsigned char * INT_OPM_F7_H_C1_D1L_RR = (void *) 0xFEC20CF7;
unsigned char * INT_OPM_F8_A_C2_D1L_RR = (void *) 0xFEC20CF8;
unsigned char * INT_OPM_F9_B_C2_D1L_RR = (void *) 0xFEC20CF9;
unsigned char * INT_OPM_FA_C_C2_D1L_RR = (void *) 0xFEC20CFA;
unsigned char * INT_OPM_FB_D_C2_D1L_RR = (void *) 0xFEC20CFB;
unsigned char * INT_OPM_FC_E_C2_D1L_RR = (void *) 0xFEC20CFC;
unsigned char * INT_OPM_FD_F_C2_D1L_RR = (void *) 0xFEC20CFD;
unsigned char * INT_OPM_FE_G_C2_D1L_RR = (void *) 0xFEC20CFE;
unsigned char * INT_OPM_FF_H_C2_D1L_RR = (void *) 0xFEC20CFF;
#define INT_OPM_F0_A_C1_D1L_RR ((uint8_t*) 0xFEC20CF0)
#define INT_OPM_F1_B_C1_D1L_RR ((uint8_t*) 0xFEC20CF1)
#define INT_OPM_F2_C_C1_D1L_RR ((uint8_t*) 0xFEC20CF2)
#define INT_OPM_F3_D_C1_D1L_RR ((uint8_t*) 0xFEC20CF3)
#define INT_OPM_F4_E_C1_D1L_RR ((uint8_t*) 0xFEC20CF4)
#define INT_OPM_F5_F_C1_D1L_RR ((uint8_t*) 0xFEC20CF5)
#define INT_OPM_F6_G_C1_D1L_RR ((uint8_t*) 0xFEC20CF6)
#define INT_OPM_F7_H_C1_D1L_RR ((uint8_t*) 0xFEC20CF7)
#define INT_OPM_F8_A_C2_D1L_RR ((uint8_t*) 0xFEC20CF8)
#define INT_OPM_F9_B_C2_D1L_RR ((uint8_t*) 0xFEC20CF9)
#define INT_OPM_FA_C_C2_D1L_RR ((uint8_t*) 0xFEC20CFA)
#define INT_OPM_FB_D_C2_D1L_RR ((uint8_t*) 0xFEC20CFB)
#define INT_OPM_FC_E_C2_D1L_RR ((uint8_t*) 0xFEC20CFC)
#define INT_OPM_FD_F_C2_D1L_RR ((uint8_t*) 0xFEC20CFD)
#define INT_OPM_FE_G_C2_D1L_RR ((uint8_t*) 0xFEC20CFE)
#define INT_OPM_FF_H_C2_D1L_RR ((uint8_t*) 0xFEC20CFF)
#endif

566
src/include/A2560K/YM2612_Ext.h
View file

@ -3,294 +3,294 @@
// External Registers $00C20400..$00C20BFF
unsigned char * EXT_OPN2_22_LFO = (void *)0xFEC20422; // LFO enable | LFO frequency
unsigned char * EXT_OPN2_23_TIMER_A_H = (void *)0xFEC20423; // Timer A MSBs
unsigned char * EXT_OPN2_24_TIMER_A_L = (void *)0xFEC20424; // Timer A LSBs
unsigned char * EXT_OPN2_25_TIMER_B = (void *)0xFEC20425; // Timer B
unsigned char * EXT_OPN2_27_CHANEL_3_MODE = (void *)0xFEC20427; // Ch3 mode Reset B Reset A Enable B Enable A Load B Load A
unsigned char * EXT_OPN2_27_TIMER_CONF = (void *)0xFEC20427; // Ch3 mode Reset B Reset A Enable B Enable A Load B Load A
unsigned char * EXT_OPN2_28_KEY_ON_OFF = (void *)0xFEC20428; // Operator Channel
unsigned char * EXT_OPN2_29 = (void *)0xFEC20429;
unsigned char * EXT_OPN2_2A_ADC = (void *)0xFEC2042A; // DAC
unsigned char * EXT_OPN2_2B_ADC_EN = (void *)0xFEC2042B; // DAC en
//;--------------------------------------------------------------------------------------
//;------------------- DT1 (detune) and MUL (multiple) ----------------------------------
//;--------------------------------------------------------------------------------------
//;
//; MUL ranges from 0 to 15 (decimal), and multiplies the overall frequency, with the
//; exception that 0 results in multiplication by 1/2. That is, MUL=0 to 15 gives ×1/2,
//; ×1, ×2, ... ×15.
//;
//; DT1 gives small variations from the overall frequency × MUL. The MSB of DT1 is a
//; primitive sign bit, and the two LSB’s are magnitude bits. See the next page for a
//; diagram.
//;
//;--------------------------------------------------------------------------------------
unsigned char * EXT_OPN2_30_ADSR__DT1_MUL__CH1_OP1 = (void *) 0xFEC20430;
unsigned char * EXT_OPN2_31_ADSR__DT1_MUL__CH2_OP1 = (void *) 0xFEC20431;
unsigned char * EXT_OPN2_32_ADSR__DT1_MUL__CH3_OP1 = (void *) 0xFEC20432;
unsigned char * EXT_OPN2_34_ADSR__DT1_MUL__CH1_OP2 = (void *) 0xFEC20434;
unsigned char * EXT_OPN2_35_ADSR__DT1_MUL__CH2_OP2 = (void *) 0xFEC20435;
unsigned char * EXT_OPN2_36_ADSR__DT1_MUL__CH3_OP2 = (void *) 0xFEC20436;
unsigned char * EXT_OPN2_38_ADSR__DT1_MUL__CH1_OP3 = (void *) 0xFEC20438;
unsigned char * EXT_OPN2_39_ADSR__DT1_MUL__CH2_OP3 = (void *) 0xFEC20439;
unsigned char * EXT_OPN2_3A_ADSR__DT1_MUL__CH3_OP3 = (void *) 0xFEC2043A;
unsigned char * EXT_OPN2_3C_ADSR__DT1_MUL__CH1_OP4 = (void *) 0xFEC2043C;
unsigned char * EXT_OPN2_3D_ADSR__DT1_MUL__CH2_OP4 = (void *) 0xFEC2043D;
unsigned char * EXT_OPN2_3E_ADSR__DT1_MUL__CH3_OP4 = (void *) 0xFEC2043E;
unsigned char * EXT_OPN2_30_ADSR__DT1_MUL__CH1_OP5 = (void *) 0xFEC20530;
unsigned char * EXT_OPN2_31_ADSR__DT1_MUL__CH2_OP5 = (void *) 0xFEC20531;
unsigned char * EXT_OPN2_32_ADSR__DT1_MUL__CH3_OP5 = (void *) 0xFEC20532;
unsigned char * EXT_OPN2_34_ADSR__DT1_MUL__CH1_OP6 = (void *) 0xFEC20534;
unsigned char * EXT_OPN2_35_ADSR__DT1_MUL__CH2_OP6 = (void *) 0xFEC20535;
unsigned char * EXT_OPN2_36_ADSR__DT1_MUL__CH3_OP6 = (void *) 0xFEC20536;
unsigned char * EXT_OPN2_38_ADSR__DT1_MUL__CH1_OP7 = (void *) 0xFEC20538;
unsigned char * EXT_OPN2_39_ADSR__DT1_MUL__CH2_OP7 = (void *) 0xFEC20539;
unsigned char * EXT_OPN2_3A_ADSR__DT1_MUL__CH3_OP7 = (void *) 0xFEC2053A;
unsigned char * EXT_OPN2_3C_ADSR__DT1_MUL__CH1_OP8 = (void *) 0xFEC2053C;
unsigned char * EXT_OPN2_3D_ADSR__DT1_MUL__CH2_OP8 = (void *) 0xFEC2053D;
unsigned char * EXT_OPN2_3E_ADSR__DT1_MUL__CH3_OP8 = (void *) 0xFEC2053E;
#define EXT_OPN2_22_LFO ((uint8_t* const)0xFEC20422) // LFO enable | LFO frequency
#define EXT_OPN2_23_TIMER_A_H ((uint8_t* const)0xFEC20423) // Timer A MSBs
#define EXT_OPN2_24_TIMER_A_L ((uint8_t* const)0xFEC20424) // Timer A LSBs
#define EXT_OPN2_25_TIMER_B ((uint8_t* const)0xFEC20425) // Timer B
#define EXT_OPN2_27_CHANEL_3_MODE ((uint8_t* const)0xFEC20427) // Ch3 mode Reset B Reset A Enable B Enable A Load B Load A
#define EXT_OPN2_27_TIMER_CONF ((uint8_t* const)0xFEC20427) // Ch3 mode Reset B Reset A Enable B Enable A Load B Load A
#define EXT_OPN2_28_KEY_ON_OFF ((uint8_t* const)0xFEC20428) // Operator Channel
#define EXT_OPN2_29 ((uint8_t* const)0xFEC20429)
#define EXT_OPN2_2A_ADC ((uint8_t* const)0xFEC2042A) // DAC
#define EXT_OPN2_2B_ADC_EN ((uint8_t* const)0xFEC2042B) // DAC en
//)--------------------------------------------------------------------------------------
//)------------------- DT1 (detune) and MUL (multiple) ----------------------------------
//)--------------------------------------------------------------------------------------
//)
//) MUL ranges from 0 to 15 (decimal), and multiplies the overall frequency, with the
//) exception that 0 results in multiplication by 1/2. That is, MUL=0 to 15 gives ×1/2,
//) ×1, ×2, ... ×15.
//)
//) DT1 gives small variations from the overall frequency × MUL. The MSB of DT1 is a
//) primitive sign bit, and the two LSB’s are magnitude bits. See the next page for a
//) diagram.
//)
//)--------------------------------------------------------------------------------------
#define EXT_OPN2_30_ADSR__DT1_MUL__CH1_OP1 ((uint8_t* const) 0xFEC20430)
#define EXT_OPN2_31_ADSR__DT1_MUL__CH2_OP1 ((uint8_t* const) 0xFEC20431)
#define EXT_OPN2_32_ADSR__DT1_MUL__CH3_OP1 ((uint8_t* const) 0xFEC20432)
#define EXT_OPN2_34_ADSR__DT1_MUL__CH1_OP2 ((uint8_t* const) 0xFEC20434)
#define EXT_OPN2_35_ADSR__DT1_MUL__CH2_OP2 ((uint8_t* const) 0xFEC20435)
#define EXT_OPN2_36_ADSR__DT1_MUL__CH3_OP2 ((uint8_t* const) 0xFEC20436)
#define EXT_OPN2_38_ADSR__DT1_MUL__CH1_OP3 ((uint8_t* const) 0xFEC20438)
#define EXT_OPN2_39_ADSR__DT1_MUL__CH2_OP3 ((uint8_t* const) 0xFEC20439)
#define EXT_OPN2_3A_ADSR__DT1_MUL__CH3_OP3 ((uint8_t* const) 0xFEC2043A)
#define EXT_OPN2_3C_ADSR__DT1_MUL__CH1_OP4 ((uint8_t* const) 0xFEC2043C)
#define EXT_OPN2_3D_ADSR__DT1_MUL__CH2_OP4 ((uint8_t* const) 0xFEC2043D)
#define EXT_OPN2_3E_ADSR__DT1_MUL__CH3_OP4 ((uint8_t* const) 0xFEC2043E)
#define EXT_OPN2_30_ADSR__DT1_MUL__CH1_OP5 ((uint8_t* const) 0xFEC20530)
#define EXT_OPN2_31_ADSR__DT1_MUL__CH2_OP5 ((uint8_t* const) 0xFEC20531)
#define EXT_OPN2_32_ADSR__DT1_MUL__CH3_OP5 ((uint8_t* const) 0xFEC20532)
#define EXT_OPN2_34_ADSR__DT1_MUL__CH1_OP6 ((uint8_t* const) 0xFEC20534)
#define EXT_OPN2_35_ADSR__DT1_MUL__CH2_OP6 ((uint8_t* const) 0xFEC20535)
#define EXT_OPN2_36_ADSR__DT1_MUL__CH3_OP6 ((uint8_t* const) 0xFEC20536)
#define EXT_OPN2_38_ADSR__DT1_MUL__CH1_OP7 ((uint8_t* const) 0xFEC20538)
#define EXT_OPN2_39_ADSR__DT1_MUL__CH2_OP7 ((uint8_t* const) 0xFEC20539)
#define EXT_OPN2_3A_ADSR__DT1_MUL__CH3_OP7 ((uint8_t* const) 0xFEC2053A)
#define EXT_OPN2_3C_ADSR__DT1_MUL__CH1_OP8 ((uint8_t* const) 0xFEC2053C)
#define EXT_OPN2_3D_ADSR__DT1_MUL__CH2_OP8 ((uint8_t* const) 0xFEC2053D)
#define EXT_OPN2_3E_ADSR__DT1_MUL__CH3_OP8 ((uint8_t* const) 0xFEC2053E)
//;--------------------------------------------------------------------------------------
//;---------------------------------- TL (total level) ----------------------------------
//;--------------------------------------------------------------------------------------
//;
//; TL (total level) represents the envelope’s highest amplitude, with 0 being the largest
//; and 127 (decimal) the smallest. A change of one unit is about 0.75 dB.
//;
//; To make a note softer, only change the TL of the slots (the output operators).
//; Changing the other operators will affect the flavor of the note.
//;
//;--------------------------------------------------------------------------------------
unsigned char * EXT_OPN2_40_ADSR__LT__CH1_OP1 = (void *) 0xFEC20440;
unsigned char * EXT_OPN2_41_ADSR__LT__CH2_OP1 = (void *) 0xFEC20441;
unsigned char * EXT_OPN2_42_ADSR__LT__CH3_OP1 = (void *) 0xFEC20442;
unsigned char * EXT_OPN2_44_ADSR__LT__CH1_OP2 = (void *) 0xFEC20444;
unsigned char * EXT_OPN2_45_ADSR__LT__CH2_OP2 = (void *) 0xFEC20445;
unsigned char * EXT_OPN2_46_ADSR__LT__CH3_OP2 = (void *) 0xFEC20446;
unsigned char * EXT_OPN2_48_ADSR__LT__CH1_OP3 = (void *) 0xFEC20448;
unsigned char * EXT_OPN2_49_ADSR__LT__CH2_OP3 = (void *) 0xFEC20449;
unsigned char * EXT_OPN2_4A_ADSR__LT__CH3_OP3 = (void *) 0xFEC2044A;
unsigned char * EXT_OPN2_4C_ADSR__LT__CH1_OP4 = (void *) 0xFEC2044C;
unsigned char * EXT_OPN2_4D_ADSR__LT__CH2_OP4 = (void *) 0xFEC2044D;
unsigned char * EXT_OPN2_4E_ADSR__LT__CH3_OP4 = (void *) 0xFEC2044E;
unsigned char * EXT_OPN2_40_ADSR__LT__CH1_OP5 = (void *) 0xFEC20540;
unsigned char * EXT_OPN2_41_ADSR__LT__CH2_OP5 = (void *) 0xFEC20541;
unsigned char * EXT_OPN2_42_ADSR__LT__CH3_OP5 = (void *) 0xFEC20542;
unsigned char * EXT_OPN2_44_ADSR__LT__CH1_OP6 = (void *) 0xFEC20544;
unsigned char * EXT_OPN2_45_ADSR__LT__CH2_OP6 = (void *) 0xFEC20545;
unsigned char * EXT_OPN2_46_ADSR__LT__CH3_OP6 = (void *) 0xFEC20546;
unsigned char * EXT_OPN2_48_ADSR__LT__CH1_OP7 = (void *) 0xFEC20548;
unsigned char * EXT_OPN2_49_ADSR__LT__CH2_OP7 = (void *) 0xFEC20549;
unsigned char * EXT_OPN2_4A_ADSR__LT__CH3_OP7 = (void *) 0xFEC2054A;
unsigned char * EXT_OPN2_4C_ADSR__LT__CH1_OP8 = (void *) 0xFEC2054C;
unsigned char * EXT_OPN2_4D_ADSR__LT__CH2_OP8 = (void *) 0xFEC2054D;
unsigned char * EXT_OPN2_4E_ADSR__LT__CH3_OP8 = (void *) 0xFEC2054E;
//;--------------------------------------------------------------------------------------
//;------------------- RS (rate scaling) and AR (attack rate) ---------------------------
//;--------------------------------------------------------------------------------------
//;
//; AR is the steepness of the initial amplitude rise, shown on page 5.
//;
//; RS affects AR, D1R, D2R and RR in the same way. RS is the degree to which the envelope
//; becomes narrower as the frequency becomes higher.
//;
//;--------------------------------------------------------------------------------------
unsigned char * EXT_OPN2_50_ADSR__SR_AR__CH1_OP1 = (void *) 0xFEC20450;
unsigned char * EXT_OPN2_51_ADSR__SR_AR__CH2_OP1 = (void *) 0xFEC20451;
unsigned char * EXT_OPN2_52_ADSR__SR_AR__CH3_OP1 = (void *) 0xFEC20452;
unsigned char * EXT_OPN2_54_ADSR__SR_AR__CH1_OP2 = (void *) 0xFEC20454;
unsigned char * EXT_OPN2_55_ADSR__SR_AR__CH2_OP2 = (void *) 0xFEC20455;
unsigned char * EXT_OPN2_56_ADSR__SR_AR__CH3_OP2 = (void *) 0xFEC20456;
unsigned char * EXT_OPN2_58_ADSR__SR_AR__CH1_OP3 = (void *) 0xFEC20458;
unsigned char * EXT_OPN2_59_ADSR__SR_AR__CH2_OP3 = (void *) 0xFEC20459;
unsigned char * EXT_OPN2_5A_ADSR__SR_AR__CH3_OP3 = (void *) 0xFEC2045A;
unsigned char * EXT_OPN2_5C_ADSR__SR_AR__CH1_OP4 = (void *) 0xFEC2045C;
unsigned char * EXT_OPN2_5D_ADSR__SR_AR__CH2_OP4 = (void *) 0xFEC2045D;
unsigned char * EXT_OPN2_5E_ADSR__SR_AR__CH3_OP4 = (void *) 0xFEC2045E;
unsigned char * EXT_OPN2_50_ADSR__SR_AR__CH1_OP5 = (void *) 0xFEC20550;
unsigned char * EXT_OPN2_51_ADSR__SR_AR__CH2_OP5 = (void *) 0xFEC20551;
unsigned char * EXT_OPN2_52_ADSR__SR_AR__CH3_OP5 = (void *) 0xFEC20552;
unsigned char * EXT_OPN2_54_ADSR__SR_AR__CH1_OP6 = (void *) 0xFEC20554;
unsigned char * EXT_OPN2_55_ADSR__SR_AR__CH2_OP6 = (void *) 0xFEC20555;
unsigned char * EXT_OPN2_56_ADSR__SR_AR__CH3_OP6 = (void *) 0xFEC20556;
unsigned char * EXT_OPN2_58_ADSR__SR_AR__CH1_OP7 = (void *) 0xFEC20558;
unsigned char * EXT_OPN2_59_ADSR__SR_AR__CH2_OP7 = (void *) 0xFEC20559;
unsigned char * EXT_OPN2_5A_ADSR__SR_AR__CH3_OP7 = (void *) 0xFEC2055A;
unsigned char * EXT_OPN2_5C_ADSR__SR_AR__CH1_OP8 = (void *) 0xFEC2055C;
unsigned char * EXT_OPN2_5D_ADSR__SR_AR__CH2_OP8 = (void *) 0xFEC2055D;
unsigned char * EXT_OPN2_5E_ADSR__SR_AR__CH3_OP8 = (void *) 0xFEC2055E;
//;--------------------------------------------------------------------------------------
//;-------------- AM modulation enable amd D1R (first decay rate) -----------------------
//;--------------------------------------------------------------------------------------
//;
//; D1R (first decay rate) is the initial steep amplitude decay rate (see page 4). It is,
//; like all rates, 0-31 in value and affected by RS.
//;
//; AM is the amplitude modulation enable, whether of not this operator will be subject to
//; amplitude modulation by the LFO. This bit is not relevant unless both the LFO is
//; enabled and register B4′s AMS (amplitude modulation sensitivity) is non-zero.
//;
//;--------------------------------------------------------------------------------------
unsigned char * EXT_OPN2_60_ADSR__AM_D1R__CH1_OP1 = (void *) 0xFEC20460;
unsigned char * EXT_OPN2_61_ADSR__AM_D1R__CH2_OP1 = (void *) 0xFEC20461;
unsigned char * EXT_OPN2_62_ADSR__AM_D1R__CH3_OP1 = (void *) 0xFEC20462;
unsigned char * EXT_OPN2_64_ADSR__AM_D1R__CH1_OP2 = (void *) 0xFEC20464;
unsigned char * EXT_OPN2_65_ADSR__AM_D1R__CH2_OP2 = (void *) 0xFEC20465;
unsigned char * EXT_OPN2_66_ADSR__AM_D1R__CH3_OP2 = (void *) 0xFEC20466;
unsigned char * EXT_OPN2_68_ADSR__AM_D1R__CH1_OP3 = (void *) 0xFEC20468;
unsigned char * EXT_OPN2_69_ADSR__AM_D1R__CH2_OP3 = (void *) 0xFEC20469;
unsigned char * EXT_OPN2_6A_ADSR__AM_D1R__CH3_OP3 = (void *) 0xFEC2046A;
unsigned char * EXT_OPN2_6C_ADSR__AM_D1R__CH1_OP4 = (void *) 0xFEC2046C;
unsigned char * EXT_OPN2_6D_ADSR__AM_D1R__CH2_OP4 = (void *) 0xFEC2046D;
unsigned char * EXT_OPN2_6E_ADSR__AM_D1R__CH3_OP4 = (void *) 0xFEC2046E;
unsigned char * EXT_OPN2_60_ADSR__AM_D1R__CH1_OP5 = (void *) 0xFEC20560;
unsigned char * EXT_OPN2_61_ADSR__AM_D1R__CH2_OP5 = (void *) 0xFEC20561;
unsigned char * EXT_OPN2_62_ADSR__AM_D1R__CH3_OP5 = (void *) 0xFEC20562;
unsigned char * EXT_OPN2_64_ADSR__AM_D1R__CH1_OP6 = (void *) 0xFEC20564;
unsigned char * EXT_OPN2_65_ADSR__AM_D1R__CH2_OP6 = (void *) 0xFEC20565;
unsigned char * EXT_OPN2_66_ADSR__AM_D1R__CH3_OP6 = (void *) 0xFEC20566;
unsigned char * EXT_OPN2_68_ADSR__AM_D1R__CH1_OP7 = (void *) 0xFEC20568;
unsigned char * EXT_OPN2_69_ADSR__AM_D1R__CH2_OP7 = (void *) 0xFEC20569;
unsigned char * EXT_OPN2_6A_ADSR__AM_D1R__CH3_OP7 = (void *) 0xFEC2056A;
unsigned char * EXT_OPN2_6C_ADSR__AM_D1R__CH1_OP8 = (void *) 0xFEC2056C;
unsigned char * EXT_OPN2_6D_ADSR__AM_D1R__CH2_OP8 = (void *) 0xFEC2056D;
unsigned char * EXT_OPN2_6E_ADSR__AM_D1R__CH3_OP8 = (void *) 0xFEC2056E;
//;--------------------------------------------------------------------------------------
//;-------------------------- D2R (secondary decay rate) --------------------------------
//;--------------------------------------------------------------------------------------
//;
//; D2R (secondary decay rate) is the long tail off of the sound that continues as long
//; as the key is depressed.
//;
//;--------------------------------------------------------------------------------------
unsigned char * EXT_OPN2_70_ADSR__D2R__CH1_OP1 = (void *) 0xFEC20470;
unsigned char * EXT_OPN2_71_ADSR__D2R__CH2_OP1 = (void *) 0xFEC20471;
unsigned char * EXT_OPN2_72_ADSR__D2R__CH3_OP1 = (void *) 0xFEC20472;
unsigned char * EXT_OPN2_74_ADSR__D2R__CH1_OP2 = (void *) 0xFEC20474;
unsigned char * EXT_OPN2_75_ADSR__D2R__CH2_OP2 = (void *) 0xFEC20475;
unsigned char * EXT_OPN2_76_ADSR__D2R__CH3_OP2 = (void *) 0xFEC20476;
unsigned char * EXT_OPN2_78_ADSR__D2R__CH1_OP3 = (void *) 0xFEC20478;
unsigned char * EXT_OPN2_79_ADSR__D2R__CH2_OP3 = (void *) 0xFEC20479;
unsigned char * EXT_OPN2_7A_ADSR__D2R__CH3_OP3 = (void *) 0xFEC2047A;
unsigned char * EXT_OPN2_7C_ADSR__D2R__CH1_OP4 = (void *) 0xFEC2047C;
unsigned char * EXT_OPN2_7D_ADSR__D2R__CH2_OP4 = (void *) 0xFEC2047D;
unsigned char * EXT_OPN2_7E_ADSR__D2R__CH3_OP4 = (void *) 0xFEC2047E;
unsigned char * EXT_OPN2_70_ADSR__D2R__CH1_OP5 = (void *) 0xFEC20570;
unsigned char * EXT_OPN2_71_ADSR__D2R__CH2_OP5 = (void *) 0xFEC20571;
unsigned char * EXT_OPN2_72_ADSR__D2R__CH3_OP5 = (void *) 0xFEC20572;
unsigned char * EXT_OPN2_74_ADSR__D2R__CH1_OP6 = (void *) 0xFEC20574;
unsigned char * EXT_OPN2_75_ADSR__D2R__CH2_OP6 = (void *) 0xFEC20575;
unsigned char * EXT_OPN2_76_ADSR__D2R__CH3_OP6 = (void *) 0xFEC20576;
unsigned char * EXT_OPN2_78_ADSR__D2R__CH1_OP7 = (void *) 0xFEC20578;
unsigned char * EXT_OPN2_79_ADSR__D2R__CH2_OP7 = (void *) 0xFEC20579;
unsigned char * EXT_OPN2_7A_ADSR__D2R__CH3_OP7 = (void *) 0xFEC2057A;
unsigned char * EXT_OPN2_7C_ADSR__D2R__CH1_OP8 = (void *) 0xFEC2057C;
unsigned char * EXT_OPN2_7D_ADSR__D2R__CH2_OP8 = (void *) 0xFEC2057D;
unsigned char * EXT_OPN2_7E_ADSR__D2R__CH3_OP8 = (void *) 0xFEC2057E;
//;--------------------------------------------------------------------------------------
//;-------------------------- D2R (secondary decay rate) --------------------------------
//;--------------------------------------------------------------------------------------
//;
//; D2R (secondary decay rate) is the long tail off of the sound that continues as long
//; as the key is depressed.
//;
//;--------------------------------------------------------------------------------------
unsigned char * EXT_OPN2_80_ADSR__D1L_RR__CH1_OP1 = (void *) 0xFEC20480;
unsigned char * EXT_OPN2_81_ADSR__D1L_RR__CH2_OP1 = (void *) 0xFEC20481;
unsigned char * EXT_OPN2_82_ADSR__D1L_RR__CH3_OP1 = (void *) 0xFEC20482;
unsigned char * EXT_OPN2_84_ADSR__D1L_RR__CH1_OP2 = (void *) 0xFEC20484;
unsigned char * EXT_OPN2_85_ADSR__D1L_RR__CH2_OP2 = (void *) 0xFEC20485;
unsigned char * EXT_OPN2_86_ADSR__D1L_RR__CH3_OP2 = (void *) 0xFEC20486;
unsigned char * EXT_OPN2_88_ADSR__D1L_RR__CH1_OP3 = (void *) 0xFEC20488;
unsigned char * EXT_OPN2_89_ADSR__D1L_RR__CH2_OP3 = (void *) 0xFEC20489;
unsigned char * EXT_OPN2_8A_ADSR__D1L_RR__CH3_OP3 = (void *) 0xFEC2048A;
unsigned char * EXT_OPN2_8C_ADSR__D1L_RR__CH1_OP4 = (void *) 0xFEC2048C;
unsigned char * EXT_OPN2_8D_ADSR__D1L_RR__CH2_OP4 = (void *) 0xFEC2048D;
unsigned char * EXT_OPN2_8E_ADSR__D1L_RR__CH3_OP4 = (void *) 0xFEC2048E;
unsigned char * EXT_OPN2_80_ADSR__D1L_RR__CH1_OP5 = (void *) 0xFEC20580;
unsigned char * EXT_OPN2_81_ADSR__D1L_RR__CH2_OP5 = (void *) 0xFEC20581;
unsigned char * EXT_OPN2_82_ADSR__D1L_RR__CH3_OP5 = (void *) 0xFEC20582;
unsigned char * EXT_OPN2_84_ADSR__D1L_RR__CH1_OP6 = (void *) 0xFEC20584;
unsigned char * EXT_OPN2_85_ADSR__D1L_RR__CH2_OP6 = (void *) 0xFEC20585;
unsigned char * EXT_OPN2_86_ADSR__D1L_RR__CH3_OP6 = (void *) 0xFEC20586;
unsigned char * EXT_OPN2_88_ADSR__D1L_RR__CH1_OP7 = (void *) 0xFEC20588;
unsigned char * EXT_OPN2_89_ADSR__D1L_RR__CH2_OP7 = (void *) 0xFEC20589;
unsigned char * EXT_OPN2_8A_ADSR__D1L_RR__CH3_OP7 = (void *) 0xFEC2058A;
unsigned char * EXT_OPN2_8C_ADSR__D1L_RR__CH1_OP8 = (void *) 0xFEC2058C;
unsigned char * EXT_OPN2_8D_ADSR__D1L_RR__CH2_OP8 = (void *) 0xFEC2058D;
unsigned char * EXT_OPN2_8E_ADSR__D1L_RR__CH3_OP8 = (void *) 0xFEC2058E;
//;--------------------------------------------------------------------------------------
//;------------------------------------ SSG-EG ------------------------------------------
//;--------------------------------------------------------------------------------------
//;
//; This register is proprietary and should be set to zero.
//;
//;--------------------------------------------------------------------------------------
unsigned char * EXT_OPN2_90_ADSR__D1L_RR__CH1_OP1 = (void *) 0xFEC20490;
unsigned char * EXT_OPN2_91_ADSR__D1L_RR__CH2_OP1 = (void *) 0xFEC20491;
unsigned char * EXT_OPN2_92_ADSR__D1L_RR__CH3_OP1 = (void *) 0xFEC20492;
unsigned char * EXT_OPN2_94_ADSR__D1L_RR__CH1_OP2 = (void *) 0xFEC20494;
unsigned char * EXT_OPN2_95_ADSR__D1L_RR__CH2_OP2 = (void *) 0xFEC20495;
unsigned char * EXT_OPN2_96_ADSR__D1L_RR__CH3_OP2 = (void *) 0xFEC20496;
unsigned char * EXT_OPN2_98_ADSR__D1L_RR__CH1_OP3 = (void *) 0xFEC20498;
unsigned char * EXT_OPN2_99_ADSR__D1L_RR__CH2_OP3 = (void *) 0xFEC20499;
unsigned char * EXT_OPN2_9A_ADSR__D1L_RR__CH3_OP3 = (void *) 0xFEC2049A;
unsigned char * EXT_OPN2_9C_ADSR__D1L_RR__CH1_OP4 = (void *) 0xFEC2049C;
unsigned char * EXT_OPN2_9D_ADSR__D1L_RR__CH2_OP4 = (void *) 0xFEC2049D;
unsigned char * EXT_OPN2_9E_ADSR__D1L_RR__CH3_OP4 = (void *) 0xFEC2049E;
unsigned char * EXT_OPN2_90_ADSR__D1L_RR__CH4_OP1 = (void *) 0xFEC20590;
unsigned char * EXT_OPN2_91_ADSR__D1L_RR__CH5_OP1 = (void *) 0xFEC20591;
unsigned char * EXT_OPN2_92_ADSR__D1L_RR__CH6_OP1 = (void *) 0xFEC20592;
unsigned char * EXT_OPN2_94_ADSR__D1L_RR__CH4_OP2 = (void *) 0xFEC20594;
unsigned char * EXT_OPN2_95_ADSR__D1L_RR__CH5_OP2 = (void *) 0xFEC20595;
unsigned char * EXT_OPN2_96_ADSR__D1L_RR__CH6_OP2 = (void *) 0xFEC20596;
unsigned char * EXT_OPN2_98_ADSR__D1L_RR__CH4_OP3 = (void *) 0xFEC20598;
unsigned char * EXT_OPN2_99_ADSR__D1L_RR__CH5_OP3 = (void *) 0xFEC20599;
unsigned char * EXT_OPN2_9A_ADSR__D1L_RR__CH6_OP3 = (void *) 0xFEC2059A;
unsigned char * EXT_OPN2_9C_ADSR__D1L_RR__CH4_OP4 = (void *) 0xFEC2059C;
unsigned char * EXT_OPN2_9D_ADSR__D1L_RR__CH5_OP4 = (void *) 0xFEC2059D;
unsigned char * EXT_OPN2_9E_ADSR__D1L_RR__CH6_OP4 = (void *) 0xFEC2059E;
//;--------------------------------------------------------------------------------------
//)--------------------------------------------------------------------------------------
//)---------------------------------- TL (total level) ----------------------------------
//)--------------------------------------------------------------------------------------
//)
//) TL (total level) represents the envelope’s highest amplitude, with 0 being the largest
//) and 127 (decimal) the smallest. A change of one unit is about 0.75 dB.
//)
//) To make a note softer, only change the TL of the slots (the output operators).
//) Changing the other operators will affect the flavor of the note.
//)
//)--------------------------------------------------------------------------------------
#define EXT_OPN2_40_ADSR__LT__CH1_OP1 ((uint8_t* const) 0xFEC20440)
#define EXT_OPN2_41_ADSR__LT__CH2_OP1 ((uint8_t* const) 0xFEC20441)
#define EXT_OPN2_42_ADSR__LT__CH3_OP1 ((uint8_t* const) 0xFEC20442)
#define EXT_OPN2_44_ADSR__LT__CH1_OP2 ((uint8_t* const) 0xFEC20444)
#define EXT_OPN2_45_ADSR__LT__CH2_OP2 ((uint8_t* const) 0xFEC20445)
#define EXT_OPN2_46_ADSR__LT__CH3_OP2 ((uint8_t* const) 0xFEC20446)
#define EXT_OPN2_48_ADSR__LT__CH1_OP3 ((uint8_t* const) 0xFEC20448)
#define EXT_OPN2_49_ADSR__LT__CH2_OP3 ((uint8_t* const) 0xFEC20449)
#define EXT_OPN2_4A_ADSR__LT__CH3_OP3 ((uint8_t* const) 0xFEC2044A)
#define EXT_OPN2_4C_ADSR__LT__CH1_OP4 ((uint8_t* const) 0xFEC2044C)
#define EXT_OPN2_4D_ADSR__LT__CH2_OP4 ((uint8_t* const) 0xFEC2044D)
#define EXT_OPN2_4E_ADSR__LT__CH3_OP4 ((uint8_t* const) 0xFEC2044E)
#define EXT_OPN2_40_ADSR__LT__CH1_OP5 ((uint8_t* const) 0xFEC20540)
#define EXT_OPN2_41_ADSR__LT__CH2_OP5 ((uint8_t* const) 0xFEC20541)
#define EXT_OPN2_42_ADSR__LT__CH3_OP5 ((uint8_t* const) 0xFEC20542)
#define EXT_OPN2_44_ADSR__LT__CH1_OP6 ((uint8_t* const) 0xFEC20544)
#define EXT_OPN2_45_ADSR__LT__CH2_OP6 ((uint8_t* const) 0xFEC20545)
#define EXT_OPN2_46_ADSR__LT__CH3_OP6 ((uint8_t* const) 0xFEC20546)
#define EXT_OPN2_48_ADSR__LT__CH1_OP7 ((uint8_t* const) 0xFEC20548)
#define EXT_OPN2_49_ADSR__LT__CH2_OP7 ((uint8_t* const) 0xFEC20549)
#define EXT_OPN2_4A_ADSR__LT__CH3_OP7 ((uint8_t* const) 0xFEC2054A)
#define EXT_OPN2_4C_ADSR__LT__CH1_OP8 ((uint8_t* const) 0xFEC2054C)
#define EXT_OPN2_4D_ADSR__LT__CH2_OP8 ((uint8_t* const) 0xFEC2054D)
#define EXT_OPN2_4E_ADSR__LT__CH3_OP8 ((uint8_t* const) 0xFEC2054E)
//)--------------------------------------------------------------------------------------
//)------------------- RS (rate scaling) and AR (attack rate) ---------------------------
//)--------------------------------------------------------------------------------------
//)
//) AR is the steepness of the initial amplitude rise, shown on page 5.
//)
//) RS affects AR, D1R, D2R and RR in the same way. RS is the degree to which the envelope
//) becomes narrower as the frequency becomes higher.
//)
//)--------------------------------------------------------------------------------------
#define EXT_OPN2_50_ADSR__SR_AR__CH1_OP1 ((uint8_t* const) 0xFEC20450)
#define EXT_OPN2_51_ADSR__SR_AR__CH2_OP1 ((uint8_t* const) 0xFEC20451)
#define EXT_OPN2_52_ADSR__SR_AR__CH3_OP1 ((uint8_t* const) 0xFEC20452)
#define EXT_OPN2_54_ADSR__SR_AR__CH1_OP2 ((uint8_t* const) 0xFEC20454)
#define EXT_OPN2_55_ADSR__SR_AR__CH2_OP2 ((uint8_t* const) 0xFEC20455)
#define EXT_OPN2_56_ADSR__SR_AR__CH3_OP2 ((uint8_t* const) 0xFEC20456)
#define EXT_OPN2_58_ADSR__SR_AR__CH1_OP3 ((uint8_t* const) 0xFEC20458)
#define EXT_OPN2_59_ADSR__SR_AR__CH2_OP3 ((uint8_t* const) 0xFEC20459)
#define EXT_OPN2_5A_ADSR__SR_AR__CH3_OP3 ((uint8_t* const) 0xFEC2045A)
#define EXT_OPN2_5C_ADSR__SR_AR__CH1_OP4 ((uint8_t* const) 0xFEC2045C)
#define EXT_OPN2_5D_ADSR__SR_AR__CH2_OP4 ((uint8_t* const) 0xFEC2045D)
#define EXT_OPN2_5E_ADSR__SR_AR__CH3_OP4 ((uint8_t* const) 0xFEC2045E)
#define EXT_OPN2_50_ADSR__SR_AR__CH1_OP5 ((uint8_t* const) 0xFEC20550)
#define EXT_OPN2_51_ADSR__SR_AR__CH2_OP5 ((uint8_t* const) 0xFEC20551)
#define EXT_OPN2_52_ADSR__SR_AR__CH3_OP5 ((uint8_t* const) 0xFEC20552)
#define EXT_OPN2_54_ADSR__SR_AR__CH1_OP6 ((uint8_t* const) 0xFEC20554)
#define EXT_OPN2_55_ADSR__SR_AR__CH2_OP6 ((uint8_t* const) 0xFEC20555)
#define EXT_OPN2_56_ADSR__SR_AR__CH3_OP6 ((uint8_t* const) 0xFEC20556)
#define EXT_OPN2_58_ADSR__SR_AR__CH1_OP7 ((uint8_t* const) 0xFEC20558)
#define EXT_OPN2_59_ADSR__SR_AR__CH2_OP7 ((uint8_t* const) 0xFEC20559)
#define EXT_OPN2_5A_ADSR__SR_AR__CH3_OP7 ((uint8_t* const) 0xFEC2055A)
#define EXT_OPN2_5C_ADSR__SR_AR__CH1_OP8 ((uint8_t* const) 0xFEC2055C)
#define EXT_OPN2_5D_ADSR__SR_AR__CH2_OP8 ((uint8_t* const) 0xFEC2055D)
#define EXT_OPN2_5E_ADSR__SR_AR__CH3_OP8 ((uint8_t* const) 0xFEC2055E)
//)--------------------------------------------------------------------------------------
//)-------------- AM modulation enable amd D1R (first decay rate) -----------------------
//)--------------------------------------------------------------------------------------
//)
//) D1R (first decay rate) is the initial steep amplitude decay rate (see page 4). It is,
//) like all rates, 0-31 in value and affected by RS.
//)
//) AM is the amplitude modulation enable, whether of not this operator will be subject to
//) amplitude modulation by the LFO. This bit is not relevant unless both the LFO is
//) enabled and register B4′s AMS (amplitude modulation sensitivity) is non-zero.
//)
//)--------------------------------------------------------------------------------------
#define EXT_OPN2_60_ADSR__AM_D1R__CH1_OP1 ((uint8_t* const) 0xFEC20460)
#define EXT_OPN2_61_ADSR__AM_D1R__CH2_OP1 ((uint8_t* const) 0xFEC20461)
#define EXT_OPN2_62_ADSR__AM_D1R__CH3_OP1 ((uint8_t* const) 0xFEC20462)
#define EXT_OPN2_64_ADSR__AM_D1R__CH1_OP2 ((uint8_t* const) 0xFEC20464)
#define EXT_OPN2_65_ADSR__AM_D1R__CH2_OP2 ((uint8_t* const) 0xFEC20465)
#define EXT_OPN2_66_ADSR__AM_D1R__CH3_OP2 ((uint8_t* const) 0xFEC20466)
#define EXT_OPN2_68_ADSR__AM_D1R__CH1_OP3 ((uint8_t* const) 0xFEC20468)
#define EXT_OPN2_69_ADSR__AM_D1R__CH2_OP3 ((uint8_t* const) 0xFEC20469)
#define EXT_OPN2_6A_ADSR__AM_D1R__CH3_OP3 ((uint8_t* const) 0xFEC2046A)
#define EXT_OPN2_6C_ADSR__AM_D1R__CH1_OP4 ((uint8_t* const) 0xFEC2046C)
#define EXT_OPN2_6D_ADSR__AM_D1R__CH2_OP4 ((uint8_t* const) 0xFEC2046D)
#define EXT_OPN2_6E_ADSR__AM_D1R__CH3_OP4 ((uint8_t* const) 0xFEC2046E)
#define EXT_OPN2_60_ADSR__AM_D1R__CH1_OP5 ((uint8_t* const) 0xFEC20560)
#define EXT_OPN2_61_ADSR__AM_D1R__CH2_OP5 ((uint8_t* const) 0xFEC20561)
#define EXT_OPN2_62_ADSR__AM_D1R__CH3_OP5 ((uint8_t* const) 0xFEC20562)
#define EXT_OPN2_64_ADSR__AM_D1R__CH1_OP6 ((uint8_t* const) 0xFEC20564)
#define EXT_OPN2_65_ADSR__AM_D1R__CH2_OP6 ((uint8_t* const) 0xFEC20565)
#define EXT_OPN2_66_ADSR__AM_D1R__CH3_OP6 ((uint8_t* const) 0xFEC20566)
#define EXT_OPN2_68_ADSR__AM_D1R__CH1_OP7 ((uint8_t* const) 0xFEC20568)
#define EXT_OPN2_69_ADSR__AM_D1R__CH2_OP7 ((uint8_t* const) 0xFEC20569)
#define EXT_OPN2_6A_ADSR__AM_D1R__CH3_OP7 ((uint8_t* const) 0xFEC2056A)
#define EXT_OPN2_6C_ADSR__AM_D1R__CH1_OP8 ((uint8_t* const) 0xFEC2056C)
#define EXT_OPN2_6D_ADSR__AM_D1R__CH2_OP8 ((uint8_t* const) 0xFEC2056D)
#define EXT_OPN2_6E_ADSR__AM_D1R__CH3_OP8 ((uint8_t* const) 0xFEC2056E)
//)--------------------------------------------------------------------------------------
//)-------------------------- D2R (secondary decay rate) --------------------------------
//)--------------------------------------------------------------------------------------
//)
//) D2R (secondary decay rate) is the long tail off of the sound that continues as long
//) as the key is depressed.
//)
//)--------------------------------------------------------------------------------------
#define EXT_OPN2_70_ADSR__D2R__CH1_OP1 ((uint8_t* const) 0xFEC20470)
#define EXT_OPN2_71_ADSR__D2R__CH2_OP1 ((uint8_t* const) 0xFEC20471)
#define EXT_OPN2_72_ADSR__D2R__CH3_OP1 ((uint8_t* const) 0xFEC20472)
#define EXT_OPN2_74_ADSR__D2R__CH1_OP2 ((uint8_t* const) 0xFEC20474)
#define EXT_OPN2_75_ADSR__D2R__CH2_OP2 ((uint8_t* const) 0xFEC20475)
#define EXT_OPN2_76_ADSR__D2R__CH3_OP2 ((uint8_t* const) 0xFEC20476)
#define EXT_OPN2_78_ADSR__D2R__CH1_OP3 ((uint8_t* const) 0xFEC20478)
#define EXT_OPN2_79_ADSR__D2R__CH2_OP3 ((uint8_t* const) 0xFEC20479)
#define EXT_OPN2_7A_ADSR__D2R__CH3_OP3 ((uint8_t* const) 0xFEC2047A)
#define EXT_OPN2_7C_ADSR__D2R__CH1_OP4 ((uint8_t* const) 0xFEC2047C)
#define EXT_OPN2_7D_ADSR__D2R__CH2_OP4 ((uint8_t* const) 0xFEC2047D)
#define EXT_OPN2_7E_ADSR__D2R__CH3_OP4 ((uint8_t* const) 0xFEC2047E)
#define EXT_OPN2_70_ADSR__D2R__CH1_OP5 ((uint8_t* const) 0xFEC20570)
#define EXT_OPN2_71_ADSR__D2R__CH2_OP5 ((uint8_t* const) 0xFEC20571)
#define EXT_OPN2_72_ADSR__D2R__CH3_OP5 ((uint8_t* const) 0xFEC20572)
#define EXT_OPN2_74_ADSR__D2R__CH1_OP6 ((uint8_t* const) 0xFEC20574)
#define EXT_OPN2_75_ADSR__D2R__CH2_OP6 ((uint8_t* const) 0xFEC20575)
#define EXT_OPN2_76_ADSR__D2R__CH3_OP6 ((uint8_t* const) 0xFEC20576)
#define EXT_OPN2_78_ADSR__D2R__CH1_OP7 ((uint8_t* const) 0xFEC20578)
#define EXT_OPN2_79_ADSR__D2R__CH2_OP7 ((uint8_t* const) 0xFEC20579)
#define EXT_OPN2_7A_ADSR__D2R__CH3_OP7 ((uint8_t* const) 0xFEC2057A)
#define EXT_OPN2_7C_ADSR__D2R__CH1_OP8 ((uint8_t* const) 0xFEC2057C)
#define EXT_OPN2_7D_ADSR__D2R__CH2_OP8 ((uint8_t* const) 0xFEC2057D)
#define EXT_OPN2_7E_ADSR__D2R__CH3_OP8 ((uint8_t* const) 0xFEC2057E)
//)--------------------------------------------------------------------------------------
//)-------------------------- D2R (secondary decay rate) --------------------------------
//)--------------------------------------------------------------------------------------
//)
//) D2R (secondary decay rate) is the long tail off of the sound that continues as long
//) as the key is depressed.
//)
//)--------------------------------------------------------------------------------------
#define EXT_OPN2_80_ADSR__D1L_RR__CH1_OP1 ((uint8_t* const) 0xFEC20480)
#define EXT_OPN2_81_ADSR__D1L_RR__CH2_OP1 ((uint8_t* const) 0xFEC20481)
#define EXT_OPN2_82_ADSR__D1L_RR__CH3_OP1 ((uint8_t* const) 0xFEC20482)
#define EXT_OPN2_84_ADSR__D1L_RR__CH1_OP2 ((uint8_t* const) 0xFEC20484)
#define EXT_OPN2_85_ADSR__D1L_RR__CH2_OP2 ((uint8_t* const) 0xFEC20485)
#define EXT_OPN2_86_ADSR__D1L_RR__CH3_OP2 ((uint8_t* const) 0xFEC20486)
#define EXT_OPN2_88_ADSR__D1L_RR__CH1_OP3 ((uint8_t* const) 0xFEC20488)
#define EXT_OPN2_89_ADSR__D1L_RR__CH2_OP3 ((uint8_t* const) 0xFEC20489)
#define EXT_OPN2_8A_ADSR__D1L_RR__CH3_OP3 ((uint8_t* const) 0xFEC2048A)
#define EXT_OPN2_8C_ADSR__D1L_RR__CH1_OP4 ((uint8_t* const) 0xFEC2048C)
#define EXT_OPN2_8D_ADSR__D1L_RR__CH2_OP4 ((uint8_t* const) 0xFEC2048D)
#define EXT_OPN2_8E_ADSR__D1L_RR__CH3_OP4 ((uint8_t* const) 0xFEC2048E)
#define EXT_OPN2_80_ADSR__D1L_RR__CH1_OP5 ((uint8_t* const) 0xFEC20580)
#define EXT_OPN2_81_ADSR__D1L_RR__CH2_OP5 ((uint8_t* const) 0xFEC20581)
#define EXT_OPN2_82_ADSR__D1L_RR__CH3_OP5 ((uint8_t* const) 0xFEC20582)
#define EXT_OPN2_84_ADSR__D1L_RR__CH1_OP6 ((uint8_t* const) 0xFEC20584)
#define EXT_OPN2_85_ADSR__D1L_RR__CH2_OP6 ((uint8_t* const) 0xFEC20585)
#define EXT_OPN2_86_ADSR__D1L_RR__CH3_OP6 ((uint8_t* const) 0xFEC20586)
#define EXT_OPN2_88_ADSR__D1L_RR__CH1_OP7 ((uint8_t* const) 0xFEC20588)
#define EXT_OPN2_89_ADSR__D1L_RR__CH2_OP7 ((uint8_t* const) 0xFEC20589)
#define EXT_OPN2_8A_ADSR__D1L_RR__CH3_OP7 ((uint8_t* const) 0xFEC2058A)
#define EXT_OPN2_8C_ADSR__D1L_RR__CH1_OP8 ((uint8_t* const) 0xFEC2058C)
#define EXT_OPN2_8D_ADSR__D1L_RR__CH2_OP8 ((uint8_t* const) 0xFEC2058D)
#define EXT_OPN2_8E_ADSR__D1L_RR__CH3_OP8 ((uint8_t* const) 0xFEC2058E)
//)--------------------------------------------------------------------------------------
//)------------------------------------ SSG-EG ------------------------------------------
//)--------------------------------------------------------------------------------------
//)
//) This register is proprietary and should be set to zero.
//)
//)--------------------------------------------------------------------------------------
#define EXT_OPN2_90_ADSR__D1L_RR__CH1_OP1 ((uint8_t* const) 0xFEC20490)
#define EXT_OPN2_91_ADSR__D1L_RR__CH2_OP1 ((uint8_t* const) 0xFEC20491)
#define EXT_OPN2_92_ADSR__D1L_RR__CH3_OP1 ((uint8_t* const) 0xFEC20492)
#define EXT_OPN2_94_ADSR__D1L_RR__CH1_OP2 ((uint8_t* const) 0xFEC20494)
#define EXT_OPN2_95_ADSR__D1L_RR__CH2_OP2 ((uint8_t* const) 0xFEC20495)
#define EXT_OPN2_96_ADSR__D1L_RR__CH3_OP2 ((uint8_t* const) 0xFEC20496)
#define EXT_OPN2_98_ADSR__D1L_RR__CH1_OP3 ((uint8_t* const) 0xFEC20498)
#define EXT_OPN2_99_ADSR__D1L_RR__CH2_OP3 ((uint8_t* const) 0xFEC20499)
#define EXT_OPN2_9A_ADSR__D1L_RR__CH3_OP3 ((uint8_t* const) 0xFEC2049A)
#define EXT_OPN2_9C_ADSR__D1L_RR__CH1_OP4 ((uint8_t* const) 0xFEC2049C)
#define EXT_OPN2_9D_ADSR__D1L_RR__CH2_OP4 ((uint8_t* const) 0xFEC2049D)
#define EXT_OPN2_9E_ADSR__D1L_RR__CH3_OP4 ((uint8_t* const) 0xFEC2049E)
#define EXT_OPN2_90_ADSR__D1L_RR__CH4_OP1 ((uint8_t* const) 0xFEC20590)
#define EXT_OPN2_91_ADSR__D1L_RR__CH5_OP1 ((uint8_t* const) 0xFEC20591)
#define EXT_OPN2_92_ADSR__D1L_RR__CH6_OP1 ((uint8_t* const) 0xFEC20592)
#define EXT_OPN2_94_ADSR__D1L_RR__CH4_OP2 ((uint8_t* const) 0xFEC20594)
#define EXT_OPN2_95_ADSR__D1L_RR__CH5_OP2 ((uint8_t* const) 0xFEC20595)
#define EXT_OPN2_96_ADSR__D1L_RR__CH6_OP2 ((uint8_t* const) 0xFEC20596)
#define EXT_OPN2_98_ADSR__D1L_RR__CH4_OP3 ((uint8_t* const) 0xFEC20598)
#define EXT_OPN2_99_ADSR__D1L_RR__CH5_OP3 ((uint8_t* const) 0xFEC20599)
#define EXT_OPN2_9A_ADSR__D1L_RR__CH6_OP3 ((uint8_t* const) 0xFEC2059A)
#define EXT_OPN2_9C_ADSR__D1L_RR__CH4_OP4 ((uint8_t* const) 0xFEC2059C)
#define EXT_OPN2_9D_ADSR__D1L_RR__CH5_OP4 ((uint8_t* const) 0xFEC2059D)
#define EXT_OPN2_9E_ADSR__D1L_RR__CH6_OP4 ((uint8_t* const) 0xFEC2059E)
//)--------------------------------------------------------------------------------------
unsigned char * EXT_OPN2_A0_CH1_FREQ_L = (void *) 0xFEC204A0; //Frequency number LSB
unsigned char * EXT_OPN2_A1_CH2_FREQ_L = (void *) 0xFEC204A1; //Frequency number LSB
unsigned char * EXT_OPN2_A2_CH3_FREQ_L = (void *) 0xFEC204A2; //Frequency number LSB
unsigned char * EXT_OPN2_A2_CH3_FREQ_OP1_L = (void *) 0xFEC204A2; //Frequency number LSB Chanel 3 Operator 1 if special mode
unsigned char * EXT_OPN2_A8_CH3_FREQ_OP2_L = (void *) 0xFEC204A8; //Frequency number LSB Chanel 3 Operator 2 if special mode
unsigned char * EXT_OPN2_A9_CH3_FREQ_OP3_L = (void *) 0xFEC204A9; //Frequency number LSB Chanel 3 Operator 3 if special mode
unsigned char * EXT_OPN2_AA_CH3_FREQ_OP4_L = (void *) 0xFEC204AA; //Frequency number LSB Chanel 3 Operator 4 if special mode
unsigned char * EXT_OPN2_A0_CH4_FREQ_L = (void *) 0xFEC205A0; //Frequency number LSB
unsigned char * EXT_OPN2_A1_CH5_FREQ_L = (void *) 0xFEC205A1; //Frequency number LSB
unsigned char * EXT_OPN2_A2_CH6_FREQ_L = (void *) 0xFEC205A2; //Frequency number LSB
#define EXT_OPN2_A0_CH1_FREQ_L ((uint8_t* const) 0xFEC204A0) //Frequency number LSB
#define EXT_OPN2_A1_CH2_FREQ_L ((uint8_t* const) 0xFEC204A1) //Frequency number LSB
#define EXT_OPN2_A2_CH3_FREQ_L ((uint8_t* const) 0xFEC204A2) //Frequency number LSB
#define EXT_OPN2_A2_CH3_FREQ_OP1_L ((uint8_t* const) 0xFEC204A2) //Frequency number LSB Chanel 3 Operator 1 if special mode
#define EXT_OPN2_A8_CH3_FREQ_OP2_L ((uint8_t* const) 0xFEC204A8) //Frequency number LSB Chanel 3 Operator 2 if special mode
#define EXT_OPN2_A9_CH3_FREQ_OP3_L ((uint8_t* const) 0xFEC204A9) //Frequency number LSB Chanel 3 Operator 3 if special mode
#define EXT_OPN2_AA_CH3_FREQ_OP4_L ((uint8_t* const) 0xFEC204AA) //Frequency number LSB Chanel 3 Operator 4 if special mode
#define EXT_OPN2_A0_CH4_FREQ_L ((uint8_t* const) 0xFEC205A0) //Frequency number LSB
#define EXT_OPN2_A1_CH5_FREQ_L ((uint8_t* const) 0xFEC205A1) //Frequency number LSB
#define EXT_OPN2_A2_CH6_FREQ_L ((uint8_t* const) 0xFEC205A2) //Frequency number LSB
unsigned char * EXT_OPN2_A4_CH1_OCTAVE_FREQ_H = (void *) 0xFEC204A4; //OCTAVE and Frequency number MSB
unsigned char * EXT_OPN2_A5_CH2_OCTAVE_FREQ_H = (void *) 0xFEC204A5; //OCTAVE and Frequency number MSB
unsigned char * EXT_OPN2_A6_CH3_OCTAVE_FREQ_H = (void *) 0xFEC204A6; //OCTAVE and Frequency number MSB
unsigned char * EXT_OPN2_A6_CH3_OCTAVE_FREQ_OP1_H = (void *) 0xFEC204A6; //OCTAVE and Frequency number MSB Chanel 3 Operator 1 if special mode
unsigned char * EXT_OPN2_AC_CH3_OCTAVE_FREQ_OP2_H = (void *) 0xFEC204AC; //OCTAVE and Frequency number MSB Chanel 3 Operator 2 if special mode
unsigned char * EXT_OPN2_AD_CH3_OCTAVE_FREQ_OP3_H = (void *) 0xFEC204AD; //OCTAVE and Frequency number MSB Chanel 3 Operator 3 if special mode
unsigned char * EXT_OPN2_AE_CH3_OCTAVE_FREQ_OP4_H = (void *) 0xFEC204AE; //OCTAVE and Frequency number MSB Chanel 3 Operator 4 if special mode
unsigned char * EXT_OPN2_A4_CH4_OCTAVE_FREQ_H = (void *) 0xFEC205A4; //OCTAVE and Frequency number MSB
unsigned char * EXT_OPN2_A5_CH5_OCTAVE_FREQ_H = (void *) 0xFEC205A5; //OCTAVE and Frequency number MSB
unsigned char * EXT_OPN2_A6_CH6_OCTAVE_FREQ_H = (void *) 0xFEC205A6; //OCTAVE and Frequency number MSB
#define EXT_OPN2_A4_CH1_OCTAVE_FREQ_H ((uint8_t* const) 0xFEC204A4) //OCTAVE and Frequency number MSB
#define EXT_OPN2_A5_CH2_OCTAVE_FREQ_H ((uint8_t* const) 0xFEC204A5) //OCTAVE and Frequency number MSB
#define EXT_OPN2_A6_CH3_OCTAVE_FREQ_H ((uint8_t* const) 0xFEC204A6) //OCTAVE and Frequency number MSB
#define EXT_OPN2_A6_CH3_OCTAVE_FREQ_OP1_H ((uint8_t* const) 0xFEC204A6) //OCTAVE and Frequency number MSB Chanel 3 Operator 1 if special mode
#define EXT_OPN2_AC_CH3_OCTAVE_FREQ_OP2_H ((uint8_t* const) 0xFEC204AC) //OCTAVE and Frequency number MSB Chanel 3 Operator 2 if special mode
#define EXT_OPN2_AD_CH3_OCTAVE_FREQ_OP3_H ((uint8_t* const) 0xFEC204AD) //OCTAVE and Frequency number MSB Chanel 3 Operator 3 if special mode
#define EXT_OPN2_AE_CH3_OCTAVE_FREQ_OP4_H ((uint8_t* const) 0xFEC204AE) //OCTAVE and Frequency number MSB Chanel 3 Operator 4 if special mode
#define EXT_OPN2_A4_CH4_OCTAVE_FREQ_H ((uint8_t* const) 0xFEC205A4) //OCTAVE and Frequency number MSB
#define EXT_OPN2_A5_CH5_OCTAVE_FREQ_H ((uint8_t* const) 0xFEC205A5) //OCTAVE and Frequency number MSB
#define EXT_OPN2_A6_CH6_OCTAVE_FREQ_H ((uint8_t* const) 0xFEC205A6) //OCTAVE and Frequency number MSB
//; Feedback is the degree to which operator 1 feeds back into itself.
//; The algorithm is the type of inter-operator connection used
unsigned char * EXT_OPN2_B0_CH1_FEEDBACK_ALGO = (void *)0xFEC204B0;
unsigned char * EXT_OPN2_B1_CH2_FEEDBACK_ALGO = (void *)0xFEC204B1;
unsigned char * EXT_OPN2_B2_CH3_FEEDBACK_ALGO = (void *)0xFEC204B2;
unsigned char * EXT_OPN2_B0_CH4_FEEDBACK_ALGO = (void *)0xFEC205B0;
unsigned char * EXT_OPN2_B1_CH5_FEEDBACK_ALGO = (void *)0xFEC205B1;
unsigned char * EXT_OPN2_B2_CH6_FEEDBACK_ALGO = (void *)0xFEC205B2;
//) Feedback is the degree to which operator 1 feeds back into itself.
//) The algorithm is the type of inter-operator connection used
#define EXT_OPN2_B0_CH1_FEEDBACK_ALGO ((uint8_t* const)0xFEC204B0)
#define EXT_OPN2_B1_CH2_FEEDBACK_ALGO ((uint8_t* const)0xFEC204B1)
#define EXT_OPN2_B2_CH3_FEEDBACK_ALGO ((uint8_t* const)0xFEC204B2)
#define EXT_OPN2_B0_CH4_FEEDBACK_ALGO ((uint8_t* const)0xFEC205B0)
#define EXT_OPN2_B1_CH5_FEEDBACK_ALGO ((uint8_t* const)0xFEC205B1)
#define EXT_OPN2_B2_CH6_FEEDBACK_ALGO ((uint8_t* const)0xFEC205B2)
//; Register B4H contains stereo output control and LFO sensitivity control.
unsigned char * EXT_OPN2_B4_CH1_L_R_AMS_FMS = (void *)0xFEC204B0;
unsigned char * EXT_OPN2_B5_CH2_L_R_AMS_FMS = (void *)0xFEC204B1;
unsigned char * EXT_OPN2_B6_CH3_L_R_AMS_FMS = (void *)0xFEC204B2;
unsigned char * EXT_OPN2_B4_CH4_L_R_AMS_FMS = (void *)0xFEC205B0;
unsigned char * EXT_OPN2_B5_CH5_L_R_AMS_FMS = (void *)0xFEC205B1;
unsigned char * EXT_OPN2_B6_CH6_L_R_AMS_FMS = (void *)0xFEC205B2;
//) Register B4H contains stereo output control and LFO sensitivity control.
#define EXT_OPN2_B4_CH1_L_R_AMS_FMS ((uint8_t* const)0xFEC204B0)
#define EXT_OPN2_B5_CH2_L_R_AMS_FMS ((uint8_t* const)0xFEC204B1)
#define EXT_OPN2_B6_CH3_L_R_AMS_FMS ((uint8_t* const)0xFEC204B2)
#define EXT_OPN2_B4_CH4_L_R_AMS_FMS ((uint8_t* const)0xFEC205B0)
#define EXT_OPN2_B5_CH5_L_R_AMS_FMS ((uint8_t* const)0xFEC205B1)
#define EXT_OPN2_B6_CH6_L_R_AMS_FMS ((uint8_t* const)0xFEC205B2)
#endif

342
src/include/A2560K/sound_a2560k.h
View file

@ -5,15 +5,19 @@
#ifndef __SOUND_A2560K_H
#define __SOUND_A2560K_H
#define PSG_PORT ((volatile unsigned char *)0xFEC20100) /* Control register for the SN76489 */
#define PSG_INT_L_PORT ((volatile unsigned char *)0xFEC20110) /* Control register for the SN76489 */
#define PSG_INT_R_PORT ((volatile unsigned char *)0xFEC20120) /* Control register for the SN76489 */
#define PSG_INT_S_PORT ((volatile unsigned char *)0xFEC20130) /* Control register for the SN76489 */
#define OPL3_PORT ((volatile unsigned char *)0xFEC20200) /* Access port for the OPL3 */
#define OPM_EXT_BASE ((volatile unsigned char *)0xFEC20600) /* External OPM base address */
#define OPN2_EXT_BASE ((volatile unsigned char *)0xFEC20400) /* External OPN2 base address */
#define OPM_INT_BASE ((volatile unsigned char *)0xFEC20C00) /* Internal OPM base address */
#define OPN2_INT_BASE ((volatile unsigned char *)0xFEC20A00) /* Internal OPN2 base address */
#include <stdint.h>
#include "YM2151.h"
#define PSG_PORT ((volatile uint8_t *)0xFEC20100) /* Control register for the SN76489 */
#define PSG_INT_L_PORT ((volatile uint8_t *)0xFEC20110) /* Control register for the SN76489 */
#define PSG_INT_R_PORT ((volatile uint8_t *)0xFEC20120) /* Control register for the SN76489 */
#define PSG_INT_S_PORT ((volatile uint8_t *)0xFEC20130) /* Control register for the SN76489 */
#define OPL3_PORT ((volatile uint8_t *)0xFEC20200) /* Access port for the OPL3 */
#define OPM_EXT_BASE ((volatile uint8_t *)0xFEC20600) /* External OPM base address */
#define OPN2_EXT_BASE ((volatile uint8_t *)0xFEC20400) /* External OPN2 base address */
#define OPM_INT_BASE ((volatile uint8_t *)0xFEC20C00) /* Internal OPM base address */
#define OPN2_INT_BASE ((volatile uint8_t *)0xFEC20A00) /* Internal OPN2 base address */
#define CODEC ((volatile unsigned short *)0xFEC20E00) /* Control register for the CODEC */
/*
@ -31,185 +35,185 @@
* External SID Left Channel
*/
#define SID_EXT_L_V1_FREQ_LO ((unsigned char *)0xFEC20800)
#define SID_EXT_L_V1_FREQ_HI ((unsigned char *)0xFEC20801)
#define SID_EXT_L_V1_PW_LO ((unsigned char *)0xFEC20802)
#define SID_EXT_L_V1_PW_HI ((unsigned char *)0xFEC20803)
#define SID_EXT_L_V1_CTRL ((unsigned char *)0xFEC20804)
#define SID_EXT_L_V1_ATCK_DECY ((unsigned char *)0xFEC20805)
#define SID_EXT_L_V1_SSTN_RLSE ((unsigned char *)0xFEC20806)
#define SID_EXT_L_V2_FREQ_LO ((unsigned char *)0xFEC20807)
#define SID_EXT_L_V2_FREQ_HI ((unsigned char *)0xFEC20808)
#define SID_EXT_L_V2_PW_LO ((unsigned char *)0xFEC20809)
#define SID_EXT_L_V2_PW_HI ((unsigned char *)0xFEC2080A)
#define SID_EXT_L_V2_CTRL ((unsigned char *)0xFEC2080B)
#define SID_EXT_L_V2_ATCK_DECY ((unsigned char *)0xFEC2080C)
#define SID_EXT_L_V2_SSTN_RLSE ((unsigned char *)0xFEC2080D)
#define SID_EXT_L_V3_FREQ_LO ((unsigned char *)0xFEC2080E)
#define SID_EXT_L_V3_FREQ_HI ((unsigned char *)0xFEC2080F)
#define SID_EXT_L_V3_PW_LO ((unsigned char *)0xFEC20810)
#define SID_EXT_L_V3_PW_HI ((unsigned char *)0xFEC20811)
#define SID_EXT_L_V3_CTRL ((unsigned char *)0xFEC20812)
#define SID_EXT_L_V3_ATCK_DECY ((unsigned char *)0xFEC20813)
#define SID_EXT_L_V3_SSTN_RLSE ((unsigned char *)0xFEC20814)
#define SID_EXT_L_FC_LO ((unsigned char *)0xFEC20815)
#define SID_EXT_L_FC_HI ((unsigned char *)0xFEC20816)
#define SID_EXT_L_RES_FILT ((unsigned char *)0xFEC20817)
#define SID_EXT_L_MODE_VOL ((unsigned char *)0xFEC20818)
#define SID_EXT_L_POT_X ((unsigned char *)0xFEC20819)
#define SID_EXT_L_POT_Y ((unsigned char *)0xFEC2081A)
#define SID_EXT_L_OSC3_RND ((unsigned char *)0xFEC2081B)
#define SID_EXT_L_ENV3 ((unsigned char *)0xFEC2081C)
#define SID_EXT_L_NOT_USED0 ((unsigned char *)0xFEC2081D)
#define SID_EXT_L_NOT_USED1 ((unsigned char *)0xFEC2081E)
#define SID_EXT_L_NOT_USED2 ((unsigned char *)0xFEC2081F)
#define SID_EXT_L_V1_FREQ_LO ((uint8_t *)0xFEC20800)
#define SID_EXT_L_V1_FREQ_HI ((uint8_t *)0xFEC20801)
#define SID_EXT_L_V1_PW_LO ((uint8_t *)0xFEC20802)
#define SID_EXT_L_V1_PW_HI ((uint8_t *)0xFEC20803)
#define SID_EXT_L_V1_CTRL ((uint8_t *)0xFEC20804)
#define SID_EXT_L_V1_ATCK_DECY ((uint8_t *)0xFEC20805)
#define SID_EXT_L_V1_SSTN_RLSE ((uint8_t *)0xFEC20806)
#define SID_EXT_L_V2_FREQ_LO ((uint8_t *)0xFEC20807)
#define SID_EXT_L_V2_FREQ_HI ((uint8_t *)0xFEC20808)
#define SID_EXT_L_V2_PW_LO ((uint8_t *)0xFEC20809)
#define SID_EXT_L_V2_PW_HI ((uint8_t *)0xFEC2080A)
#define SID_EXT_L_V2_CTRL ((uint8_t *)0xFEC2080B)
#define SID_EXT_L_V2_ATCK_DECY ((uint8_t *)0xFEC2080C)
#define SID_EXT_L_V2_SSTN_RLSE ((uint8_t *)0xFEC2080D)
#define SID_EXT_L_V3_FREQ_LO ((uint8_t *)0xFEC2080E)
#define SID_EXT_L_V3_FREQ_HI ((uint8_t *)0xFEC2080F)
#define SID_EXT_L_V3_PW_LO ((uint8_t *)0xFEC20810)
#define SID_EXT_L_V3_PW_HI ((uint8_t *)0xFEC20811)
#define SID_EXT_L_V3_CTRL ((uint8_t *)0xFEC20812)
#define SID_EXT_L_V3_ATCK_DECY ((uint8_t *)0xFEC20813)
#define SID_EXT_L_V3_SSTN_RLSE ((uint8_t *)0xFEC20814)
#define SID_EXT_L_FC_LO ((uint8_t *)0xFEC20815)
#define SID_EXT_L_FC_HI ((uint8_t *)0xFEC20816)
#define SID_EXT_L_RES_FILT ((uint8_t *)0xFEC20817)
#define SID_EXT_L_MODE_VOL ((uint8_t *)0xFEC20818)
#define SID_EXT_L_POT_X ((uint8_t *)0xFEC20819)
#define SID_EXT_L_POT_Y ((uint8_t *)0xFEC2081A)
#define SID_EXT_L_OSC3_RND ((uint8_t *)0xFEC2081B)
#define SID_EXT_L_ENV3 ((uint8_t *)0xFEC2081C)
#define SID_EXT_L_NOT_USED0 ((uint8_t *)0xFEC2081D)
#define SID_EXT_L_NOT_USED1 ((uint8_t *)0xFEC2081E)
#define SID_EXT_L_NOT_USED2 ((uint8_t *)0xFEC2081F)
/*
* External SID Right Channel
*/
#define SID_EXT_R_V1_FREQ_LO ((unsigned char *)0xFEC20900)
#define SID_EXT_R_V1_FREQ_HI ((unsigned char *)0xFEC20901)
#define SID_EXT_R_V1_PW_LO ((unsigned char *)0xFEC20902)
#define SID_EXT_R_V1_PW_HI ((unsigned char *)0xFEC20903)
#define SID_EXT_R_V1_CTRL ((unsigned char *)0xFEC20904)
#define SID_EXT_R_V1_ATCK_DECY ((unsigned char *)0xFEC20905)
#define SID_EXT_R_V1_SSTN_RLSE ((unsigned char *)0xFEC20906)
#define SID_EXT_R_V2_FREQ_LO ((unsigned char *)0xFEC20907)
#define SID_EXT_R_V2_FREQ_HI ((unsigned char *)0xFEC20908)
#define SID_EXT_R_V2_PW_LO ((unsigned char *)0xFEC20909)
#define SID_EXT_R_V2_PW_HI ((unsigned char *)0xFEC2090A)
#define SID_EXT_R_V2_CTRL ((unsigned char *)0xFEC2090B)
#define SID_EXT_R_V2_ATCK_DECY ((unsigned char *)0xFEC2090C)
#define SID_EXT_R_V2_SSTN_RLSE ((unsigned char *)0xFEC2090D)
#define SID_EXT_R_V3_FREQ_LO ((unsigned char *)0xFEC2090E)
#define SID_EXT_R_V3_FREQ_HI ((unsigned char *)0xFEC2090F)
#define SID_EXT_R_V3_PW_LO ((unsigned char *)0xFEC20910)
#define SID_EXT_R_V3_PW_HI ((unsigned char *)0xFEC20911)
#define SID_EXT_R_V3_CTRL ((unsigned char *)0xFEC20912)
#define SID_EXT_R_V3_ATCK_DECY ((unsigned char *)0xFEC20913)
#define SID_EXT_R_V3_SSTN_RLSE ((unsigned char *)0xFEC20914)
#define SID_EXT_R_FC_LO ((unsigned char *)0xFEC20915)
#define SID_EXT_R_FC_HI ((unsigned char *)0xFEC20916)
#define SID_EXT_R_RES_FILT ((unsigned char *)0xFEC20917)
#define SID_EXT_R_MODE_VOL ((unsigned char *)0xFEC20918)
#define SID_EXT_R_POT_X ((unsigned char *)0xFEC20919)
#define SID_EXT_R_POT_Y ((unsigned char *)0xFEC2091A)
#define SID_EXT_R_OSC3_RND ((unsigned char *)0xFEC2091B)
#define SID_EXT_R_ENV3 ((unsigned char *)0xFEC2091C)
#define SID_EXT_R_NOT_USED0 ((unsigned char *)0xFEC2091D)
#define SID_EXT_R_NOT_USED1 ((unsigned char *)0xFEC2091E)
#define SID_EXT_R_NOT_USED2 ((unsigned char *)0xFEC2091F)
#define SID_EXT_R_V1_FREQ_LO ((uint8_t *)0xFEC20900)
#define SID_EXT_R_V1_FREQ_HI ((uint8_t *)0xFEC20901)
#define SID_EXT_R_V1_PW_LO ((uint8_t *)0xFEC20902)
#define SID_EXT_R_V1_PW_HI ((uint8_t *)0xFEC20903)
#define SID_EXT_R_V1_CTRL ((uint8_t *)0xFEC20904)
#define SID_EXT_R_V1_ATCK_DECY ((uint8_t *)0xFEC20905)
#define SID_EXT_R_V1_SSTN_RLSE ((uint8_t *)0xFEC20906)
#define SID_EXT_R_V2_FREQ_LO ((uint8_t *)0xFEC20907)
#define SID_EXT_R_V2_FREQ_HI ((uint8_t *)0xFEC20908)
#define SID_EXT_R_V2_PW_LO ((uint8_t *)0xFEC20909)
#define SID_EXT_R_V2_PW_HI ((uint8_t *)0xFEC2090A)
#define SID_EXT_R_V2_CTRL ((uint8_t *)0xFEC2090B)
#define SID_EXT_R_V2_ATCK_DECY ((uint8_t *)0xFEC2090C)
#define SID_EXT_R_V2_SSTN_RLSE ((uint8_t *)0xFEC2090D)
#define SID_EXT_R_V3_FREQ_LO ((uint8_t *)0xFEC2090E)
#define SID_EXT_R_V3_FREQ_HI ((uint8_t *)0xFEC2090F)
#define SID_EXT_R_V3_PW_LO ((uint8_t *)0xFEC20910)
#define SID_EXT_R_V3_PW_HI ((uint8_t *)0xFEC20911)
#define SID_EXT_R_V3_CTRL ((uint8_t *)0xFEC20912)
#define SID_EXT_R_V3_ATCK_DECY ((uint8_t *)0xFEC20913)
#define SID_EXT_R_V3_SSTN_RLSE ((uint8_t *)0xFEC20914)
#define SID_EXT_R_FC_LO ((uint8_t *)0xFEC20915)
#define SID_EXT_R_FC_HI ((uint8_t *)0xFEC20916)
#define SID_EXT_R_RES_FILT ((uint8_t *)0xFEC20917)
#define SID_EXT_R_MODE_VOL ((uint8_t *)0xFEC20918)
#define SID_EXT_R_POT_X ((uint8_t *)0xFEC20919)
#define SID_EXT_R_POT_Y ((uint8_t *)0xFEC2091A)
#define SID_EXT_R_OSC3_RND ((uint8_t *)0xFEC2091B)
#define SID_EXT_R_ENV3 ((uint8_t *)0xFEC2091C)
#define SID_EXT_R_NOT_USED0 ((uint8_t *)0xFEC2091D)
#define SID_EXT_R_NOT_USED1 ((uint8_t *)0xFEC2091E)
#define SID_EXT_R_NOT_USED2 ((uint8_t *)0xFEC2091F)
/*
* Internal SID Left Channel
*/
#define SID_INT_L_V1_FREQ_LO ((unsigned char *)0xFEC21000)
#define SID_INT_L_V1_FREQ_HI ((unsigned char *)0xFEC21001)
#define SID_INT_L_V1_PW_LO ((unsigned char *)0xFEC21002)
#define SID_INT_L_V1_PW_HI ((unsigned char *)0xFEC21003)
#define SID_INT_L_V1_CTRL ((unsigned char *)0xFEC21004)
#define SID_INT_L_V1_ATCK_DECY ((unsigned char *)0xFEC21005)
#define SID_INT_L_V1_SSTN_RLSE ((unsigned char *)0xFEC21006)
#define SID_INT_L_V2_FREQ_LO ((unsigned char *)0xFEC21007)
#define SID_INT_L_V2_FREQ_HI ((unsigned char *)0xFEC21008)
#define SID_INT_L_V2_PW_LO ((unsigned char *)0xFEC21009)
#define SID_INT_L_V2_PW_HI ((unsigned char *)0xFEC2100A)
#define SID_INT_L_V2_CTRL ((unsigned char *)0xFEC2100B)
#define SID_INT_L_V2_ATCK_DECY ((unsigned char *)0xFEC2100C)
#define SID_INT_L_V2_SSTN_RLSE ((unsigned char *)0xFEC2100D)
#define SID_INT_L_V3_FREQ_LO ((unsigned char *)0xFEC2100E)
#define SID_INT_L_V3_FREQ_HI ((unsigned char *)0xFEC2100F)
#define SID_INT_L_V3_PW_LO ((unsigned char *)0xFEC21010)
#define SID_INT_L_V3_PW_HI ((unsigned char *)0xFEC21011)
#define SID_INT_L_V3_CTRL ((unsigned char *)0xFEC21012)
#define SID_INT_L_V3_ATCK_DECY ((unsigned char *)0xFEC21013)
#define SID_INT_L_V3_SSTN_RLSE ((unsigned char *)0xFEC21014)
#define SID_INT_L_FC_LO ((unsigned char *)0xFEC21015)
#define SID_INT_L_FC_HI ((unsigned char *)0xFEC21016)
#define SID_INT_L_RES_FILT ((unsigned char *)0xFEC21017)
#define SID_INT_L_MODE_VOL ((unsigned char *)0xFEC21018)
#define SID_INT_L_POT_X ((unsigned char *)0xFEC21019)
#define SID_INT_L_POT_Y ((unsigned char *)0xFEC2101A)
#define SID_INT_L_OSC3_RND ((unsigned char *)0xFEC2101B)
#define SID_INT_L_ENV3 ((unsigned char *)0xFEC2101C)
#define SID_INT_L_NOT_USED0 ((unsigned char *)0xFEC2101D)
#define SID_INT_L_NOT_USED1 ((unsigned char *)0xFEC2101E)
#define SID_INT_L_NOT_USED2 ((unsigned char *)0xFEC2101F)
#define SID_INT_L_V1_FREQ_LO ((uint8_t *)0xFEC21000)
#define SID_INT_L_V1_FREQ_HI ((uint8_t *)0xFEC21001)
#define SID_INT_L_V1_PW_LO ((uint8_t *)0xFEC21002)
#define SID_INT_L_V1_PW_HI ((uint8_t *)0xFEC21003)
#define SID_INT_L_V1_CTRL ((uint8_t *)0xFEC21004)
#define SID_INT_L_V1_ATCK_DECY ((uint8_t *)0xFEC21005)
#define SID_INT_L_V1_SSTN_RLSE ((uint8_t *)0xFEC21006)
#define SID_INT_L_V2_FREQ_LO ((uint8_t *)0xFEC21007)
#define SID_INT_L_V2_FREQ_HI ((uint8_t *)0xFEC21008)
#define SID_INT_L_V2_PW_LO ((uint8_t *)0xFEC21009)
#define SID_INT_L_V2_PW_HI ((uint8_t *)0xFEC2100A)
#define SID_INT_L_V2_CTRL ((uint8_t *)0xFEC2100B)
#define SID_INT_L_V2_ATCK_DECY ((uint8_t *)0xFEC2100C)
#define SID_INT_L_V2_SSTN_RLSE ((uint8_t *)0xFEC2100D)
#define SID_INT_L_V3_FREQ_LO ((uint8_t *)0xFEC2100E)
#define SID_INT_L_V3_FREQ_HI ((uint8_t *)0xFEC2100F)
#define SID_INT_L_V3_PW_LO ((uint8_t *)0xFEC21010)
#define SID_INT_L_V3_PW_HI ((uint8_t *)0xFEC21011)
#define SID_INT_L_V3_CTRL ((uint8_t *)0xFEC21012)
#define SID_INT_L_V3_ATCK_DECY ((uint8_t *)0xFEC21013)
#define SID_INT_L_V3_SSTN_RLSE ((uint8_t *)0xFEC21014)
#define SID_INT_L_FC_LO ((uint8_t *)0xFEC21015)
#define SID_INT_L_FC_HI ((uint8_t *)0xFEC21016)
#define SID_INT_L_RES_FILT ((uint8_t *)0xFEC21017)
#define SID_INT_L_MODE_VOL ((uint8_t *)0xFEC21018)
#define SID_INT_L_POT_X ((uint8_t *)0xFEC21019)
#define SID_INT_L_POT_Y ((uint8_t *)0xFEC2101A)
#define SID_INT_L_OSC3_RND ((uint8_t *)0xFEC2101B)
#define SID_INT_L_ENV3 ((uint8_t *)0xFEC2101C)
#define SID_INT_L_NOT_USED0 ((uint8_t *)0xFEC2101D)
#define SID_INT_L_NOT_USED1 ((uint8_t *)0xFEC2101E)
#define SID_INT_L_NOT_USED2 ((uint8_t *)0xFEC2101F)
/*
* Internal SID Right Channel
*/
#define SID_INT_R_V1_FREQ_LO ((unsigned char *)0xFEC21200)
#define SID_INT_R_V1_FREQ_HI ((unsigned char *)0xFEC21201)
#define SID_INT_R_V1_PW_LO ((unsigned char *)0xFEC21202)
#define SID_INT_R_V1_PW_HI ((unsigned char *)0xFEC21203)
#define SID_INT_R_V1_CTRL ((unsigned char *)0xFEC21204)
#define SID_INT_R_V1_ATCK_DECY ((unsigned char *)0xFEC21205)
#define SID_INT_R_V1_SSTN_RLSE ((unsigned char *)0xFEC21206)
#define SID_INT_R_V2_FREQ_LO ((unsigned char *)0xFEC21207)
#define SID_INT_R_V2_FREQ_HI ((unsigned char *)0xFEC21208)
#define SID_INT_R_V2_PW_LO ((unsigned char *)0xFEC21209)
#define SID_INT_R_V2_PW_HI ((unsigned char *)0xFEC2120A)
#define SID_INT_R_V2_CTRL ((unsigned char *)0xFEC2120B)
#define SID_INT_R_V2_ATCK_DECY ((unsigned char *)0xFEC2120C)
#define SID_INT_R_V2_SSTN_RLSE ((unsigned char *)0xFEC2120D)
#define SID_INT_R_V3_FREQ_LO ((unsigned char *)0xFEC2120E)
#define SID_INT_R_V3_FREQ_HI ((unsigned char *)0xFEC2120F)
#define SID_INT_R_V3_PW_LO ((unsigned char *)0xFEC21210)
#define SID_INT_R_V3_PW_HI ((unsigned char *)0xFEC21211)
#define SID_INT_R_V3_CTRL ((unsigned char *)0xFEC21212)
#define SID_INT_R_V3_ATCK_DECY ((unsigned char *)0xFEC21213)
#define SID_INT_R_V3_SSTN_RLSE ((unsigned char *)0xFEC21214)
#define SID_INT_R_FC_LO ((unsigned char *)0xFEC21215)
#define SID_INT_R_FC_HI ((unsigned char *)0xFEC21216)
#define SID_INT_R_RES_FILT ((unsigned char *)0xFEC21217)
#define SID_INT_R_MODE_VOL ((unsigned char *)0xFEC21218)
#define SID_INT_R_POT_X ((unsigned char *)0xFEC21219)
#define SID_INT_R_POT_Y ((unsigned char *)0xFEC2121A)
#define SID_INT_R_OSC3_RND ((unsigned char *)0xFEC2121B)
#define SID_INT_R_ENV3 ((unsigned char *)0xFEC2121C)
#define SID_INT_R_NOT_USED0 ((unsigned char *)0xFEC2121D)
#define SID_INT_R_NOT_USED1 ((unsigned char *)0xFEC2121E)
#define SID_INT_R_NOT_USED2 ((unsigned char *)0xFEC2121F)
#define SID_INT_R_V1_FREQ_LO ((uint8_t *)0xFEC21200)
#define SID_INT_R_V1_FREQ_HI ((uint8_t *)0xFEC21201)
#define SID_INT_R_V1_PW_LO ((uint8_t *)0xFEC21202)
#define SID_INT_R_V1_PW_HI ((uint8_t *)0xFEC21203)
#define SID_INT_R_V1_CTRL ((uint8_t *)0xFEC21204)
#define SID_INT_R_V1_ATCK_DECY ((uint8_t *)0xFEC21205)
#define SID_INT_R_V1_SSTN_RLSE ((uint8_t *)0xFEC21206)
#define SID_INT_R_V2_FREQ_LO ((uint8_t *)0xFEC21207)
#define SID_INT_R_V2_FREQ_HI ((uint8_t *)0xFEC21208)
#define SID_INT_R_V2_PW_LO ((uint8_t *)0xFEC21209)
#define SID_INT_R_V2_PW_HI ((uint8_t *)0xFEC2120A)
#define SID_INT_R_V2_CTRL ((uint8_t *)0xFEC2120B)
#define SID_INT_R_V2_ATCK_DECY ((uint8_t *)0xFEC2120C)
#define SID_INT_R_V2_SSTN_RLSE ((uint8_t *)0xFEC2120D)
#define SID_INT_R_V3_FREQ_LO ((uint8_t *)0xFEC2120E)
#define SID_INT_R_V3_FREQ_HI ((uint8_t *)0xFEC2120F)
#define SID_INT_R_V3_PW_LO ((uint8_t *)0xFEC21210)
#define SID_INT_R_V3_PW_HI ((uint8_t *)0xFEC21211)
#define SID_INT_R_V3_CTRL ((uint8_t *)0xFEC21212)
#define SID_INT_R_V3_ATCK_DECY ((uint8_t *)0xFEC21213)
#define SID_INT_R_V3_SSTN_RLSE ((uint8_t *)0xFEC21214)
#define SID_INT_R_FC_LO ((uint8_t *)0xFEC21215)
#define SID_INT_R_FC_HI ((uint8_t *)0xFEC21216)
#define SID_INT_R_RES_FILT ((uint8_t *)0xFEC21217)
#define SID_INT_R_MODE_VOL ((uint8_t *)0xFEC21218)
#define SID_INT_R_POT_X ((uint8_t *)0xFEC21219)
#define SID_INT_R_POT_Y ((uint8_t *)0xFEC2121A)
#define SID_INT_R_OSC3_RND ((uint8_t *)0xFEC2121B)
#define SID_INT_R_ENV3 ((uint8_t *)0xFEC2121C)
#define SID_INT_R_NOT_USED0 ((uint8_t *)0xFEC2121D)
#define SID_INT_R_NOT_USED1 ((uint8_t *)0xFEC2121E)
#define SID_INT_R_NOT_USED2 ((uint8_t *)0xFEC2121F)
/*
* Internal SID Neutral Channel - When writting here, the value is written in R and L Channel at the same time
*/
#define SID_INT_N_V1_FREQ_LO ((unsigned char *)0xFEC41200)
#define SID_INT_N_V1_FREQ_HI ((unsigned char *)0xFEC41201)
#define SID_INT_N_V1_PW_LO ((unsigned char *)0xFEC41202)
#define SID_INT_N_V1_PW_HI ((unsigned char *)0xFEC41203)
#define SID_INT_N_V1_CTRL ((unsigned char *)0xFEC41204)
#define SID_INT_N_V1_ATCK_DECY ((unsigned char *)0xFEC41205)
#define SID_INT_N_V1_SSTN_RLSE ((unsigned char *)0xFEC41206)
#define SID_INT_N_V2_FREQ_LO ((unsigned char *)0xFEC41207)
#define SID_INT_N_V2_FREQ_HI ((unsigned char *)0xFEC41208)
#define SID_INT_N_V2_PW_LO ((unsigned char *)0xFEC41209)
#define SID_INT_N_V2_PW_HI ((unsigned char *)0xFEC4120A)
#define SID_INT_N_V2_CTRL ((unsigned char *)0xFEC4120B)
#define SID_INT_N_V2_ATCK_DECY ((unsigned char *)0xFEC4120C)
#define SID_INT_N_V2_SSTN_RLSE ((unsigned char *)0xFEC4120D)
#define SID_INT_N_V3_FREQ_LO ((unsigned char *)0xFEC4120E)
#define SID_INT_N_V3_FREQ_HI ((unsigned char *)0xFEC4120F)
#define SID_INT_N_V3_PW_LO ((unsigned char *)0xFEC41210)
#define SID_INT_N_V3_PW_HI ((unsigned char *)0xFEC41211)
#define SID_INT_N_V3_CTRL ((unsigned char *)0xFEC41212)
#define SID_INT_N_V3_ATCK_DECY ((unsigned char *)0xFEC41213)
#define SID_INT_N_V3_SSTN_RLSE ((unsigned char *)0xFEC41214)
#define SID_INT_N_FC_LO ((unsigned char *)0xFEC41215)
#define SID_INT_N_FC_HI ((unsigned char *)0xFEC41216)
#define SID_INT_N_RES_FILT ((unsigned char *)0xFEC41217)
#define SID_INT_N_MODE_VOL ((unsigned char *)0xFEC41218)
#define SID_INT_N_POT_X ((unsigned char *)0xFEC41219)
#define SID_INT_N_POT_Y ((unsigned char *)0xFEC4121A)
#define SID_INT_N_OSC3_RND ((unsigned char *)0xFEC4121B)
#define SID_INT_N_ENV3 ((unsigned char *)0xFEC4121C)
#define SID_INT_N_NOT_USED0 ((unsigned char *)0xFEC4121D)
#define SID_INT_N_NOT_USED1 ((unsigned char *)0xFEC4121E)
#define SID_INT_N_NOT_USED2 ((unsigned char *)0xFEC4121F)
#define SID_INT_N_V1_FREQ_LO ((uint8_t *)0xFEC41200)
#define SID_INT_N_V1_FREQ_HI ((uint8_t *)0xFEC41201)
#define SID_INT_N_V1_PW_LO ((uint8_t *)0xFEC41202)
#define SID_INT_N_V1_PW_HI ((uint8_t *)0xFEC41203)
#define SID_INT_N_V1_CTRL ((uint8_t *)0xFEC41204)
#define SID_INT_N_V1_ATCK_DECY ((uint8_t *)0xFEC41205)
#define SID_INT_N_V1_SSTN_RLSE ((uint8_t *)0xFEC41206)
#define SID_INT_N_V2_FREQ_LO ((uint8_t *)0xFEC41207)
#define SID_INT_N_V2_FREQ_HI ((uint8_t *)0xFEC41208)
#define SID_INT_N_V2_PW_LO ((uint8_t *)0xFEC41209)
#define SID_INT_N_V2_PW_HI ((uint8_t *)0xFEC4120A)
#define SID_INT_N_V2_CTRL ((uint8_t *)0xFEC4120B)
#define SID_INT_N_V2_ATCK_DECY ((uint8_t *)0xFEC4120C)
#define SID_INT_N_V2_SSTN_RLSE ((uint8_t *)0xFEC4120D)
#define SID_INT_N_V3_FREQ_LO ((uint8_t *)0xFEC4120E)
#define SID_INT_N_V3_FREQ_HI ((uint8_t *)0xFEC4120F)
#define SID_INT_N_V3_PW_LO ((uint8_t *)0xFEC41210)
#define SID_INT_N_V3_PW_HI ((uint8_t *)0xFEC41211)
#define SID_INT_N_V3_CTRL ((uint8_t *)0xFEC41212)
#define SID_INT_N_V3_ATCK_DECY ((uint8_t *)0xFEC41213)
#define SID_INT_N_V3_SSTN_RLSE ((uint8_t *)0xFEC41214)
#define SID_INT_N_FC_LO ((uint8_t *)0xFEC41215)
#define SID_INT_N_FC_HI ((uint8_t *)0xFEC41216)
#define SID_INT_N_RES_FILT ((uint8_t *)0xFEC41217)
#define SID_INT_N_MODE_VOL ((uint8_t *)0xFEC41218)
#define SID_INT_N_POT_X ((uint8_t *)0xFEC41219)
#define SID_INT_N_POT_Y ((uint8_t *)0xFEC4121A)
#define SID_INT_N_OSC3_RND ((uint8_t *)0xFEC4121B)
#define SID_INT_N_ENV3 ((uint8_t *)0xFEC4121C)
#define SID_INT_N_NOT_USED0 ((uint8_t *)0xFEC4121D)
#define SID_INT_N_NOT_USED1 ((uint8_t *)0xFEC4121E)
#define SID_INT_N_NOT_USED2 ((uint8_t *)0xFEC4121F)
#endif

10
src/include/A2560U/VICKYIII_a2560u.h
View file

@ -25,7 +25,7 @@
#define VKY3_MCR_640x400 0x00000300
#define VKY3_MCR_DOUBLE_EN 0x00000400 /* Doubling Pixel */
#define VKY3_MCR_RES_MASK (VKY3_MCR_800x600|VKY3_MCR_1024x768|VKY3_MCR_DOUBLE_EN) /* Bits used to set the resolution */
#define VKY3_MCR_GAMMA_EN 0x00010000 /* GAMMA Enable */
#define VKY3_MCR_GAMMA_EN 0x00010000 /* GAMMA source: 0: DIP switch, 1: VKY3_MCR_MANUAL_GAMMA_EN */
#define VKY3_MCR_MANUAL_GAMMA_EN 0x00020000 /* Enable Manual GAMMA Enable */
#define VKY3_MCR_BLANK_EN 0x00040000 /* Turn OFF sync (to monitor in sleep mode) */
@ -62,10 +62,10 @@
#define MousePtr_A_Mouse1 ((volatile unsigned short *)0x00B40C0C)
#define MousePtr_A_Mouse2 ((volatile unsigned short *)0x00B40C0E)
#define ScreenText_A ((volatile char *)0x00B60000) /* Text matrix */
#define ColorText_A ((volatile unsigned char *)0x00B68000) /* Color matrix */
#define FG_CLUT_A ((volatile unsigned short *)0x00B6C400) /* Foreground LUT */
#define BG_CLUT_A ((volatile unsigned short *)0x00B6C440) /* Background LUT */
#define ScreenText_A ((volatile char * const)0x00B60000) /* Text matrix */
#define ColorText_A ((volatile unsigned char * const)0x00B68000) /* Color matrix */
#define FG_CLUT_A ((volatile unsigned short *const)0x00B6C400) /* Foreground LUT */
#define BG_CLUT_A ((volatile unsigned short *const)0x00B6C440) /* Background LUT */
#define BM0_Control_Reg ((volatile unsigned long *)0x00B40100)
#define BM0_Addy_Pointer_Reg ((volatile unsigned long *)0x00B40104)

36
src/include/C256/dma_c256.h Normal file
View file

@ -0,0 +1,36 @@
/**
* @file dma_c256.h
* @brief Definitions of the video and system DMA registers
* @version 0.1
* @date 2023-10-02
*
*/
#ifndef __DMA_C256_H_
#define __DMA_C256_H_
#define VDMA_CTRL ((volatile __attribute__((far)) uint8_t *)0xaf0400)
#define VDMA_CTRL_EN 0x01
#define VDMA_CTRL_2D 0x02
#define VDMA_CTRL_FILL 0x04
#define VDMA_CTRL_IEN 0x08 // Interrupt Enable
#define VDMA_CTRL_SRC_SRAM 0x10
#define VDMA_CTRL_DST_SRAM 0x20
#define VDMA_CTRL_TRF 0x80
#define VDMA_STAT ((volatile __attribute__((far)) uint8_t *)0xaf0401)
#define VDMA_STAT_ERR_SIZE 0x01
#define VDMA_STAT_ERR_DST 0x02
#define VDMA_STAT_ERR_SRC 0x04
#define VDMA_STAT_TFR_BUSY 0x80
#define VDMA_FILL_VALUE ((volatile __attribute__((far)) uint8_t *)0xaf0401)
#define VDMA_SRC_ADDR ((volatile __attribute__((far)) uint8_t *)0xaf0402)
#define VDMA_DST_ADDR ((volatile __attribute__((far)) uint8_t *)0xaf0405)
#define VDMA_SIZE ((volatile __attribute__((far)) uint8_t *)0xaf0408)
#define VDMA_SIZE_X ((volatile __attribute__((far)) uint16_t *)0xaf0408)
#define VDMA_SIZE_Y ((volatile __attribute__((far)) uint16_t *)0xaf040a)
#define VDMA_SRC_STRIDE ((volatile __attribute__((far)) uint16_t *)0xaf040c)
#define VDMA_DST_STRIDE ((volatile __attribute__((far)) uint16_t *)0xaf040e)
#endif

47
src/include/C256/exp_c256.h Normal file
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@ -0,0 +1,47 @@
/**
* @file expansion.h
* @brief Register definitions for the C256 expansion card
* @version 0.1
* @date 2023-08-30
*
*/
#ifndef __EXPANSION_H_
#define __EXPANSION_H_
#include <stdint.h>
#include "sys_general.h"
#if MODEL == MODEL_FOENIX_FMX || MODEL == MODEL_FOENIX_C256U || MODEL == MODEL_FOENIX_C256U_PLUS
struct s_c256_exp_card {
char card_name[16]; // ASCII-Z name of card (max 15 characters)
uint16_t vendor_id; // ID of vendor
uint16_t card_id; // ID of card
uint16_t class_id; // TBD
uint16_t subclass_id; // TBD
uint16_t rsrv1; // Reserved
uint8_t hardware_revision; // 00 in hex
uint8_t fpga_rev; // 00 in hex
uint16_t rsrv2; // Reserved
uint16_t chksum; // Not implemented
};
#define EXP_CARD_INFO ((volatile __attribute__((far)) struct s_c256_exp_card *)0xae0000)
/**
* Card Vendor IDs (currently there is only an ID for Foenix Retro Systems)
*/
#define EXP_VENDOR_FOENIX 0xf0e1
/**
* Expansion Card IDs (currently only the EVID and ESID cards are supported)
*/
#define EXP_CARD_C100_ESID 0x9172
#define EXP_CARD_C200_EVID 0x00c8
#endif
#endif

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/**
* @file gabe.h
* @brief Definitions for the GABE chip
* @version 0.1
* @date 2023-08-30
*
*/
#ifndef __GABE_H_
#define __GABE_H_
#include <stdint.h>
#include "types.h"
#define GABE_CTRL_REG ((volatile __attribute__((far)) uint8_t *)0xafe880)
#define GABE_CTRL_PWR_LED 0x01 // Controls the LED in the Front of the case (Next to the reset button)
#define GABE_CTRL_SDC_LED 0x02 // Controls the LED in the Front of the Case (Next to SDCard)
#define GABE_CTRL_STS_LED0 0x04 // Control Status LED0 (General Use) - C256 Foenix U Only
#define GABE_CTRL_STS_LED1 0x08 // Control Status LED0 (General Use) - C256 Foenix U Only
#define BUZZER_CONTROL 0x10 // Controls the Buzzer
#define GABE_CTRL_WRM_RST 0x80 // Warm Reset (needs to Setup other registers)
#define GABE_RST_AUTH ((volatile __attribute__((far)) uint16_t *)0xafe882) // Set to 0xDEAD to enable reset
#define GABE_LED_FLASH_CTRL ((volatile __attribute__((far)) uint8_t *)0xafe881) // Flashing LED Control
#define GABE_LED0_FLASH_CTRL 0x01 // 0- Automatic Flash 1 - Bypass Flash Timer (Use GABE_CTRL_STS_LED0 to manually control)
#define GABE_LED1_FLASH_CTRL 0x02 // 0- Automatic Flash 1 - Bypass Flash Timer (Use GABE_CTRL_STS_LED1 to manually control)
#define GABE_LD0_FLASH_FRQ_MASK 0x30
#define GABE_LD0_FLASH_FRQ_1HZ 0x00 // LD0 flashes at 1Hz
#define GABE_LD0_FLASH_FRQ_2HZ 0x10 // LD0 flashes at 2Hz
#define GABE_LD0_FLASH_FRQ_4HZ 0x20 // LD0 flashes at 4Hz
#define GABE_LD0_FLASH_FRQ_5HZ 0x30 // LD0 flashes at 5Hz
#define GABE_LD1_FLASH_FRQ_MASK 0xc0
#define GABE_LD1_FLASH_FRQ_1HZ 0x00 // LD1 flashes at 2Hz
#define GABE_LD1_FLASH_FRQ_2HZ 0x40 // LD1 flashes at 4Hz
#define GABE_LD1_FLASH_FRQ_4HZ 0x80 // LD1 flashes at 5Hz
#define GABE_LD1_FLASH_FRQ_5HZ 0xc0 // LD1 flashes at 1Hz
#define GABE_RNG_DATA ((volatile __attribute__((far)) uint16_t *)0xafe884) // Random Number Generator (read for data, write for seed)
#define GABE_RNG_SEED ((volatile __attribute__((far)) uint16_t *)0xafe884) // Random Number Generator (read for data, write for seed)
#define GABE_RNG_STAT ((volatile __attribute__((far)) uint16_t *)0xafe886) // Random Number Generator Status (read)
#define GABE_RNG_LFSR_DONE 0x80
#define GABE_RNG_CTRL ((volatile __attribute__((far)) uint16_t *)0xafe886) // Random Number Generator Control (write)
#define GABE_RNG_CTRL_EN 0x01 // Enable the LFSR block
#define GABE_RNG_CTRL_LD_SEED 0x02 // Toggle after setting seed to load seed
#define GABE_DIP_REG ((volatile __attribute__((far)) uint16_t *)0xafe80e) // User and boot mode DIP switches
#define HD_INSTALLED 0x0080
#define DIP_BOOT_IDE 0x0000
#define DIP_BOOT_SDCARD 0x0100
#define DIP_BOOT_FLOPPY 0x0200
/**
* @brief Structure to represent the machine ID and expansion card info
*
*/
union gabe_sys_stat_u {
struct {
uint8_t machine_id:3;
uint8_t rsrv:1;
uint8_t no_expansion:1;
};
uint8_t reg;
};
#define GABE_SYS_STAT ((volatile __attribute__((far)) union gabe_sys_stat_u *)0xafe887)
/**
* @brief Structure to respresent the version of the GABE chip
*
*/
struct gabe_version_s {
uint16_t subversion;
uint16_t version;
uint16_t model;
};
#define GABE_VERSION ((volatile __attribute__((far)) struct gabe_version_s *)0xafe88a)
#endif

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/*
* Definitions to access the PATA port on the C256
*/
#ifndef __PATA_C256_H
#define __PATA_C256_H
#include <stdint.h>
#define PATA_DATA_16 ((volatile uint16_t *)0xAFE838)
#define PATA_DATA_8 ((volatile uint8_t *)0xAFE830)
#define PATA_ERROR ((volatile uint8_t *)0xAFE831)
#define PATA_SECT_CNT ((volatile uint8_t *)0xAFE832)
#define PATA_SECT_SRT ((volatile uint8_t *)0xAFE833)
#define PATA_CLDR_LO ((volatile uint8_t *)0xAFE834)
#define PATA_CLDR_HI ((volatile uint8_t *)0xAFE835)
#define PATA_HEAD ((volatile uint8_t *)0xAFE836)
#define PATA_CMD_STAT ((volatile uint8_t *)0xAFE837)
#endif

26
src/include/C256/ps2_c256.h Normal file
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#ifndef __PS2_C256_H
#define __PS2_C256_H
/*
* Ports for the PS/2 keyboard and mouse on the C256
*/
#if MODEL == MODEL_FOENIX_FMX
#define PS2_STATUS ((volatile __attribute__((far)) char *)0xaf1064)
#define PS2_CMD_BUF ((volatile __attribute__((far)) char *)0xaf1064)
#define PS2_OUT_BUF ((volatile __attribute__((far)) char *)0xaf1060)
#define PS2_INPT_BUF ((volatile __attribute__((far)) char *)0xaf1060)
#define PS2_DATA_BUF ((volatile __attribute__((far)) char *)0xaf1060)
#else
#define PS2_STATUS ((volatile __attribute__((far)) char *)0xaf1807)
#define PS2_CMD_BUF ((volatile __attribute__((far)) char *)0xaf1807)
#define PS2_OUT_BUF ((volatile __attribute__((far)) char *)0xaf1803)
#define PS2_INPT_BUF ((volatile __attribute__((far)) char *)0xaf1803)
#define PS2_DATA_BUF ((volatile __attribute__((far)) char *)0xaf1803)
#endif
#endif

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src/include/C256/sdc_c256.h Normal file
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/*
* Definitions for access to the SDC controller
*/
#ifndef __SDC_C256_H
#define __SDC_C256_H
#include <stdint.h>
#define GABE_SDC_REG ((volatile uint8_t *)0xafe812)
#define GABE_SDC_PRESENT 0x01 /* Is an SD card present? --- 0:Yes, 1:No */
#define GABE_SDC_WPROT 0x02 /* Is the SD card write protected? --- 0:Yes, 1:No */
#define SDC_VERSION_REG ((volatile uint8_t *)0xafea00)
#define SDC_CONTROL_REG ((volatile uint8_t *)0xafea01)
#define SDC_TRANS_TYPE_REG ((volatile uint8_t *)0xafea02)
#define SDC_TRANS_CONTROL_REG ((volatile uint8_t *)0xafea03)
#define SDC_TRANS_STATUS_REG ((volatile uint8_t *)0xafea04)
#define SDC_TRANS_ERROR_REG ((volatile uint8_t *)0xafea05)
#define SDC_DIRECT_ACCESS_REG ((volatile uint8_t *)0xafea06)
#define SDC_SD_ADDR_7_0_REG ((volatile uint8_t *)0xafea07)
#define SDC_SD_ADDR_15_8_REG ((volatile uint8_t *)0xafea08)
#define SDC_SD_ADDR_23_16_REG ((volatile uint8_t *)0xafea09)
#define SDC_SD_ADDR_31_24_REG ((volatile uint8_t *)0xafea0A)
#define SDC_SPI_CLK_DEL_REG ((volatile uint8_t *)0xafea0B)
#define SDC_RX_FIFO_DATA_REG ((volatile uint8_t *)0xafea10)
#define SDC_RX_FIFO_DATA_CNT_HI ((volatile uint8_t *)0xafea12)
#define SDC_RX_FIFO_DATA_CNT_LO ((volatile uint8_t *)0xafea13)
#define SDC_RX_FIFO_CTRL_REG ((volatile uint8_t *)0xafea14)
#define SDC_TX_FIFO_DATA_REG ((volatile uint8_t *)0xafea20)
#define SDC_TX_FIFO_CTRL_REG ((volatile uint8_t *)0xafea24)
#endif

49
src/include/C256/sound_c256.h Normal file
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/*
* Sound device register definitions for the C256
*/
#ifndef __SOUND_C256_H
#define __SOUND_C256_H
#include <stdint.h>
struct s_sid_voice {
uint16_t frequency;
uint16_t pulse_width;
uint8_t control;
uint8_t attack_decay;
uint8_t sustain_release;
};
struct s_sid {
struct s_sid_voice v1;
struct s_sid_voice v2;
struct s_sid_voice v3;
uint16_t filter_frequency;
uint8_t resonance_filter;
uint8_t mode_volume;
uint8_t pot_x;
uint8_t pot_y;
uint8_t osc3;
uint8_t env3;
};
#define PSG_PORT ((volatile __attribute__((far)) uint8_t *)0xaff100) /* Control register for the SN76489 */
#define OPL3_PORT ((volatile unsigned char *)0xFEC20200) /* Access port for the OPL3 */
// #define OPM_EXT_BASE ((volatile unsigned char *)0xFEC20600) /* External OPM base address */
// #define OPN2_EXT_BASE ((volatile unsigned char *)0xFEC20400) /* External OPN2 base address */
// #define OPM_INT_BASE ((volatile unsigned char *)0xFEC20C00) /* Internal OPM base address */
// #define OPN2_INT_BASE ((volatile unsigned char *)0xFEC20A00) /* Internal OPN2 base address */
#define CODEC ((volatile __attribute__((far)) uint16_t *)0xafe900) /* Data register for the CODEC */
#define CODEC_WR_CTRL ((volatile __attribute__((far)) uint8_t *)0xafe902) /* Data register for the CODEC */
/*
* Internal SID
*/
#define SID_INT_N_V1_FREQ_LO ((volatile __attribute__((far)) uint8_t *)0xafe400)
#define SID_INT_N ((volatile __attribute__((far)) struct s_sid *)0xafe400)
#endif

61
src/include/C256/timers_c256.h Normal file
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/**
* @file timers_c256.h
*
* Define timer registers on the C256
*/
#ifndef __C256_TIMERS_H
#define __C256_TIMERS_H
//
// TIMER_CTRL_* flags
//
#define TIMER_CTRL_EN 0x01 // Set to enable timer
#define TIMER_CTRL_SCLR 0x02 // Set to clear the timer for counting up
#define TIMER_CTRL_SLOAD 0x04 // Set to load the timer for counting down
#define TIMER_CTRL_CNT_UP 0x08 // Set to count up, clear to count down
//
// TIMER_CMP_* flags
//
#define TIMER_CMP_RECLR 0x01 // Set to reclear the register on reaching the comparison value
#define TIMER_CMP_RELOAD 0x02 // Set to reload the charge value on reaching 0
//
// Timer 0 and 1 -- Based on system clock (14318180Hz)
//
#define TIMER_CTRL_0 ((volatile __attribute__((far)) uint8_t *)0x000160)
#define TIMER_CHG_L_0 ((volatile __attribute__((far)) uint8_t *)0x000161)
#define TIMER_CHG_M_0 ((volatile __attribute__((far)) uint8_t *)0x000162)
#define TIMER_CHG_H_0 ((volatile __attribute__((far)) uint8_t *)0x000163)
#define TIMER_CMPC_0 ((volatile __attribute__((far)) uint8_t *)0x000164)
#define TIMER_CMP_L_0 ((volatile __attribute__((far)) uint8_t *)0x000165)
#define TIMER_CMP_M_0 ((volatile __attribute__((far)) uint8_t *)0x000166)
#define TIMER_CMP_H_0 ((volatile __attribute__((far)) uint8_t *)0x000167)
#define TIMER_CTRL_1 ((volatile __attribute__((far)) uint8_t *)0x000168)
#define TIMER_CHG_L_1 ((volatile __attribute__((far)) uint8_t *)0x000169)
#define TIMER_CHG_M_1 ((volatile __attribute__((far)) uint8_t *)0x00016a)
#define TIMER_CHG_H_1 ((volatile __attribute__((far)) uint8_t *)0x00016b)
#define TIMER_CMPC_1 ((volatile __attribute__((far)) uint8_t *)0x00016c)
#define TIMER_CMP_L_1 ((volatile __attribute__((far)) uint8_t *)0x00016d)
#define TIMER_CMP_M_1 ((volatile __attribute__((far)) uint8_t *)0x00016e)
#define TIMER_CMP_H_1 ((volatile __attribute__((far)) uint8_t *)0x00016f)
//
// Timer 2 -- Based on start of frame clock (60/70 Hz)
//
#define TIMER_CTRL_2 ((volatile __attribute__((far)) uint8_t *)0x000170)
#define TIMER_CHG_L_2 ((volatile __attribute__((far)) uint8_t *)0x000171)
#define TIMER_CHG_M_2 ((volatile __attribute__((far)) uint8_t *)0x000172)
#define TIMER_CHG_H_2 ((volatile __attribute__((far)) uint8_t *)0x000173)
#define TIMER_CMPC_2 ((volatile __attribute__((far)) uint8_t *)0x000174)
#define TIMER_CMP_L_2 ((volatile __attribute__((far)) uint8_t *)0x000175)
#define TIMER_CMP_M_2 ((volatile __attribute__((far)) uint8_t *)0x000176)
#define TIMER_CMP_H_2 ((volatile __attribute__((far)) uint8_t *)0x000177)
#endif

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src/include/C256/vicky_ii.h Normal file
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@ -0,0 +1,143 @@
/**
* @file c256_vicky_ii.h
* @author Peter Weingartner (pjw@tailrecursive.org)
* @brief Define the registers for Vicky II on the C256 computers.
* @version 0.1
* @date 2023-08-07
*
* @copyright Copyright (c) 2023
*
*/
#ifndef __c256_vicky_ii__
#define __c256_vicky_ii__
#include "types.h"
#include <stdint.h>
/**
* @brief Vicky II Master Control Register
*
*/
typedef struct tvky_mstr_ctrl_s {
union {
struct {
int text_enable:1;
int text_overlay:1;
int graphics_enable:1;
int bitmap_enable:1;
int tile_enable:1;
int sprite_enable:1;
int gamma_enable:1;
int disable:1;
int mode:2;
};
uint16_t raw;
};
} *tvky_mstr_ctrl_p;
#define VKY_MCR_TEXT 0x0001
#define VKY_MCR_TEXT_OVERLAY 0x0002
#define VKY_MCR_GRAPHICS 0x0004
#define VKY_MCR_BITMAP 0x0008
#define VKY_MCR_TILE 0x0010
#define VKY_MCR_SPRITE 0x0020
#define VKY_MCR_GAMMA 0x0040
#define VKY_MCR_DISABLE 0x0080
#define VKY_MCR_RES_MASK 0x0300
#define VKY_MCR_RES_320x240 0x0200
#define VKY_MCR_RES_640x480 0x0000
#define VKY_MCR_RES_400x300 0x0300
#define VKY_MCR_RES_800x600 0x0100
/**
* @brief Vicky II Border Control Registers
*
*/
typedef struct tvky_border_ctrl_s {
uint8_t control;
t_color3 color;
uint8_t size_x;
uint8_t sizy_y;
} *tvky_border_ctrl_p;
/**
* @brief Vicky II Cursor Control Registers
*
*/
typedef struct tvky_crsr_ctrl_s {
uint8_t control;
uint8_t start_address;
char character;
uint8_t color;
uint16_t column;
uint16_t row;
} *tvky_crsr_ctrl_p;
//
// Define the locations of the registers
//
#define tvky_mstr_ctrl ((volatile __attribute__((far)) tvky_mstr_ctrl_p)0xaf0000)
#define tvky_brdr_ctrl ((volatile __attribute__((far)) tvky_border_ctrl_p)0xaf0004)
#define tvky_bg_color ((volatile __attribute__((far)) t_color3 *)0xaf000d)
#define tvky_crsr_ctrl ((volatile __attribute__((far)) tvky_crsr_ctrl_p)0xaf0010)
//
// Text Color Lookup Tables
//
#define tvky_text_fg_color ((volatile __attribute__((far)) t_color4 *)0xaf1f40)
#define tvky_text_bg_color ((volatile __attribute__((far)) t_color4 *)0xaf1f80)
//
// Text Fonts Sets 0 and 1
//
#define tvky_font_set_0 ((volatile __attribute__((far)) uint8_t *)0xaf8000)
//
// Graphics Color Lookup Tables
//
#define VKY_GR_CLUT_0 ((volatile __attribute__((far)) uint8_t *)0xaf2000)
#define VKY_GR_CLUT_1 ((volatile __attribute__((far)) uint8_t *)0xaf2400)
#define VKY_GR_CLUT_2 ((volatile __attribute__((far)) uint8_t *)0xaf2800)
#define VKY_GR_CLUT_3 ((volatile __attribute__((far)) uint8_t *)0xaf2c00)
//
// Text mode text and color matrixes
//
#define tvky_text_matrix ((volatile __attribute__((far)) char *)0xafa000)
#define tvky_color_matrix ((volatile __attribute__((far)) char *)0xafc000)
//
// Bitmap graphics registers
//
typedef volatile __attribute__((far24)) uint8_t *p_far24;
#define bm0_control ((volatile __attribute__((far)) uint8_t *)0xaf0100)
#define bm0_address ((volatile __attribute__((far)) uint8_t *)0xaf0101)
#define bm0_offset_x ((volatile __attribute__((far)) uint16_t *)0xaf0104)
#define bm0_offset_y ((volatile __attribute__((far)) uint16_t *)0xaf0106)
#define bm1_control ((volatile __attribute__((far)) uint8_t *)0xaf0108)
#define bm1_address ((volatile __attribute__((far)) uint8_t *)0xaf0109)
#define bm1_offset_x ((volatile __attribute__((far)) uint16_t *)0xaf010c)
#define bm1_offset_y ((volatile __attribute__((far)) uint16_t *)0xaf010d)
#define MousePointer_Mem_A ((volatile uint8_t *)0xaf0500)
#define MousePtr_A_CTRL_Reg ((volatile uint16_t *)0xaf0700)
#define MousePtr_En 0x0001
#define MousePtr_A_X_Pos ((volatile uint16_t *)0xaf0702)
#define MousePtr_A_Y_Pos ((volatile uint16_t *)0xaf0704)
#define MousePtr_A_Mouse0 ((volatile uint8_t *)0xaf0706)
#define MousePtr_A_Mouse1 ((volatile uint8_t *)0xaf0707)
#define MousePtr_A_Mouse2 ((volatile uint8_t *)0xaf0708)
//
// Video RAM
//
#define vram_base ((volatile p_far24)0xb00000)
#endif

1
src/include/constants.h
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@ -12,7 +12,6 @@
#define FSYS_SECTOR_SZ 512 /* Size of a sector */
#define MAX_PATH_LEN 256 /* Maximum length of a file path */
#define MAX_TRIES_BUSY 100000 /* The maximum number of times to check for an operation to complete (general purpose) */
/*
* Definitions of special characters

20
src/include/dma_reg.h Normal file
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/*
* Master include file for all the DMA registers
*/
#ifndef __DMA_REG_H
#define __DMA_REG_H
#include "sys_general.h"
#if MODEL == MODEL_FOENIX_A2560K || MODEL == MODEL_FOENIX_GENX || MODEL == MODEL_FOENIX_A2560X
#include "A2560K/dma_a2560k.h"
#elif MODEL == MODEL_FOENIX_A2560U || MODEL == MODEL_FOENIX_A2560U_PLUS
#include "A2560U/dma_a2560u.h"
#elif MODEL == MODEL_FOENIX_FMX || MODEL == MODEL_FOENIX_C256U || MODEL == MODEL_FOENIX_C256U_PLUS
#include "C256/dma_c256.h"
#endif
#endif

16
src/include/exp_reg.h Normal file
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@ -0,0 +1,16 @@
/**
* @file exp_reg.h
* @brief Define the registers to access the expansion port
* @version 0.1
* @date 2023-08-30
*
*/
#ifndef __EXP_REG_H_
#define __EXP_REG_H_
#if MODEL == MODEL_FOENIX_FMX || MODEL == MODEL_FOENIX_C256U || MODEL == MODEL_FOENIX_C256U_PLUS
#include "C256/exp_c256.h"
#endif
#endif

14
src/include/features.h
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@ -24,9 +24,15 @@
#define HAS_OPN 1
#define HAS_OPM 1
#define HAS_SNES_GAMEPAD 1
#define HAS_OPL3 1
#elif MODEL == MODEL_FOENIX_A2560U || MODEL == MODEL_FOENIX_A2560U_PLUS
#define HAS_OPL3 1
#elif MODEL == MODEL_FOENIX_C256U_PLUS || MODEL == MODEL_FOENIX_C256U
#elif MODEL == MODEL_FOENIX_C256U_FMX
#define HAS_SUPERIO 1
#define HAS_PARALLEL_PORT 1
#define HAS_MIDI_PORTS 1
#define HAS_EXTERNAL_SIDS 1
#endif
@ -60,10 +66,6 @@
#define HAS_OPM 0
#endif
#ifndef HAS_OPL3 // YMF262 OPL3 soundchip presence
#define HAS_OPL3 0
#endif
#ifndef HAS_SNES_GAMEPAD // Super Nintendo gamepad connectors (even if through adapter)
#define HAS_SNES_GAMEPAD 0
#endif

4
src/include/gabe_reg.h
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@ -14,4 +14,8 @@
#elif MODEL == MODEL_FOENIX_A2560U || MODEL == MODEL_FOENIX_A2560U_PLUS
#include "A2560U/gabe_a2560u.h"
#elif MODEL == MODEL_FOENIX_FMX || MODEL == MODEL_FOENIX_C256U || MODEL == MODEL_FOENIX_C256U_PLUS
#include "C256/gabe_c256.h"
#endif

4
src/include/pata_reg.h
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@ -10,8 +10,12 @@
#if MODEL == MODEL_FOENIX_A2560K || MODEL == MODEL_FOENIX_GENX || MODEL == MODEL_FOENIX_A2560X
#include "A2560K/pata_a2560k.h"
#elif MODEL == MODEL_FOENIX_A2560U || MODEL == MODEL_FOENIX_A2560U_PLUS
#include "A2560U/pata_a2560u.h"
#elif MODEL == MODEL_FOENIX_FMX || MODEL == MODEL_FOENIX_C256U || MODEL == MODEL_FOENIX_C256U_PLUS
#include "C256/pata_c256.h"
#endif
/*

6
src/include/ps2_reg.h
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@ -10,8 +10,12 @@
#if MODEL == MODEL_FOENIX_A2560K || MODEL == MODEL_FOENIX_GENX || MODEL == MODEL_FOENIX_A2560X
#include "A2560K/ps2_a2560k.h"
#elif MODEL == MODEL_FOENIX_A2560U || MODEL == MODEL_FOENIX_A2560U_PLUS
#include "A2560U/ps2_a2560u.h"
#elif MODEL == MODEL_FOENIX_FMX || MODEL == MODEL_FOENIX_C256U || MODEL == MODEL_FOENIX_C256U_PLUS
#include "C256/ps2_c256.h"
#endif
/*
@ -48,8 +52,10 @@
#define PS2_CTRL_ENABLE_2 0xA9 /* Enable the second (mouse) port */
#define PS2_CTRL_DISABLE_2 0xA7 /* Disable the second (mouse) port */
#define KBD_CMD_ID 0xF2 /* Keyboard command: identify */
#define KBD_CMD_RESET 0xFF /* Keyboard command: reset the keyboard */
#define KBD_CMD_ENABLE 0xF4 /* Keyboard command: enable to keyboard */
#define KBD_CMD_DISABLE 0xF5 /* Keyboard command: disable scanning */
#define KBD_CMD_SET_LED 0xED /* Keyboard command: set the LEDs */
#define MOUSE_CMD_PREFIX 0xD4 /* Controller code to prefix all mouse commands */

20
src/include/rtc_reg.h
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@ -47,6 +47,26 @@
#define RTC_CTRL ((volatile unsigned char *)0x00B0009C)
#define RTC_CENTURY ((volatile unsigned char *)0x00B0009E)
#elif MODEL == MODEL_FOENIX_FMX || MODEL == MODEL_FOENIX_C256U || MODEL == MODEL_FOENIX_C256U_PLUS
#define RTC_BASE ((volatile unsigned char *)0xaf0800)
#define RTC_SEC ((volatile unsigned char *)0xaf0800)
#define RTC_ALRM_SEC ((volatile unsigned char *)0xaf0801)
#define RTC_MIN ((volatile unsigned char *)0xaf0802)
#define RTC_ALRM_MIN ((volatile unsigned char *)0xaf0803)
#define RTC_HOUR ((volatile unsigned char *)0xaf0804)
#define RTC_ALRM_HOUR ((volatile unsigned char *)0xaf0805)
#define RTC_DAY ((volatile unsigned char *)0xaf0806)
#define RTC_ALRM_DAY ((volatile unsigned char *)0xaf0807)
#define RTC_DAY_OF_WEEK ((volatile unsigned char *)0xaf0808)
#define RTC_MONTH ((volatile unsigned char *)0xaf0809)
#define RTC_YEAR ((volatile unsigned char *)0xaf080a)
#define RTC_RATES ((volatile unsigned char *)0xaf080b)
#define RTC_ENABLES ((volatile unsigned char *)0xaf080c)
#define RTC_FLAGS ((volatile unsigned char *)0xaf080d)
#define RTC_CTRL ((volatile unsigned char *)0xaf080e)
#define RTC_CENTURY ((volatile unsigned char *)0xaf080f)
#endif
/* Rate fields and settings */

5
src/include/sdc_reg.h
View file

@ -10,10 +10,15 @@
#if MODEL == MODEL_FOENIX_A2560K
#include "A2560K/sdc_a2560k.h"
#elif MODEL == MODEL_FOENIX_A2560X || MODEL == MODEL_FOENIX_GENX
#include "A2560X/sdc_a2560x.h"
#elif MODEL == MODEL_FOENIX_A2560U || MODEL == MODEL_FOENIX_A2560U_PLUS
#include "A2560U/sdc_a2560u.h"
#elif MODEL == MODEL_FOENIX_FMX || MODEL == MODEL_FOENIX_C256U || MODEL == MODEL_FOENIX_C256U_PLUS
#include "C256/sdc_c256.h"
#endif
/*

7
src/include/sound_reg.h
View file

@ -9,9 +9,14 @@
#if MODEL == MODEL_FOENIX_A2560K || MODEL == MODEL_FOENIX_GENX || MODEL == MODEL_FOENIX_A2560X
#include "A2560K/sound_a2560k.h"
#include "A2560K/YM2151.h"
#include "A2560K/YM2612_Ext.h"
#elif MODEL == MODEL_FOENIX_A2560U || MODEL_FOENIX_A2560U_PLUS
#elif MODEL == MODEL_FOENIX_A2560U || MODEL == MODEL_FOENIX_A2560U_PLUS
#include "A2560U/sound_a2560u.h"
#elif MODEL == MODEL_FOENIX_FMX || MODEL == MODEL_FOENIX_C256U || MODEL == MODEL_FOENIX_C256U_PLUS
#include "C256/sound_c256.h"
#endif
#endif

175
src/include/superio.h
View file

@ -9,105 +9,112 @@
#ifndef __SUPERIO_H
#define __SUPERIO_H
#define CONFIG_0x2E_REG ((volatile unsigned char *)0xFEC0202E)
#define CONFIG_0x2F_REG ((volatile unsigned char *)0xFEC0202F)
#include <stdint.h>
#define PME_STS_REG ((volatile unsigned char *)0xFEC02100)
#define PME_EN_REG ((volatile unsigned char *)0xFEC02102)
#define SUPERIO_BASE (0xFEC02000)
#define PME_STS1_REG ((volatile unsigned char *)0xFEC02104)
#define PME_STS2_REG ((volatile unsigned char *)0xFEC02105)
#define PME_STS3_REG ((volatile unsigned char *)0xFEC02106)
#define PME_STS4_REG ((volatile unsigned char *)0xFEC02107)
#define PME_STS5_REG ((volatile unsigned char *)0xFEC02108)
void superio_init(void);
#define PME_EN1_REG ((volatile unsigned char *)0xFEC0210A)
#define PME_EN2_REG ((volatile unsigned char *)0xFEC0210B)
#define PME_EN3_REG ((volatile unsigned char *)0xFEC0210C)
#define PME_EN4_REG ((volatile unsigned char *)0xFEC0210D)
#define PME_EN5_REG ((volatile unsigned char *)0xFEC0210E)
#define SMI_STS1_REG ((volatile unsigned char *)0xFEC02110)
#define SMI_STS2_REG ((volatile unsigned char *)0xFEC02111)
#define SMI_STS3_REG ((volatile unsigned char *)0xFEC02112)
#define SMI_STS4_REG ((volatile unsigned char *)0xFEC02113)
#define SMI_STS5_REG ((volatile unsigned char *)0xFEC02114)
#define CONFIG_0x2E_REG ((volatile uint8_t *)0xFEC0202E)
#define CONFIG_0x2F_REG ((volatile uint8_t *)0xFEC0202F)
#define SMI_EN1_REG ((volatile unsigned char *)0xFEC02116)
#define SMI_EN2_REG ((volatile unsigned char *)0xFEC02117)
#define SMI_EN3_REG ((volatile unsigned char *)0xFEC02118)
#define SMI_EN4_REG ((volatile unsigned char *)0xFEC02119)
#define SMI_EN5_REG ((volatile unsigned char *)0xFEC0211A)
#define PME_STS_REG ((volatile uint8_t *)0xFEC02100)
#define PME_EN_REG ((volatile uint8_t *)0xFEC02102)
#define MSC_ST_REG ((volatile unsigned char *)0xFEC0211C)
#define FORCE_DISK_CHANGE ((volatile unsigned char *)0xFEC0211E)
#define FLOPPY_DATA_RATE ((volatile unsigned char *)0xFEC0211F)
#define PME_STS1_REG ((volatile uint8_t *)0xFEC02104)
#define PME_STS2_REG ((volatile uint8_t *)0xFEC02105)
#define PME_STS3_REG ((volatile uint8_t *)0xFEC02106)
#define PME_STS4_REG ((volatile uint8_t *)0xFEC02107)
#define PME_STS5_REG ((volatile uint8_t *)0xFEC02108)
#define UART1_FIFO_CTRL_SHDW ((volatile unsigned char *)0xFEC02120)
#define UART2_FIFO_CTRL_SHDW ((volatile unsigned char *)0xFEC02121)
#define DEV_DISABLE_REG ((volatile unsigned char *)0xFEC02122)
#define PME_EN1_REG ((volatile uint8_t *)0xFEC0210A)
#define PME_EN2_REG ((volatile uint8_t *)0xFEC0210B)
#define PME_EN3_REG ((volatile uint8_t *)0xFEC0210C)
#define PME_EN4_REG ((volatile uint8_t *)0xFEC0210D)
#define PME_EN5_REG ((volatile uint8_t *)0xFEC0210E)
#define GP10_REG ((volatile unsigned char *)0xFEC02123)
#define GP11_REG ((volatile unsigned char *)0xFEC02124)
#define GP12_REG ((volatile unsigned char *)0xFEC02125)
#define GP13_REG ((volatile unsigned char *)0xFEC02126)
#define GP14_REG ((volatile unsigned char *)0xFEC02127)
#define GP15_REG ((volatile unsigned char *)0xFEC02128)
#define GP16_REG ((volatile unsigned char *)0xFEC02129)
#define GP17_REG ((volatile unsigned char *)0xFEC0212A)
#define SMI_STS1_REG ((volatile uint8_t *)0xFEC02110)
#define SMI_STS2_REG ((volatile uint8_t *)0xFEC02111)
#define SMI_STS3_REG ((volatile uint8_t *)0xFEC02112)
#define SMI_STS4_REG ((volatile uint8_t *)0xFEC02113)
#define SMI_STS5_REG ((volatile uint8_t *)0xFEC02114)
#define GP20_REG ((volatile unsigned char *)0xFEC0212B)
#define GP21_REG ((volatile unsigned char *)0xFEC0212C)
#define GP22_REG ((volatile unsigned char *)0xFEC0212D)
#define GP23_REG ((volatile unsigned char *)0xFEC0212E)
#define GP24_REG ((volatile unsigned char *)0xFEC0212F)
#define GP25_REG ((volatile unsigned char *)0xFEC02130)
#define GP26_REG ((volatile unsigned char *)0xFEC02131)
#define GP27_REG ((volatile unsigned char *)0xFEC02132)
#define SMI_EN1_REG ((volatile uint8_t *)0xFEC02116)
#define SMI_EN2_REG ((volatile uint8_t *)0xFEC02117)
#define SMI_EN3_REG ((volatile uint8_t *)0xFEC02118)
#define SMI_EN4_REG ((volatile uint8_t *)0xFEC02119)
#define SMI_EN5_REG ((volatile uint8_t *)0xFEC0211A)
#define GP30_REG ((volatile unsigned char *)0xFEC02133)
#define GP31_REG ((volatile unsigned char *)0xFEC02134)
#define GP32_REG ((volatile unsigned char *)0xFEC02135)
#define GP33_REG ((volatile unsigned char *)0xFEC02136)
#define GP34_REG ((volatile unsigned char *)0xFEC02137)
#define GP35_REG ((volatile unsigned char *)0xFEC02138)
#define GP36_REG ((volatile unsigned char *)0xFEC02139)
#define GP37_REG ((volatile unsigned char *)0xFEC0213A)
#define MSC_ST_REG ((volatile uint8_t *)0xFEC0211C)
#define FORCE_DISK_CHANGE ((volatile uint8_t *)0xFEC0211E)
#define FLOPPY_DATA_RATE ((volatile uint8_t *)0xFEC0211F)
#define GP40_REG ((volatile unsigned char *)0xFEC0213B)
#define GP41_REG ((volatile unsigned char *)0xFEC0213C)
#define GP42_REG ((volatile unsigned char *)0xFEC0213D)
#define GP43_REG ((volatile unsigned char *)0xFEC0213E)
#define UART1_FIFO_CTRL_SHDW ((volatile uint8_t *)0xFEC02120)
#define UART2_FIFO_CTRL_SHDW ((volatile uint8_t *)0xFEC02121)
#define DEV_DISABLE_REG ((volatile uint8_t *)0xFEC02122)
#define GP50_REG ((volatile unsigned char *)0xFEC0213F)
#define GP51_REG ((volatile unsigned char *)0xFEC02140)
#define GP52_REG ((volatile unsigned char *)0xFEC02141)
#define GP53_REG ((volatile unsigned char *)0xFEC02142)
#define GP54_REG ((volatile unsigned char *)0xFEC02143)
#define GP55_REG ((volatile unsigned char *)0xFEC02144)
#define GP56_REG ((volatile unsigned char *)0xFEC02145)
#define GP57_REG ((volatile unsigned char *)0xFEC02146)
#define GP10_REG ((volatile uint8_t *)0xFEC02123)
#define GP11_REG ((volatile uint8_t *)0xFEC02124)
#define GP12_REG ((volatile uint8_t *)0xFEC02125)
#define GP13_REG ((volatile uint8_t *)0xFEC02126)
#define GP14_REG ((volatile uint8_t *)0xFEC02127)
#define GP15_REG ((volatile uint8_t *)0xFEC02128)
#define GP16_REG ((volatile uint8_t *)0xFEC02129)
#define GP17_REG ((volatile uint8_t *)0xFEC0212A)
#define GP60_REG ((volatile unsigned char *)0xFEC02147)
#define GP61_REG ((volatile unsigned char *)0xFEC02148)
#define GP20_REG ((volatile uint8_t *)0xFEC0212B)
#define GP21_REG ((volatile uint8_t *)0xFEC0212C)
#define GP22_REG ((volatile uint8_t *)0xFEC0212D)
#define GP23_REG ((volatile uint8_t *)0xFEC0212E)
#define GP24_REG ((volatile uint8_t *)0xFEC0212F)
#define GP25_REG ((volatile uint8_t *)0xFEC02130)
#define GP26_REG ((volatile uint8_t *)0xFEC02131)
#define GP27_REG ((volatile uint8_t *)0xFEC02132)
#define GP1_REG ((volatile unsigned char *)0xFEC0214B)
#define GP2_REG ((volatile unsigned char *)0xFEC0214C)
#define GP3_REG ((volatile unsigned char *)0xFEC0214D)
#define GP4_REG ((volatile unsigned char *)0xFEC0214E)
#define GP5_REG ((volatile unsigned char *)0xFEC0214F)
#define GP6_REG ((volatile unsigned char *)0xFEC02150)
#define GP30_REG ((volatile uint8_t *)0xFEC02133)
#define GP31_REG ((volatile uint8_t *)0xFEC02134)
#define GP32_REG ((volatile uint8_t *)0xFEC02135)
#define GP33_REG ((volatile uint8_t *)0xFEC02136)
#define GP34_REG ((volatile uint8_t *)0xFEC02137)
#define GP35_REG ((volatile uint8_t *)0xFEC02138)
#define GP36_REG ((volatile uint8_t *)0xFEC02139)
#define GP37_REG ((volatile uint8_t *)0xFEC0213A)
#define FAN1_REG ((volatile unsigned char *)0xFEC02156)
#define FAN2_REG ((volatile unsigned char *)0xFEC02157)
#define FAN_CTRL_REG ((volatile unsigned char *)0xFEC02158)
#define FAN1_TACH_REG ((volatile unsigned char *)0xFEC02159)
#define FAN2_TACH_REG ((volatile unsigned char *)0xFEC0215A)
#define FAN1_PRELOAD_REG ((volatile unsigned char *)0xFEC0215B)
#define FAN2_PRELOAD_REG ((volatile unsigned char *)0xFEC0215C)
#define GP40_REG ((volatile uint8_t *)0xFEC0213B)
#define GP41_REG ((volatile uint8_t *)0xFEC0213C)
#define GP42_REG ((volatile uint8_t *)0xFEC0213D)
#define GP43_REG ((volatile uint8_t *)0xFEC0213E)
#define LED1_REG ((volatile unsigned char *)0xFEC0215D)
#define LED2_REG ((volatile unsigned char *)0xFEC0215E)
#define KEYBOARD_SCAN_CODE ((volatile unsigned char *)0xFEC0215F)
#define GP50_REG ((volatile uint8_t *)0xFEC0213F)
#define GP51_REG ((volatile uint8_t *)0xFEC02140)
#define GP52_REG ((volatile uint8_t *)0xFEC02141)
#define GP53_REG ((volatile uint8_t *)0xFEC02142)
#define GP54_REG ((volatile uint8_t *)0xFEC02143)
#define GP55_REG ((volatile uint8_t *)0xFEC02144)
#define GP56_REG ((volatile uint8_t *)0xFEC02145)
#define GP57_REG ((volatile uint8_t *)0xFEC02146)
#define GP60_REG ((volatile uint8_t *)0xFEC02147)
#define GP61_REG ((volatile uint8_t *)0xFEC02148)
#define GP1_REG ((volatile uint8_t *)0xFEC0214B)
#define GP2_REG ((volatile uint8_t *)0xFEC0214C)
#define GP3_REG ((volatile uint8_t *)0xFEC0214D)
#define GP4_REG ((volatile uint8_t *)0xFEC0214E)
#define GP5_REG ((volatile uint8_t *)0xFEC0214F)
#define GP6_REG ((volatile uint8_t *)0xFEC02150)
#define FAN1_REG ((volatile uint8_t *)0xFEC02156)
#define FAN2_REG ((volatile uint8_t *)0xFEC02157)
#define FAN_CTRL_REG ((volatile uint8_t *)0xFEC02158)
#define FAN1_TACH_REG ((volatile uint8_t *)0xFEC02159)
#define FAN2_TACH_REG ((volatile uint8_t *)0xFEC0215A)
#define FAN1_PRELOAD_REG ((volatile uint8_t *)0xFEC0215B)
#define FAN2_PRELOAD_REG ((volatile uint8_t *)0xFEC0215C)
#define LED1_REG ((volatile uint8_t *)0xFEC0215D)
#define LED2_REG ((volatile uint8_t *)0xFEC0215E)
#define KEYBOARD_SCAN_CODE ((volatile uint8_t *)0xFEC0215F)
#endif

180
src/include/syscalls.h
View file

@ -12,12 +12,23 @@
#include "types.h"
#include "interrupt.h"
#include "sys_general.h"
#include "dev/channel.h"
#include "dev/block.h"
#include "dev/fsys.h"
#include "dev/rtc.h"
#include "dev/txt_screen.h"
/*
* Define the machine-specific system call function prefix
*/
#if MODEL == MODEL_FOENIX_FMX || MODEL == MODEL_FOENIX_C256U || MODEL == MODEL_FOENIX_C256U_PLUS
#define SYSTEMCALL __attribute__((simple_call))
#else
#define SYSTEMCALL
#endif
/*
* Syscall function numbers
*/
@ -141,21 +152,21 @@ extern int32_t syscall(int32_t function, ...);
* Inputs:
* result = the code to return to the kernel
*/
extern void sys_exit(short result);
extern SYSTEMCALL void sys_exit(short result);
/*
* Enable all interrupts
*
* NOTE: this is actually provided in the low level assembly
*/
extern void sys_int_enable_all();
extern SYSTEMCALL void sys_int_enable_all();
/*
* Disable all interrupts
*
* NOTE: this is actually provided in the low level assembly
*/
extern void sys_int_disable_all();
extern SYSTEMCALL void sys_int_disable_all();
/*
* Disable an interrupt by masking it
@ -163,7 +174,7 @@ extern void sys_int_disable_all();
* Inputs:
* n = the number of the interrupt: n[7..4] = group number, n[3..0] = individual number.
*/
extern void sys_int_disable(unsigned short n);
extern SYSTEMCALL void sys_int_disable(unsigned short n);
/*
* Enable an interrupt
@ -171,7 +182,7 @@ extern void sys_int_disable(unsigned short n);
* Inputs:
* n = the number of the interrupt
*/
extern void sys_int_enable(unsigned short n);
extern SYSTEMCALL void sys_int_enable(unsigned short n);
/*
* Register a handler for a given interrupt.
@ -183,7 +194,7 @@ extern void sys_int_enable(unsigned short n);
* Returns:
* the pointer to the previous interrupt handler
*/
extern p_int_handler sys_int_register(unsigned short n, p_int_handler handler);
extern SYSTEMCALL p_int_handler sys_int_register(unsigned short n, p_int_handler handler);
/*
* Return true (non-zero) if an interrupt is pending for the given interrupt
@ -194,7 +205,7 @@ extern p_int_handler sys_int_register(unsigned short n, p_int_handler handler);
* Returns:
* non-zero if interrupt n is pending, 0 if not
*/
extern short sys_int_pending(unsigned short n);
extern SYSTEMCALL short sys_int_pending(unsigned short n);
/*
* Fill out a s_sys_info structure with the information about the current system
@ -202,7 +213,7 @@ extern short sys_int_pending(unsigned short n);
* Inputs:
* info = pointer to a s_sys_info structure to fill out
*/
extern void sys_get_info(p_sys_info info);
extern SYSTEMCALL void sys_get_info(p_sys_info info);
/*
* Acknowledge an interrupt (clear out its pending flag)
@ -210,7 +221,7 @@ extern void sys_get_info(p_sys_info info);
* Inputs:
* n = the number of the interrupt: n[7..4] = group number, n[3..0] = individual number.
*/
extern void sys_int_clear(unsigned short n);
extern SYSTEMCALL void sys_int_clear(unsigned short n);
/***
*** Channel system calls
@ -225,7 +236,7 @@ extern void sys_int_clear(unsigned short n);
* Returns:
* the value read (if negative, error)
*/
extern short sys_chan_read_b(short channel);
extern SYSTEMCALL short sys_chan_read_b(short channel);
/*
* Read bytes from the channel
@ -238,7 +249,7 @@ extern short sys_chan_read_b(short channel);
* Returns:
* number of bytes read, any negative number is an error code
*/
extern short sys_chan_read(short channel, unsigned char * buffer, short size);
extern SYSTEMCALL short sys_chan_read(short channel, unsigned char * buffer, short size);
/*
* Read a line of text from the channel
@ -251,7 +262,7 @@ extern short sys_chan_read(short channel, unsigned char * buffer, short size);
* Returns:
* number of bytes read, any negative number is an error code
*/
extern short sys_chan_readline(short channel, unsigned char * buffer, short size);
extern SYSTEMCALL short sys_chan_readline(short channel, unsigned char * buffer, short size);
/*
* Write a single byte to the device
@ -263,7 +274,7 @@ extern short sys_chan_readline(short channel, unsigned char * buffer, short size
* Returns:
* 0 on success, a negative value on error
*/
extern short sys_chan_write_b(short channel, unsigned char b);
extern SYSTEMCALL short sys_chan_write_b(short channel, unsigned char b);
/*
* Write a byte to the channel
@ -275,7 +286,7 @@ extern short sys_chan_write_b(short channel, unsigned char b);
* Returns:
* number of bytes written, any negative number is an error code
*/
extern short sys_chan_write(short channel, const unsigned char * buffer, short size);
extern SYSTEMCALL short sys_chan_write(short channel, const unsigned char * buffer, short size);
/*
* Return the status of the channel device
@ -286,7 +297,7 @@ extern short sys_chan_write(short channel, const unsigned char * buffer, short s
* Returns:
* the status of the device
*/
extern short sys_chan_status(short channel);
extern SYSTEMCALL short sys_chan_status(short channel);
/*
* Ensure that any pending writes to teh device have been completed
@ -297,7 +308,7 @@ extern short sys_chan_status(short channel);
* Returns:
* 0 on success, any negative number is an error code
*/
extern short sys_chan_flush(short channel);
extern SYSTEMCALL short sys_chan_flush(short channel);
/*
* Attempt to set the position of the channel cursor (if supported)
@ -310,7 +321,7 @@ extern short sys_chan_flush(short channel);
* Returns:
* 0 = success, a negative number is an error.
*/
extern short sys_chan_seek(short channel, long position, short base);
extern SYSTEMCALL short sys_chan_seek(short channel, long position, short base);
/*
* Issue a control command to the device
@ -324,7 +335,7 @@ extern short sys_chan_seek(short channel, long position, short base);
* Returns:
* 0 on success, any negative number is an error code
*/
extern short sys_chan_ioctrl(short channel, short command, uint8_t * buffer, short size);
extern SYSTEMCALL short sys_chan_ioctrl(short channel, short command, uint8_t * buffer, short size);
/*
* Open a channel
@ -337,7 +348,7 @@ extern short sys_chan_ioctrl(short channel, short command, uint8_t * buffer, sho
* Returns:
* the number of the channel opened, negative number on error
*/
extern short sys_chan_open(short dev, const uint8_t * path, short mode);
extern SYSTEMCALL short sys_chan_open(short dev, const uint8_t * path, short mode);
/*
* Close a channel
@ -348,7 +359,7 @@ extern short sys_chan_open(short dev, const uint8_t * path, short mode);
* Returns:
* nothing useful
*/
extern short sys_chan_close(short chan);
extern SYSTEMCALL short sys_chan_close(short chan);
/**
* Swap the channel ID assignments for two channels
@ -360,7 +371,7 @@ extern short sys_chan_close(short chan);
* @param channel2 the ID of the other channel
* @return 0 on success, any other number is an error
*/
extern short sys_chan_swap(short channel1, short channel2);
extern SYSTEMCALL short sys_chan_swap(short channel1, short channel2);
/**
* Return the device associated with the channel
@ -368,7 +379,7 @@ extern short sys_chan_swap(short channel1, short channel2);
* @param channel the ID of the channel to query
* @return the ID of the device associated with the channel, negative number for error
*/
extern short sys_chan_device(short channel);
extern SYSTEMCALL short sys_chan_device(short channel);
/*
* Compute the size information for the text screen based on the current settings in VICKY
@ -377,7 +388,7 @@ extern short sys_chan_device(short channel);
* Inputs:
* screen = the screen number 0 for channel A, 1 for channel B
*/
extern void sys_text_setsizes(short chan);
extern SYSTEMCALL void sys_text_setsizes(short chan);
/***
*** Block device system calls
@ -386,7 +397,7 @@ extern void sys_text_setsizes(short chan);
//
// Register a block device driver
//
extern short sys_bdev_register(p_dev_block device);
extern SYSTEMCALL short sys_bdev_register(p_dev_block device);
//
// Read a block from the device
@ -400,7 +411,7 @@ extern short sys_bdev_register(p_dev_block device);
// Returns:
// number of bytes read, any negative number is an error code
//
extern short sys_bdev_read(short dev, long lba, unsigned char * buffer, short size);
extern SYSTEMCALL short sys_bdev_read(short dev, long lba, unsigned char * buffer, short size);
//
// Write a block from the device
@ -414,7 +425,7 @@ extern short sys_bdev_read(short dev, long lba, unsigned char * buffer, short si
// Returns:
// number of bytes written, any negative number is an error code
//
extern short sys_bdev_write(short dev, long lba, const unsigned char * buffer, short size);
extern SYSTEMCALL short sys_bdev_write(short dev, long lba, const unsigned char * buffer, short size);
//
// Return the status of the block device
@ -425,7 +436,7 @@ extern short sys_bdev_write(short dev, long lba, const unsigned char * buffer, s
// Returns:
// the status of the device
//
extern short sys_bdev_status(short dev);
extern SYSTEMCALL short sys_bdev_status(short dev);
//
// Ensure that any pending writes to teh device have been completed
@ -436,7 +447,7 @@ extern short sys_bdev_status(short dev);
// Returns:
// 0 on success, any negative number is an error code
//
extern short sys_bdev_flush(short dev);
extern SYSTEMCALL short sys_bdev_flush(short dev);
//
// Issue a control command to the device
@ -450,7 +461,7 @@ extern short sys_bdev_flush(short dev);
// Returns:
// 0 on success, any negative number is an error code
//
extern short sys_bdev_ioctrl(short dev, short command, unsigned char * buffer, short size);
extern SYSTEMCALL short sys_bdev_ioctrl(short dev, short command, unsigned char * buffer, short size);
/*
@ -467,7 +478,7 @@ extern short sys_bdev_ioctrl(short dev, short command, unsigned char * buffer, s
* Returns:
* the channel ID for the open file (negative if error)
*/
extern short sys_fsys_open(const char * path, short mode);
extern SYSTEMCALL short sys_fsys_open(const char * path, short mode);
/**
* Close access to a previously open file.
@ -478,7 +489,7 @@ extern short sys_fsys_open(const char * path, short mode);
* Returns:
* 0 on success, negative number on failure
*/
extern short sys_fsys_close(short fd);
extern SYSTEMCALL short sys_fsys_close(short fd);
/**
* Attempt to open a directory for scanning
@ -489,7 +500,7 @@ extern short sys_fsys_close(short fd);
* Returns:
* the handle to the directory if >= 0. An error if < 0
*/
extern short sys_fsys_opendir(const char * path);
extern SYSTEMCALL short sys_fsys_opendir(const char * path);
/**
* Close access to a previously open file.
@ -500,7 +511,7 @@ extern short sys_fsys_opendir(const char * path);
* Returns:
* 0 on success, negative number on failure
*/
extern short sys_fsys_close(short fd);
extern SYSTEMCALL short sys_fsys_close(short fd);
/**
* Attempt to open a directory for scanning
@ -511,7 +522,7 @@ extern short sys_fsys_close(short fd);
* Returns:
* the handle to the directory if >= 0. An error if < 0
*/
extern short sys_fsys_opendir(const char * path);
extern SYSTEMCALL short sys_fsys_opendir(const char * path);
/**
* Close a previously open directory
@ -522,7 +533,7 @@ extern short sys_fsys_opendir(const char * path);
* Returns:
* 0 on success, negative number on error
*/
extern short sys_fsys_closedir(short dir);
extern SYSTEMCALL short sys_fsys_closedir(short dir);
/**
* Attempt to read an entry from an open directory
@ -534,7 +545,7 @@ extern short sys_fsys_closedir(short dir);
* Returns:
* 0 on success, negative number on failure
*/
extern short sys_fsys_readdir(short dir, p_file_info file);
extern SYSTEMCALL short sys_fsys_readdir(short dir, p_file_info file);
/**
* Open a directory given the path and search for the first file matching the pattern.
@ -547,7 +558,7 @@ extern short sys_fsys_readdir(short dir, p_file_info file);
* Returns:
* the directory handle to use for subsequent calls if >= 0, error if negative
*/
extern short sys_fsys_findfirst(const char * path, const char * pattern, p_file_info file);
extern SYSTEMCALL short sys_fsys_findfirst(const char * path, const char * pattern, p_file_info file);
/**
* Open a directory given the path and search for the first file matching the pattern.
@ -559,7 +570,7 @@ extern short sys_fsys_findfirst(const char * path, const char * pattern, p_file_
* Returns:
* 0 on success, error if negative
*/
extern short sys_fsys_findnext(short dir, p_file_info file);
extern SYSTEMCALL short sys_fsys_findnext(short dir, p_file_info file);
/*
* Get the label for the drive holding the path
@ -568,7 +579,7 @@ extern short sys_fsys_findnext(short dir, p_file_info file);
* path = path to the drive
* label = buffer that will hold the label... should be at least 35 bytes
*/
extern short sys_fsys_get_label(const char * path, char * label);
extern SYSTEMCALL short sys_fsys_get_label(const char * path, char * label);
/*
* Set the label for the drive holding the path
@ -577,7 +588,7 @@ extern short sys_fsys_get_label(const char * path, char * label);
* drive = drive number
* label = buffer that holds the label
*/
extern short sys_fsys_set_label(short drive, const char * label);
extern SYSTEMCALL short sys_fsys_set_label(short drive, const char * label);
/**
* Create a directory
@ -588,7 +599,7 @@ extern short sys_fsys_set_label(short drive, const char * label);
* Returns:
* 0 on success, negative number on failure.
*/
extern short sys_fsys_mkdir(const char * path);
extern SYSTEMCALL short sys_fsys_mkdir(const char * path);
/**
* Delete a file or directory
@ -599,7 +610,7 @@ extern short sys_fsys_mkdir(const char * path);
* Returns:
* 0 on success, negative number on failure.
*/
extern short sys_fsys_delete(const char * path);
extern SYSTEMCALL short sys_fsys_delete(const char * path);
/**
* Rename a file or directory
@ -611,7 +622,7 @@ extern short sys_fsys_delete(const char * path);
* Returns:
* 0 on success, negative number on failure.
*/
extern short sys_fsys_rename(const char * old_path, const char * new_path);
extern SYSTEMCALL short sys_fsys_rename(const char * old_path, const char * new_path);
/**
* Change the current working directory (and drive)
@ -622,7 +633,7 @@ extern short sys_fsys_rename(const char * old_path, const char * new_path);
* Returns:
* 0 on success, negative number on failure.
*/
extern short sys_fsys_set_cwd(const char * path);
extern SYSTEMCALL short sys_fsys_set_cwd(const char * path);
/**
* Get the current working drive and directory
@ -634,7 +645,7 @@ extern short sys_fsys_set_cwd(const char * path);
* Returns:
* 0 on success, negative number on failure.
*/
extern short sys_fsys_get_cwd(char * path, short size);
extern SYSTEMCALL short sys_fsys_get_cwd(char * path, short size);
/*
* Load a file into memory at the designated destination address.
@ -652,7 +663,7 @@ extern short sys_fsys_get_cwd(char * path, short size);
* Returns:
* 0 on success, negative number on error
*/
extern short sys_fsys_load(const char * path, long destination, long * start);
extern SYSTEMCALL short sys_fsys_load(const char * path, long destination, long * start);
/*
* Register a file loading routine
@ -667,7 +678,7 @@ extern short sys_fsys_load(const char * path, long destination, long * start);
* Returns:
* 0 on success, negative number on error
*/
extern short sys_fsys_register_loader(const char * extension, p_file_loader loader);
extern SYSTEMCALL short sys_fsys_register_loader(const char * extension, p_file_loader loader);
/**
* Check to see if the file is present.
@ -678,7 +689,7 @@ extern short sys_fsys_register_loader(const char * extension, p_file_loader load
* @param file pointer to a file info record to fill in, if the file is found.
* @return 0 on success, negative number on error
*/
extern short sys_fsys_stat(const char * path, p_file_info file);
extern SYSTEMCALL short sys_fsys_stat(const char * path, p_file_info file);
/**
* Memory
@ -690,7 +701,7 @@ extern short sys_fsys_stat(const char * path, p_file_info file);
*
* @return the address of the first byte of reserved system RAM (one above the last byte the user program can use)
*/
extern unsigned long sys_mem_get_ramtop();
extern SYSTEMCALL unsigned long sys_mem_get_ramtop();
/**
* Reserve a block of memory at the top of system RAM.
@ -698,7 +709,7 @@ extern unsigned long sys_mem_get_ramtop();
* @param bytes the number of bytes to reserve
* @return address of the first byte of the reserved block
*/
extern unsigned long sys_mem_reserve(unsigned long bytes);
extern SYSTEMCALL unsigned long sys_mem_reserve(unsigned long bytes);
/*
* Miscellaneous
@ -714,7 +725,7 @@ extern unsigned long sys_mem_reserve(unsigned long bytes);
* Returns:
* the number of jiffies since the last reset
*/
extern long sys_time_jiffies();
extern SYSTEMCALL long sys_time_jiffies();
/*
* Set the time on the RTC
@ -722,7 +733,7 @@ extern long sys_time_jiffies();
* Inputs:
* time = pointer to a t_time record containing the correct time
*/
extern void sys_rtc_set_time(p_time time);
extern SYSTEMCALL void sys_rtc_set_time(p_time time);
/*
* Get the time on the RTC
@ -730,17 +741,17 @@ extern void sys_rtc_set_time(p_time time);
* Inputs:
* time = pointer to a t_time record in which to put the current time
*/
extern void sys_rtc_get_time(p_time time);
extern SYSTEMCALL void sys_rtc_get_time(p_time time);
/*
* Return the next scan code from the keyboard... 0 if nothing pending
*/
extern unsigned short sys_kbd_scancode();
extern SYSTEMCALL unsigned short sys_kbd_scancode();
/*
* Return an error message given an error number
*/
extern const char * sys_err_message(short err_number);
extern SYSTEMCALL const char * sys_err_message(short err_number);
/*
* Set the keyboard translation tables
@ -763,7 +774,7 @@ extern const char * sys_err_message(short err_number);
* Inputs:
* tables = pointer to the keyboard translation tables
*/
extern short sys_kbd_layout(const char * tables);
extern SYSTEMCALL short sys_kbd_layout(const char * tables);
/**
* Load and execute an executable file
@ -773,7 +784,7 @@ extern short sys_kbd_layout(const char * tables);
* @param argv the array of string arguments
* @return the return result of the program
*/
extern short sys_proc_run(const char * path, int argc, char * argv[]);
extern SYSTEMCALL short sys_proc_run(const char * path, int argc, char * argv[]);
/**
* Set the value of a variable
@ -782,7 +793,7 @@ extern short sys_proc_run(const char * path, int argc, char * argv[]);
* @param value the value the variable should have
* @return 0 on success, negative number on error
*/
extern short sys_var_set(const char *name, const char *value);
extern SYSTEMCALL short sys_var_set(const char *name, const char *value);
/**
* Get the value of a variable
@ -790,7 +801,7 @@ extern short sys_var_set(const char *name, const char *value);
* @param name the name of the variable to set
* @return pointer to the string on success, 0 if not found
*/
extern const char * sys_var_get(const char *name);
extern SYSTEMCALL const char * sys_var_get(const char *name);
//
// Text screen calls
@ -803,7 +814,7 @@ extern const char * sys_var_get(const char *name);
*
* @return a pointer to the read-only description (0 on error)
*/
extern const p_txt_capabilities sys_txt_get_capabilities(short screen);
extern SYSTEMCALL const p_txt_capabilities sys_txt_get_capabilities(short screen);
/**
* Set the display mode for the screen
@ -813,7 +824,7 @@ extern const p_txt_capabilities sys_txt_get_capabilities(short screen);
*
* @return 0 on success, any other number means the mode is invalid for the screen
*/
extern short sys_txt_set_mode(short screen, short mode);
extern SYSTEMCALL short sys_txt_set_mode(short screen, short mode);
/**
* Set the position of the cursor to (x, y) relative to the current region
@ -825,7 +836,7 @@ extern short sys_txt_set_mode(short screen, short mode);
* @param x the column for the cursor
* @param y the row for the cursor
*/
extern void sys_txt_set_xy(short screen, short x, short y);
extern SYSTEMCALL void sys_txt_set_xy(short screen, short x, short y);
/**
* Get the position of the cursor (x, y) relative to the current region
@ -833,7 +844,7 @@ extern void sys_txt_set_xy(short screen, short x, short y);
* @param screen the number of the text device
* @param position pointer to a t_point record to fill out
*/
extern void sys_txt_get_xy(short screen, p_point position);
extern SYSTEMCALL void sys_txt_get_xy(short screen, p_point position);
/**
* Get the current region.
@ -843,7 +854,7 @@ extern void sys_txt_get_xy(short screen, p_point position);
*
* @return 0 on success, any other number means the region was invalid
*/
extern short sys_txt_get_region(short screen, p_rect region);
extern SYSTEMCALL short sys_txt_get_region(short screen, p_rect region);
/**
* Set a region to restrict further character display, scrolling, etc.
@ -854,7 +865,7 @@ extern short sys_txt_get_region(short screen, p_rect region);
*
* @return 0 on success, any other number means the region was invalid
*/
extern short sys_txt_set_region(short screen, p_rect region);
extern SYSTEMCALL short sys_txt_set_region(short screen, p_rect region);
/**
* Set the default foreground and background colors for printing
@ -863,7 +874,7 @@ extern short sys_txt_set_region(short screen, p_rect region);
* @param foreground the Text LUT index of the new current foreground color (0 - 15)
* @param background the Text LUT index of the new current background color (0 - 15)
*/
extern void sys_txt_set_color(short screen, unsigned char foreground, unsigned char background);
extern SYSTEMCALL void sys_txt_set_color(short screen, unsigned char foreground, unsigned char background);
/*
* Get the foreground and background color for printing
@ -873,7 +884,7 @@ extern void sys_txt_set_color(short screen, unsigned char foreground, unsigned c
* foreground = pointer to the foreground color number
* background = pointer to the background color number
*/
extern void sys_txt_get_color(short screen, unsigned char * foreground, unsigned char * background);
extern SYSTEMCALL void sys_txt_get_color(short screen, unsigned char * foreground, unsigned char * background);
/**
* Set if the cursor is visible or not
@ -881,7 +892,7 @@ extern void sys_txt_get_color(short screen, unsigned char * foreground, unsigned
* @param screen the screen number 0 for channel A, 1 for channel B
* @param is_visible TRUE if the cursor should be visible, FALSE (0) otherwise
*/
extern void sys_txt_set_cursor_visible(short screen, short is_visible);
extern SYSTEMCALL void sys_txt_set_cursor_visible(short screen, short is_visible);
/**
* Load a font as the current font for the screen
@ -891,7 +902,7 @@ extern void sys_txt_set_cursor_visible(short screen, short is_visible);
* @param height of a character in pixels
* @param data pointer to the raw font data to be loaded
*/
extern short sys_txt_set_font(short screen, short width, short height, unsigned char * data);
extern SYSTEMCALL short sys_txt_set_font(short screen, short width, short height, unsigned char * data);
/**
* Get the display resolutions
@ -900,7 +911,7 @@ extern short sys_txt_set_font(short screen, short width, short height, unsigned
* @param text_size the size of the screen in visible characters (may be null)
* @param pixel_size the size of the screen in pixels (may be null)
*/
extern void sys_txt_get_sizes(short screen, p_extent text_size, p_extent pixel_size);
extern SYSTEMCALL void sys_txt_get_sizes(short screen, p_extent text_size, p_extent pixel_size);
/**
* Set the size of the border of the screen (if supported)
@ -909,7 +920,7 @@ extern void sys_txt_get_sizes(short screen, p_extent text_size, p_extent pixel_s
* @param width the horizontal size of one side of the border (0 - 32 pixels)
* @param height the vertical size of one side of the border (0 - 32 pixels)
*/
extern void sys_txt_set_border(short screen, short width, short height);
extern SYSTEMCALL void sys_txt_set_border(short screen, short width, short height);
/**
* Set the size of the border of the screen (if supported)
@ -919,6 +930,31 @@ extern void sys_txt_set_border(short screen, short width, short height);
* @param green the green component of the color (0 - 255)
* @param blue the blue component of the color (0 - 255)
*/
extern void sys_txt_set_border_color(short screen, unsigned char red, unsigned char green, unsigned char blue);
extern SYSTEMCALL void sys_txt_set_border_color(short screen, unsigned char red, unsigned char green, unsigned char blue);
/**
* Print a character to the current cursor position in the current color
*
* Most character codes will result in a glyph being displayed at the current
* cursor position, advancing the cursor one spot. There are some exceptions that
* will be treated as control codes:
*
* 0x08 - BS - Move the cursor back one position, erasing the character underneath
* 0x09 - HT - Move forward to the next TAB stop
* 0x0A - LF - Move the cursor down one line (line feed)
* 0x0D - CR - Move the cursor to column 0 (carriage return)
*
* @param screen the number of the text device
* @param c the character to print
*/
extern SYSTEMCALL void sys_txt_put(short screen, char c);
/**
* Print an ASCII Z string to the screen
*
* @param screen the number of the text device
* @param c the ASCII Z string to print
*/
extern SYSTEMCALL void sys_txt_print(short screen, const char * message);
#endif

4
src/include/timers_reg.h
View file

@ -9,8 +9,12 @@
#if MODEL == MODEL_FOENIX_A2560K || MODEL == MODEL_FOENIX_GENX || MODEL == MODEL_FOENIX_A2560X
#include "A2560K/timers_a2560k.h"
#elif MODEL == MODEL_FOENIX_A2560U || MODEL == MODEL_FOENIX_A2560U_PLUS
#include "A2560U/timers_a2560u.h"
#elif MODEL == MODEL_FOENIX_FMX || MODEL == MODEL_FOENIX_C256U || MODEL == MODEL_FOENIX_C256U_PLUS
#include "C256/timers_c256.h"
#endif
#endif

4
src/include/vicky_general.h
View file

@ -10,8 +10,12 @@
#if MODEL == MODEL_FOENIX_A2560K || MODEL == MODEL_FOENIX_GENX || MODEL == MODEL_FOENIX_A2560X
#include "A2560K/VICKYIII_a2560k.h"
#elif MODEL == MODEL_FOENIX_A2560U || MODEL == MODEL_FOENIX_A2560U_PLUS
#include "A2560U/VICKYIII_a2560u.h"
#elif MODEL == MODEL_FOENIX_FMX || MODEL == MODEL_FOENIX_C256U || MODEL == MODEL_FOENIX_C256U_PLUS
#include "C256/vicky_ii.h"
#endif

23
src/interrupt.h
View file

@ -6,6 +6,7 @@
#define __INTERRUPT_H
#include "sys_general.h"
#include "types.h"
/* Type declaration for an interrupt handler */
typedef void (*p_int_handler)();
@ -50,6 +51,28 @@ typedef void (*p_int_handler)();
#define MASK_GRP1 ((volatile unsigned short *)0x00B0011A)
#define MASK_GRP2 ((volatile unsigned short *)0x00B0011C)
#elif MODEL == MODEL_FOENIX_FMX || MODEL == MODEL_FOENIX_C256U || MODEL == MODEL_FOENIX_C256U_PLUS
#define PENDING_GRP0 ((volatile uint8_t *)0x000140)
#define PENDING_GRP1 ((volatile uint8_t *)0x000141)
#define PENDING_GRP2 ((volatile uint8_t *)0x000142)
#define PENDING_GRP3 ((volatile uint8_t *)0x000143)
#define POL_GRP0 ((volatile uint8_t *)0x000144)
#define POL_GRP1 ((volatile uint8_t *)0x000145)
#define POL_GRP2 ((volatile uint8_t *)0x000146)
#define POL_GRP3 ((volatile uint8_t *)0x000147)
#define EDGE_GRP0 ((volatile uint8_t *)0x000148)
#define EDGE_GRP1 ((volatile uint8_t *)0x000149)
#define EDGE_GRP2 ((volatile uint8_t *)0x00014a)
#define EDGE_GRP3 ((volatile uint8_t *)0x00014b)
#define MASK_GRP0 ((volatile uint8_t *)0x00014c)
#define MASK_GRP1 ((volatile uint8_t *)0x00014d)
#define MASK_GRP2 ((volatile uint8_t *)0x00014e)
#define MASK_GRP3 ((volatile uint8_t *)0x00014f)
#endif

91
src/log.c
View file

@ -19,26 +19,37 @@
#include "A2560U/gabe_a2560u.h"
#elif (MODEL == MODEL_FOENIX_A2560K || MODEL == MODEL_FOENIX_GENX || MODEL == MODEL_FOENIX_A2560X)
#include "A2560K/gabe_a2560k.h"
#elif MODEL == MODEL_FOENIX_C256U || MODEL == MODEL_FOENIX_C256U_PLUS || MODEL == MODEL_FOENIX_FMX
#include "C256/gabe_c256.h"
#endif
/* Channel to which the logging output should go.
* Positive: screen number
* -1: UART.
* See log.h
*/
static short log_channel = LOG_CHANNEL;
static short log_level;
static short log_channel;
short log_level;
#if DEFAULT_LOG_LEVEL >= 0
char logbuf[LOGBUF_SIZE]; // Should hopefully be long enough ! It's here so we don't require more stack space
#endif
// do_log either points to log_to_uart or log_to_screen.
static void (*do_log)(const char* message);
void (*do_log)(const char* message);
static void log_to_uart(const char* message);
static void log_to_screen(const char* message);
static void log_to_channel_A_low_level(const char *message);
#if MODEL == MODEL_FOENIX_A2560K || MODEL == MODEL_FOENIX_GENX || MODEL == MODEL_FOENIX_A2560X
static void log_to_channel_A_low_level(const char *message);
#endif
static short uart; // UART id to use with the uart_xxx functions
#define UART_COM1 0
#define UART_COM2 1
/* Can use the buzzer as sound clues */
void buzzer_on(void) {
*(GABE_CTRL_REG) = BUZZER_CONTROL;
*(GABE_CTRL_REG) |= BUZZER_CONTROL;
}
@ -49,14 +60,22 @@ void buzzer_off(void) {
void log_init(void) {
log_setlevel(DEFAULT_LOG_LEVEL);
log_channel = LOG_CHANNEL;
switch (log_channel) {
case LOG_CHANNEL_UART0:
uart_init(UART_COM1);
case LOG_CHANNEL_COM1:
do_log = log_to_uart;
uart = UART_COM1;
uart_init(uart);
break;
#if (MODEL == MODEL_FOENIX_A2560K || MODEL == MODEL_FOENIX_GENX || MODEL == MODEL_FOENIX_A2560X)
case LOG_CHANNEL_COM2:
do_log = log_to_uart;
uart = UART_COM2;
uart_init(uart);
break;
case LOG_CHANNEL_CHANNEL_A_LOW_LEVEL:
channel_A_logger_init();
do_log = log_to_channel_A_low_level;
@ -65,7 +84,7 @@ void log_init(void) {
default:
do_log = log_to_screen;
}
log(LOG_INFO,"FOENIX DEBUG OUTPUT------------");
INFO("FOENIX DEBUG OUTPUT------------");
}
unsigned short panic_number; /* The number of the kernel panic */
@ -159,7 +178,7 @@ void panic(void) {
t_rect region;
TRACE("PANIC------------------------------------------");
/* Shut off all interrupts */
int_disable_all();
// TODO: int_disable_all();
/* Re-initialize the text screen */
txt_init_screen(0);
@ -253,13 +272,23 @@ void log_setlevel(short level) {
log_level = level;
}
/* See do in the .h file */
void set_log_channel(short channel) {
if (log_channel != channel) {
log_channel = channel;
log_init();
}
}
static void log_to_uart(const char *message) {
char *c = (char*)message;
while (*c)
uart_put(UART_COM1, *c++);
uart_put(UART_COM1,'\r');
uart_put(UART_COM1,'\n');
while (*c) {
if (*c == '\n')
uart_put(uart,'\r');
uart_put(uart, *c++);
}
uart_put(uart,'\r');
uart_put(uart,'\n');
}
static void log_to_screen(const char *message) {
@ -284,32 +313,16 @@ static void log_to_channel_A_low_level(const char *message) {
* Caveat:
* The total length should not exceed 512 chars.
*/
void log(short level, const char * message, ...) {
void logmsg(short level, const char * message, ...) {
if (level > log_level)
return;
char buf[80]; // Should hopefully be long enough !
va_list args;
va_start(args, message);
vsprintf(buf, message, args);
vsnprintf(logbuf, sizeof(logbuf), message, args);
va_end(args);
(*do_log)(buf);
}
void trace(const char * message, ...) {
if (LOG_TRACE > log_level)
return;
char buf[80]; // Should hopefully be long enough !
va_list args;
va_start(args, message);
vsprintf(buf, message, args);
va_end(args);
(*do_log)(buf);
do_log(logbuf);
}
/*
@ -324,7 +337,7 @@ void log2(short level, const char * message1, const char * message2) {
if (level <= log_level) {
char line[80];
sprintf(line, "%s%s\n", message1, message2);
log(level, line);
logmsg(level, line);
}
}
@ -341,7 +354,7 @@ void log3(short level, const char * message1, const char * message2, const char
if (level <= log_level) {
char line[80];
sprintf(line, "%s%s%s\n", message1, message2, message3);
log(level, line);
logmsg(level, line);
}
}
@ -358,7 +371,7 @@ void log_num(short level, char * message, int n) {
if (level <= log_level) {
sprintf(line, "%s%08X", message, n);
log(level, line);
logmsg(level, line);
}
}
@ -369,5 +382,5 @@ void log_c(short level, char c) {
char line[2];
line[0] = c;
line[1] = '\0';
log(level, line);
logmsg(level, line);
}

100
src/log.h
View file

@ -6,23 +6,37 @@
#define __LOG_H
#include <stdio.h> /* Not used here but convenience: there is every chance log messages will use sprintf */
#include "log_level.h"
#define LOG_CHANNEL_UART0 -1
#include "log_level.h"
#include "sys_general.h"
#define LOG_CHANNEL_CHANNEL_A 0
#define LOG_CHANNEL_CHANNEL_B 1
#define LOG_CHANNEL_CHANNEL_A_LOW_LEVEL 10 // low-level routines (doesn't use MCP's console stuff)
#define LOG_CHANNEL_CHANNEL_A_LOW_LEVEL 2 // low-level routines (doesn't use MCP's console stuff)
#define LOG_CHANNEL_COM1 10
#define LOG_CHANNEL_COM2 11
/*
* Settings
* Default settings
*/
#ifndef DEFAULT_LOG_LEVEL
#define DEFAULT_LOG_LEVEL LOG_ERROR
#define DEFAULT_LOG_LEVEL LOG_INFO
#endif
#ifndef LOG_CHANNEL
// If the device has a second screen, we default to logging to it
#if MODEL == MODEL_FOENIX_A2560K || MODEL == MODEL_FOENIX_A2560X || MODEL == MODEL_FOENIX_GENX
#define LOG_CHANNEL LOG_CHANNEL_CHANNEL_A_LOW_LEVEL
#else
#define LOG_CHANNEL LOG_CHANNEL_COM1
#endif
#else
#endif
#define LOGBUF_SIZE 200
extern short log_level;
extern void (*do_log)(const char* message);
extern char logbuf[];
/*
* Return human readable message for an error number
@ -48,6 +62,9 @@ extern void err_print(short channel, const char * message, short err_number);
extern void panic(void);
void buzzer_on(void);
void buzzer_off(void);
/*
* Setup the logging facility (for debugging)
*/
@ -62,6 +79,14 @@ extern void log_init(void);
*/
extern void log_setlevel(short level);
/*
* Tell where the debug output should go. The default is set in the Makefile.
* Beware that:
* - log channelare not "MCP" channels, see log.h for the valid values.
* - changing the log channel may reinitialize of mess up the target device.
*/
extern void set_log_channel(short channel);
/*
* Log a message to the console
*
@ -69,8 +94,8 @@ extern void log_setlevel(short level);
* level = the severity of the message... the logging level will filter messages displayed
* message = the message to log
*/
extern void log(short level, const char * message, ...);
extern void trace(const char * message, ...);
extern void logmsg(short level, const char * message, ...);
/*
* Log a message to the console
*
@ -108,16 +133,17 @@ extern void log_num(short level, char * message, int n);
extern void log_c(short log_level, char c);
/*
* Send a message to the debugging channel
* Send a message to the debugging channel.
* We are inling calls to snprintf and do_log because there are problems when using a proxy function to vsnprintf
*/
#if DEFAULT_LOG_LEVEL >= LOG_ERROR
# define ERROR(m) log(LOG_ERROR, m)
# define ERROR1(a,b) log(LOG_ERROR, a, b)
# define ERROR2(a,b,c) log(LOG_ERROR, a, b, c)
# define ERROR3(a,b,c,d) log(LOG_ERROR, a, b, c, d)
# define ERROR4(a,b,c,d,e) log(LOG_ERROR, a, b, c, d, e)
# define ERROR5(a,b,c,d,e,f) log(LOG_ERROR, a, b, c, d, e, f)
#define ERROR(a) if (log_level >= LOG_ERROR) { do_log(a); }
#define ERROR1(a,b) if (log_level >= LOG_ERROR) { snprintf(logbuf,200,a,b);do_log(logbuf); }
#define ERROR2(a,b,c) if (log_level >= LOG_ERROR) { snprintf(logbuf,200,a,b,c);do_log(logbuf); }
#define ERROR3(a,b,c,d) if (log_level >= LOG_ERROR) { snprintf(logbuf,200,a,b,c,d);do_log(logbuf); }
#define ERROR4(a,b,c,d,e) if (log_level >= LOG_ERROR) { snprintf(logbuf,200,a,b,c,d,e);do_log(logbuf); }
#define ERROR5(a,b,c,d,e,f) if (log_level >= LOG_ERROR) { snprintf(logbuf,200,a,b,c,d,e,f);do_log(logbuf); }
#else
# define ERROR(m)
# define ERROR1(a,b)
@ -129,12 +155,12 @@ extern void log_c(short log_level, char c);
#if DEFAULT_LOG_LEVEL >= LOG_INFO
# define INFO(m) log(LOG_INFO, m)
# define INFO1(a,b) log(LOG_INFO, a, b)
# define INFO2(a,b,c) log(LOG_INFO, a, b, c)
# define INFO3(a,b,c,d) log(LOG_INFO, a, b, c, d)
# define INFO4(a,b,c,d,e) log(LOG_INFO, a, b, c, d, e)
# define INFO5(a,b,c,d,e,f) log(LOG_INFO, a, b, c, d, e, f)
#define INFO(a) if (log_level >= LOG_INFO) { do_log(a); }
#define INFO1(a,b) if (log_level >= LOG_INFO) { snprintf(logbuf,200,a,b);do_log(logbuf); }
#define INFO2(a,b,c) if (log_level >= LOG_INFO) { snprintf(logbuf,200,a,b,c);do_log(logbuf); }
#define INFO3(a,b,c,d) if (log_level >= LOG_INFO) { snprintf(logbuf,200,a,b,c,d);do_log(logbuf); }
#define INFO4(a,b,c,d,e) if (log_level >= LOG_INFO) { snprintf(logbuf,200,a,b,c,d,e);do_log(logbuf); }
#define INFO5(a,b,c,d,e,f) if (log_level >= LOG_INFO) { snprintf(logbuf,200,a,b,c,d,e,f);do_log(logbuf); }
#else
# define INFO(m)
# define INFO1(a,b)
@ -145,12 +171,14 @@ extern void log_c(short log_level, char c);
#endif
#if DEFAULT_LOG_LEVEL >= LOG_DEBUG
# define DEBUG(m) log(LOG_DEBUG, m)
# define DEBUG1(a,b) log(LOG_DEBUG, a, b)
# define DEBUG2(a,b,c) log(LOG_DEBUG, a, b, c)
# define DEBUG3(a,b,c,d) log(LOG_DEBUG, a, b, c, d)
# define DEBUG4(a,b,c,d,e) log(LOG_DEBUG, a, b, c, d, e)
# define DEBUG5(a,b,c,d,e,f) log(LOG_DEBUG, a, b, c, d, e, f)
#define DEBUG(a) if (log_level >= LOG_DEBUG) { do_log(a); }
#define DEBUG1(a,b) if (log_level >= LOG_DEBUG) { snprintf(logbuf,200,a,b);do_log(logbuf); }
#define DEBUG2(a,b,c) if (log_level >= LOG_DEBUG) { snprintf(logbuf,200,a,b,c);do_log(logbuf); }
#define DEBUG3(a,b,c,d) if (log_level >= LOG_DEBUG) { snprintf(logbuf,200,a,b,c,d);do_log(logbuf); }
#define DEBUG4(a,b,c,d,e) if (log_level >= LOG_DEBUG) { snprintf(logbuf,200,a,b,c,d,e);do_log(logbuf); }
#define DEBUG5(a,b,c,d,e,f) if (log_level >= LOG_DEBUG) { snprintf(logbuf,200,a,b,c,d,e,f);do_log(logbuf); }
#define DEBUG6(a,b,c,d,e,f,g) if (log_level >= LOG_DEBUG) { snprintf(logbuf,200,a,b,c,d,e,f,g);do_log(logbuf); }
#define DEBUG7(a,b,c,d,e,f,g,h) if (log_level >= LOG_DEBUG) { snprintf(logbuf,200,a,b,c,d,e,f,g,h);do_log(logbuf); }
#else
# define DEBUG(m)
# define DEBUG1(a,b)
@ -158,17 +186,19 @@ extern void log_c(short log_level, char c);
# define DEBUG3(a,b,c,d)
# define DEBUG4(a,b,c,d,e)
# define DEBUG5(a,b,c,d,e,f)
# define DEBUG6(a,b,c,d,e,f,g)
# define DEBUG7(a,b,c,d,e,f,g,h)
#endif
#if DEFAULT_LOG_LEVEL >= LOG_TRACE
# define TRACE(m) trace(m)
# define TRACE1(a,b) trace(a, b)
# define TRACE2(a,b,c) trace(a, b, c)
# define TRACE3(a,b,c,d) trace(a, b, c, d)
# define TRACE4(a,b,c,d,e) trace(a, b, c, d, e)
# define TRACE5(a,b,c,d,e,f) trace(a, b, c, d, e, f)
# define TRACE6(a,b,c,d,e,f,g) trace(a, b, c, d, e, f, g)
# define TRACE7(a,b,c,d,e,f,g,h) trace(a, b, c, d, e, f, g, h)
#if 0 && DEFAULT_LOG_LEVEL >= LOG_TRACE
#define TRACE(a) if (log_level >= LOG_TRACE) { do_log(a); }
#define TRACE1(a,b) if (log_level >= LOG_TRACE) { snprintf(logbuf,200,a,b);do_log(logbuf); }
#define TRACE2(a,b,c) if (log_level >= LOG_TRACE) { snprintf(logbuf,200,a,b,c);do_log(logbuf); }
#define TRACE3(a,b,c,d) if (log_level >= LOG_TRACE) { snprintf(logbuf,200,a,b,c,d);do_log(logbuf); }
#define TRACE4(a,b,c,d,e) if (log_level >= LOG_TRACE) { snprintf(logbuf,200,a,b,c,d,e);do_log(logbuf); }
#define TRACE5(a,b,c,d,e,f) if (log_level >= LOG_TRACE) { snprintf(logbuf,200,a,b,c,d,e,f);do_log(logbuf); }
#define TRACE6(a,b,c,d,e,f,g) if (log_level >= LOG_TRACE) { snprintf(logbuf,200,a,b,c,d,e,f,g);do_log(logbuf); }
#define TRACE7(a,b,c,d,e,f,g,h) if (log_level >= LOG_TRACE) { snprintf(logbuf,200,a,b,c,d,e,f,g,h);do_log(logbuf); }
#else
# define TRACE(m)
# define TRACE1(a,b)

2
src/m68k/bios_m68k.c
View file

@ -33,7 +33,7 @@
* Determine the correct system function implementation and call it.
*/
unsigned long syscall_dispatch(int32_t function, int32_t param0, int32_t param1, int32_t param2, int32_t param3, int32_t param4, int32_t param5) {
TRACE7("DISPATCH(%lx,%ld,%ld,%ld,%ld,%ld,%ld)", function, param0, param1, param2, param3, param4, param5);
TRACE7("DISPATCH(0x%lx,%ld,%ld,%ld,%ld,%ld,%ld)", function, param0, param1, param2, param3, param4, param5);
switch (function & 0x00f0) {
case 0x00:
/* Core System Calls */

15
src/memory.c
View file

@ -1,10 +1,10 @@
/**
* @file memory.h
*
* Memory mangament system: memory in Foenix/MCP is handled very simply.
* Memory managament system: memory in Foenix/MCP is handled very simply.
* The system will keep track of the top of available system RAM.
* User programs can do whatever they want with system RAM from $400 to
* the top of system RAM. Memory above top of system RAM is reserved for
* User programs can do whatever they want with system RAM from $400 (end of 68K vectors area)
* to the top of system RAM. Memory above top of system RAM is reserved for
* the kernel and any terminate-stay-resident code the user cares to install.
*
* NOTE: this code does not manage video RAM or DRAM (on the A2560K)... only
@ -12,16 +12,17 @@
*
*/
#include <stdint.h>
#include "memory.h"
unsigned long mem_top_of_ram = 0;
uint32_t mem_top_of_ram = 0;
/*
* Initialize the memory management system
*
* @param top_of_ram initial value for the top of system RAM
*/
void mem_init(unsigned long top_of_ram) {
void mem_init(uint32_t top_of_ram) {
mem_top_of_ram = top_of_ram;
}
@ -31,7 +32,7 @@ void mem_init(unsigned long top_of_ram) {
*
* @return the address of the first byte of reserved system RAM (one above the last byte the user program can use)
*/
unsigned long mem_get_ramtop() {
uint32_t mem_get_ramtop() {
return mem_top_of_ram;
}
@ -41,7 +42,7 @@ unsigned long mem_get_ramtop() {
* @param bytes the number of bytes to reserve
* @return address of the first byte of the reserved block
*/
unsigned long mem_reserve(unsigned long bytes) {
uint32_t mem_reserve(uint32_t bytes) {
mem_top_of_ram -= bytes;
return mem_top_of_ram;
}

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