Hires DIP switch & UART divisors

Added code to honor the resolution DIP switch on the U. Refined the UART divisor constants to be more accurate on the U.
This commit is contained in:
Peter Weingartner 2021-11-10 20:57:24 -05:00
parent 98ba08dfe2
commit 10517ad6ae
7 changed files with 6167 additions and 6153 deletions

2
.gitignore vendored
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@ -58,3 +58,5 @@ src/foenixmcp_20211027_1.bin
src/foenixmcp_setsof.bin
src/foenixmcp_u_20201020.bin
src/foenixmcp.bin
src/foenixmcp_ram.bin
src/foenixmcp_flash.bin

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@ -28,6 +28,7 @@ export DEFINES = -DCPU=$(CPU) -DMODEL=$(MODEL) -DVER_MAJOR=$(VER_MAJOR) -DVER_MI
ifeq ($(OS),Windows_NT)
export CFLAGS = +$(VBCC)/config/m68k-foenix -I. -I$(CURDIR)/include -I$(CURDIR)
#export CFLAGS = +$(VBCC)/config/a2560u_flash -I. -I$(CURDIR)/include -I$(CURDIR)
export RM = cmd /C del /Q /F
else
export CFLAGS = +$(VBCC)/config/m68k-foenix-linux -I. -I$(CURDIR)/include -I$(CURDIR)

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@ -118,7 +118,7 @@ int text_init() {
/* Initialize everything... only do a screen if it's present */
// need_hires = ((*VKY3_DIP_REG & VKY3_DIP_HIRES) == VKY3_DIP_HIRES) ? 1 : 0;
need_hires = ((*VKY3_DIP_REG & VKY3_DIP_HIRES) == 0) ? 1 : 0;
chan_a->master_control = MasterControlReg_A;
chan_a->text_cells = ScreenText_A;
@ -258,7 +258,8 @@ void text_set_xy(short screen, unsigned short x, unsigned short y) {
chan->x = x;
chan->y = y;
*(chan->cursor_position) = y << 16 | x;
*(chan->cursor_position) = ((unsigned long)y << 16) | (unsigned long)x;
short offset = y * chan->columns_max + x;
chan->text_cursor_ptr = &chan->text_cells[offset];
chan->color_cursor_ptr = &chan->color_cells[offset];

File diff suppressed because it is too large Load diff

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@ -81,13 +81,13 @@
#if MODEL == MODEL_FOENIX_A2560U || MODEL == MODEL_FOENIX_A2560U_PLUS
#define UART_300 4352 /* Code for 300 bps */
#define UART_1200 1088 /* Code for 1200 bps */
#define UART_2400 544 /* Code for 2400 bps */
#define UART_4800 272 /* Code for 4800 bps */
#define UART_9600 134 /* Code for 9600 bps */
#define UART_19200 67 /* Code for 19200 bps */
#define UART_38400 34 /* Code for 28400 bps */
#define UART_300 4167 /* Code for 300 bps */
#define UART_1200 1042 /* Code for 1200 bps */
#define UART_2400 521 /* Code for 2400 bps */
#define UART_4800 260 /* Code for 4800 bps */
#define UART_9600 130 /* Code for 9600 bps */
#define UART_19200 65 /* Code for 19200 bps */
#define UART_38400 33 /* Code for 28400 bps */
#define UART_57600 22 /* Code for 57600 bps */
#define UART_115200 11 /* Code for 115200 bps */

File diff suppressed because it is too large Load diff

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@ -119,27 +119,31 @@ void sid_test_internal() {
*SID_INT_L_V3_CTRL = 0x11;
*SID_INT_R_V3_CTRL = 0x11;
jiffies = rtc_get_jiffies() + 60;
jiffies = rtc_get_jiffies() + 25;
while (jiffies > rtc_get_jiffies());
*SID_INT_L_V1_CTRL = 0x10;
*SID_INT_R_V1_CTRL = 0x10;
for (j=0 ; j<8192 ; j++);
*SID_INT_L_V2_CTRL = 0x10;
*SID_INT_R_V2_CTRL = 0x10;
for (j=0 ; j<8192 ; j++);
*SID_INT_L_V2_CTRL = 0x10;
*SID_INT_R_V2_CTRL = 0x10;
for (j=0 ; j<32768 ; j++);
// for (i = 0; i < 16; i++) {
//
// jiffies = rtc_get_jiffies() + 1;
// while (jiffies > rtc_get_jiffies());
//
// *SID_INT_L_MODE_VOL = 15 - i;
// *SID_INT_R_MODE_VOL = 15 - i;
// }
jiffies = rtc_get_jiffies() + 3;
while (jiffies > rtc_get_jiffies());
*SID_INT_L_V2_CTRL = 0x10;
*SID_INT_R_V2_CTRL = 0x10;
jiffies = rtc_get_jiffies() + 3;
while (jiffies > rtc_get_jiffies());
*SID_INT_L_V2_CTRL = 0x10;
*SID_INT_R_V2_CTRL = 0x10;
jiffies = rtc_get_jiffies() + 10;
while (jiffies > rtc_get_jiffies());
for (i = 0; i < 16; i++) {
*SID_INT_L_MODE_VOL = 15 - i;
*SID_INT_R_MODE_VOL = 15 - i;
}
*SID_INT_L_MODE_VOL = 0;
*SID_INT_R_MODE_VOL = 0;